Re: [PATCH 9/9] drm/i915: PF CRC may not work on HSW

From: Daniel Vetter <daniel@ffwll.ch>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 9/9] drm/i915: PF CRC may not work on HSW
Date: Mon, 10 Feb 2014 11:43:50 +0100	[thread overview]
Message-ID: <20140210104350.GV17001@phenom.ffwll.local> (raw)
In-Reply-To: <1391805427-4576-10-git-send-email-rodrigo.vivi@gmail.com>

On Fri, Feb 07, 2014 at 06:37:07PM -0200, Rodrigo Vivi wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> When using pipe A and transcoder EDP w/o panel fitter on
> HSW, the PF CRC isn't available as the panel fitter is entirely
> bypassed. Check for this and refuse to give out CRCs.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

I've discussed this a bit with Ville and I think the right fix would be to
use the DDI A CRC in this case, at least for the auto source, similarly to
who we do magic stuff for DP on g4x/vlv. I don't have a suitable hsw
machine, only one with desktop edp on DDI E around. So any volunteers?

Cheers, Daniel
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 29 +++++++++++++++++++++++++++--
>  1 file changed, 27 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 2dc05c3..de020c0 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2548,7 +2548,30 @@ static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
>  	return 0;
>  }
>  
> -static int ivb_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
> +static bool hsw_crc_source_pf_ok(struct drm_device *dev, enum pipe pipe)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
> +	bool ok;
> +
> +	if (!IS_HASWELL(dev) || pipe != PIPE_A)
> +		return true;
> +
> +	mutex_lock(&crtc->base.mutex);
> +
> +	/* pipe A -> no panel fitter -> transcoder EDP == no PF CRC */
> +	ok = !crtc->active ||
> +		crtc->config.cpu_transcoder != TRANSCODER_EDP ||
> +		crtc->config.pch_pfit.enabled;
> +
> +	mutex_unlock(&crtc->base.mutex);
> +
> +	return ok;
> +}
> +
> +static int ivb_pipe_crc_ctl_reg(struct drm_device *dev,
> +				enum pipe pipe,
> +				enum intel_pipe_crc_source *source,
>  				uint32_t *val)
>  {
>  	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
> @@ -2562,6 +2585,8 @@ static int ivb_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
>  		*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB;
>  		break;
>  	case INTEL_PIPE_CRC_SOURCE_PF:
> +		if (!hsw_crc_source_pf_ok(dev, pipe))
> +			return -EINVAL;
>  		*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB;
>  		break;
>  	case INTEL_PIPE_CRC_SOURCE_NONE:
> @@ -2598,7 +2623,7 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
>  	else if (IS_GEN5(dev) || IS_GEN6(dev))
>  		ret = ilk_pipe_crc_ctl_reg(&source, &val);
>  	else
> -		ret = ivb_pipe_crc_ctl_reg(&source, &val);
> +		ret = ivb_pipe_crc_ctl_reg(dev, pipe, &source, &val);
>  
>  	if (ret != 0)
>  		return ret;
> -- 
> 1.8.3.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch