From: Daniel Vetter <daniel@ffwll.ch>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits
Date: Mon, 7 Jul 2014 18:31:38 +0200 [thread overview]
Message-ID: <20140707163138.GP5821@phenom.ffwll.local> (raw)
In-Reply-To: <87k37puxmt.fsf@gaia.fi.intel.com>
On Mon, Jul 07, 2014 at 04:06:02PM +0300, Mika Kuoppala wrote:
> michel.thierry@intel.com writes:
>
> > From: Michel Thierry <michel.thierry@intel.com>
> >
> > The workaround to limit SDE poly depth FIFO to 2 is not applied because
> > 3D Chicken-3 mask bit is not set.
> >
> > WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed.
> >
> > Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2014-07-07 16:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-07 11:40 [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits michel.thierry
2014-07-07 13:06 ` Mika Kuoppala
2014-07-07 16:31 ` Daniel Vetter [this message]
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