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From: Daniel Vetter <daniel@ffwll.ch>
To: sonika.jindal@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/8] drm/i915: Returning from increase/decrease of pllclock when invalid
Date: Mon, 21 Jul 2014 17:50:29 +0200	[thread overview]
Message-ID: <20140721155029.GY15237@phenom.ffwll.local> (raw)
In-Reply-To: <1405936425-17341-6-git-send-email-sonika.jindal@intel.com>

On Mon, Jul 21, 2014 at 03:23:42PM +0530, sonika.jindal@intel.com wrote:
> From: Sonika Jindal <sonika.jindal@intel.com>
> 
> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 442d8ba..f6cf9bb 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8783,7 +8783,7 @@ static void intel_increase_pllclock(struct drm_device *dev,
>  	int dpll_reg = DPLL(pipe);
>  	int dpll;
>  
> -	if (HAS_PCH_SPLIT(dev))
> +	if (INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev))

Same as with the previous patch.
-Daniel

>  		return;
>  
>  	if (!dev_priv->lvds_downclock_avail)
> @@ -8811,7 +8811,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>  
> -	if (HAS_PCH_SPLIT(dev))
> +	if (INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev))
>  		return;
>  
>  	if (!dev_priv->lvds_downclock_avail)
> -- 
> 1.7.10.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-07-21 15:50 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-21  9:53 [PATCH 0/8 v2] Future preparation patches sonika.jindal
2014-07-21  9:53 ` [PATCH 1/8] drm/i915: Adding HAS_GMCH_DISPLAY macro sonika.jindal
2014-07-21  9:53 ` [PATCH 2/8] drm/i915: Allowing changing of wm latencies for valid platforms sonika.jindal
2014-07-21  9:53 ` [PATCH 3/8] drm/i915: Returning the right VGA control reg for platforms sonika.jindal
2014-07-21  9:53 ` [PATCH 4/8] drm/i915: Setting legacy palette correctly for different platforms sonika.jindal
2014-07-21 15:49   ` Daniel Vetter
2014-07-22  5:48     ` [PATCH v2] " sonika.jindal
2014-07-21  9:53 ` [PATCH 5/8] drm/i915: Returning from increase/decrease of pllclock when invalid sonika.jindal
2014-07-21 15:50   ` Daniel Vetter [this message]
2014-07-22  5:46     ` [PATCH v2] " sonika.jindal
2014-07-21  9:53 ` [PATCH 6/8] drm/i915: Writing proper check for reading of pipe status reg sonika.jindal
2014-07-21  9:53 ` [PATCH 7/8] drm/i915: Replace HAS_PCH_SPLIT which incorrectly lets some platforms in sonika.jindal
2014-07-21 15:51   ` Daniel Vetter
2014-07-22  5:43     ` [PATCH v2] " sonika.jindal
2014-07-22  7:13       ` Daniel Vetter
2014-07-21  9:53 ` [PATCH 8/8] drm/i915: Avoid incorrect returning for some platforms sonika.jindal
2014-07-21 15:52 ` [PATCH 0/8 v2] Future preparation patches Daniel Vetter

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