Re: [PATCH 0/8 v2] Future preparation patches

[Daniel Vetter <daniel@ffwll.ch>]

On Mon, Jul 21, 2014 at 03:23:37PM +0530, sonika.jindal@intel.com wrote:
> From: Sonika Jindal <sonika.jindal@intel.com>
> 
> This series prepares future platform enabling by changing HAS_PCH_SPLIT to more
> appropriate check since the code accessed may not have anything to do with
> having PCH or not.
> 
> v2: Adding new HAS_GMCH_DISPLAY macro suggested by Daniel. Also taking care of
> Ironlake(gen 5), by making gen < 5 check suggested by Damien.
> Effectively, !HAS_PCH_SPLIT is equivalent to HAS_GMCH_DISPLAY
> and HAS_PCH_SPLIT is equivalent to gen >= 5 && !(VALLEYVIEW).
> 
> Sonika Jindal (8):
>   drm/i915: Adding HAS_GMCH_DISPLAY macro
>   drm/i915: Allowing changing of wm latencies for valid platforms
>   drm/i915: Returning the right VGA control reg for platforms
>   drm/i915: Setting legacy palette correctly for different platforms
>   drm/i915: Returning from increase/decrease of pllclock when invalid
>   drm/i915: Writing proper check for reading of pipe status reg
>   drm/i915: Replace HAS_PCH_SPLIT which incorrectly lets some platforms
>     in
>   drm/i915: Avoid incorrect returning for some platforms

I commented on a few patches, all others merged to dinq.

Thanks, Daniel
> 
>  drivers/gpu/drm/i915/i915_debugfs.c  |    6 +++---
>  drivers/gpu/drm/i915/i915_drv.h      |    8 +++++---
>  drivers/gpu/drm/i915/intel_display.c |    8 ++++----
>  drivers/gpu/drm/i915/intel_hdmi.c    |    4 ++--
>  4 files changed, 14 insertions(+), 12 deletions(-)
> 
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch