From: Daniel Vetter <daniel@ffwll.ch>
To: "Daniel, Thomas" <thomas.daniel@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915/bdw: Setup global hardware status page in execlists mode
Date: Fri, 24 Oct 2014 10:48:43 +0200 [thread overview]
Message-ID: <20141024084843.GY26941@phenom.ffwll.local> (raw)
In-Reply-To: <BFEE8FEC12424048AF1805991D65FA91196D355A@IRSMSX105.ger.corp.intel.com>
On Fri, Oct 24, 2014 at 08:30:56AM +0000, Daniel, Thomas wrote:
>
>
> > -----Original Message-----
> > From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Friday, October 24, 2014 9:15 AM
> > To: Daniel, Thomas
> > Cc: intel-gfx@lists.freedesktop.org; shuang.he@linux.intel.com
> > Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/bdw: Setup global hardware
> > status page in execlists mode
> > So every time a random new contexts gets created we write a new value into
> > the HWS_PGA register? Shouldn't this only be done when we set up the
> > default/system context?
> The write is inside an if(ctx == ring->default_ctx) block.
> We only write when the default context is created.
Hm right, confusing diff context. And I guess we can't move that out to
logical_ring_init since it must happen before we init the render ring?
I think extracting this entire block into a setup_global_hws or so helper
function would be useful for clarity.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-10-24 8:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-23 15:24 [PATCH 2/2] drm/i915/bdw: Setup global hardware status page in execlists mode Thomas Daniel
2014-10-23 15:41 ` Chris Wilson
2014-10-24 8:14 ` Daniel Vetter
2014-10-24 8:30 ` Daniel, Thomas
2014-10-24 8:48 ` Daniel Vetter [this message]
2014-10-24 9:36 ` Chris Wilson
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