[PATCH] drm/i915/skl: Update in Gen9 multi-engine forcewake range

[PATCH] drm/i915/skl: Update in Gen9 multi-engine forcewake range

[akash.goel]

From: Akash Goel <akash.goel@intel.com>

Updates in forcewake range for Render/Media/Common
power wells for Gen9.

Signed-off-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index f0230b0..1ec125c 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -671,18 +671,22 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
 	 REG_RANGE((reg), 0x22000, 0x24000))
 
 #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
-	REG_RANGE((reg), 0xC00,  0x2000)
+	REG_RANGE((reg), 0xB00,  0x2000)
 
 #define FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg) \
-	(REG_RANGE((reg), 0x2000, 0x4000) || \
+	(REG_RANGE((reg), 0x2000, 0x2700) || \
+	 REG_RANGE((reg), 0x3000, 0x4000) || \
 	 REG_RANGE((reg), 0x5200, 0x8000) || \
+	 REG_RANGE((reg), 0x8140, 0x8160) || \
 	 REG_RANGE((reg), 0x8300, 0x8500) || \
 	 REG_RANGE((reg), 0x8C00, 0x8D00) || \
 	 REG_RANGE((reg), 0xB000, 0xB480) || \
-	 REG_RANGE((reg), 0xE000, 0xE800))
+	 REG_RANGE((reg), 0xE000, 0xE900) || \
+	 REG_RANGE((reg), 0x24400, 0x24800))
 
 #define FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg) \
-	(REG_RANGE((reg), 0x8800, 0x8A00) || \
+	(REG_RANGE((reg), 0x8130, 0x8140) || \
+	 REG_RANGE((reg), 0x8800, 0x8A00) || \
 	 REG_RANGE((reg), 0xD000, 0xD800) || \
 	 REG_RANGE((reg), 0x12000, 0x14000) || \
 	 REG_RANGE((reg), 0x1A000, 0x1EA00) || \
-- 
1.9.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/skl: Update in Gen9 multi-engine forcewake range

[Damien Lespiau]

On Tue, Nov 25, 2014 at 12:29:00PM +0530, akash.goel@intel.com wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> Updates in forcewake range for Render/Media/Common
> power wells for Gen9.
> 
> Signed-off-by: Akash Goel <akash.goel@intel.com>
> Signed-off-by: Zhe Wang <zhe1.wang@intel.com>


Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index f0230b0..1ec125c 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -671,18 +671,22 @@ void assert_force_wake_inactive(struct drm_i915_private *dev_priv)
>  	 REG_RANGE((reg), 0x22000, 0x24000))
>  
>  #define FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg) \
> -	REG_RANGE((reg), 0xC00,  0x2000)
> +	REG_RANGE((reg), 0xB00,  0x2000)
>  
>  #define FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg) \
> -	(REG_RANGE((reg), 0x2000, 0x4000) || \
> +	(REG_RANGE((reg), 0x2000, 0x2700) || \
> +	 REG_RANGE((reg), 0x3000, 0x4000) || \
>  	 REG_RANGE((reg), 0x5200, 0x8000) || \
> +	 REG_RANGE((reg), 0x8140, 0x8160) || \
>  	 REG_RANGE((reg), 0x8300, 0x8500) || \
>  	 REG_RANGE((reg), 0x8C00, 0x8D00) || \
>  	 REG_RANGE((reg), 0xB000, 0xB480) || \
> -	 REG_RANGE((reg), 0xE000, 0xE800))
> +	 REG_RANGE((reg), 0xE000, 0xE900) || \
> +	 REG_RANGE((reg), 0x24400, 0x24800))
>  
>  #define FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg) \
> -	(REG_RANGE((reg), 0x8800, 0x8A00) || \
> +	(REG_RANGE((reg), 0x8130, 0x8140) || \
> +	 REG_RANGE((reg), 0x8800, 0x8A00) || \
>  	 REG_RANGE((reg), 0xD000, 0xD800) || \
>  	 REG_RANGE((reg), 0x12000, 0x14000) || \
>  	 REG_RANGE((reg), 0x1A000, 0x1EA00) || \
> -- 
> 1.9.2
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915/skl: Update in Gen9 multi-engine forcewake range

[Daniel Vetter]

On Tue, Nov 25, 2014 at 12:26:55PM +0000, Damien Lespiau wrote:
> On Tue, Nov 25, 2014 at 12:29:00PM +0530, akash.goel@intel.com wrote:
> > From: Akash Goel <akash.goel@intel.com>
> > 
> > Updates in forcewake range for Render/Media/Common
> > power wells for Gen9.
> > 
> > Signed-off-by: Akash Goel <akash.goel@intel.com>
> > Signed-off-by: Zhe Wang <zhe1.wang@intel.com>

Aside: Last sob line should be the person who submits the patch, first one
the original author. Otherwise your internal hand-off process is screwed
up. If you want to acknowledge earlier contributors either do that in the
commit message ("Based upon a patch from ...") and add the person to the
Cc: list. Or have an in-patch changelog and make it clear which s-o-b line
is for which version of the patch (they way Damien&I handle internal
patches).

Remember that the sob line essentially amounts to signing a legal
statement, so this should be done with care.

> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx