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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org, Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH v3 09/10] drm/i915: Remove superfluous powersave work flushing
Date: Thu, 26 May 2016 14:45:09 +0300	[thread overview]
Message-ID: <20160526114509.GQ4329@intel.com> (raw)
In-Reply-To: <1464252760-23902-10-git-send-email-chris@chris-wilson.co.uk>

On Thu, May 26, 2016 at 09:52:39AM +0100, Chris Wilson wrote:
> Instead of flushing the outstanding enabling, remember the requested
> frequency to apply when the powersave work runs.

I didn't see a patch to move the frequency init to happen before
debugfs init. So methinks we still need the flush.

> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 30 ++------------------------
>  drivers/gpu/drm/i915/i915_sysfs.c   | 42 +++++++------------------------------
>  2 files changed, 10 insertions(+), 62 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 615cef736356..a49c7a0019b7 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1193,8 +1193,6 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
>  
>  	intel_runtime_pm_get(dev_priv);
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	if (IS_GEN5(dev)) {
>  		u16 rgvswctl = I915_READ16(MEMSWCTL);
>  		u16 rgvstat = I915_READ16(MEMSTAT_ILK);
> @@ -1881,8 +1879,6 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
>  
>  	intel_runtime_pm_get(dev_priv);
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
>  	if (ret)
>  		goto out;
> @@ -4970,20 +4966,11 @@ i915_max_freq_get(void *data, u64 *val)
>  {
>  	struct drm_device *dev = data;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
>  
>  	if (INTEL_INFO(dev)->gen < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> -	if (ret)
> -		return ret;
> -
>  	*val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
>  	return 0;
>  }
>  
> @@ -4998,8 +4985,6 @@ i915_max_freq_set(void *data, u64 val)
>  	if (INTEL_INFO(dev)->gen < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
>  
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> @@ -5037,20 +5022,11 @@ i915_min_freq_get(void *data, u64 *val)
>  {
>  	struct drm_device *dev = data;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
>  
> -	if (INTEL_INFO(dev)->gen < 6)
> +	if (INTEL_GEN(dev_priv) < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> -	if (ret)
> -		return ret;
> -
>  	*val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
>  	return 0;
>  }
>  
> @@ -5062,11 +5038,9 @@ i915_min_freq_set(void *data, u64 val)
>  	u32 hw_max, hw_min;
>  	int ret;
>  
> -	if (INTEL_INFO(dev)->gen < 6)
> +	if (INTEL_GEN(dev_priv) < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
>  
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index a6e90fe05a1e..915e97cdc4d5 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -271,8 +271,6 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev,
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> @@ -303,19 +301,9 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	intel_runtime_pm_get(dev_priv);
> -
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
> -	intel_runtime_pm_put(dev_priv);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq));
>  }
>  
>  static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
> @@ -335,15 +323,10 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
> -
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
>  
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.max_freq_softlimit));
>  }
>  
>  static ssize_t gt_max_freq_mhz_store(struct device *kdev,
> @@ -360,8 +343,6 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev,
>  	if (ret)
>  		return ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> @@ -403,15 +384,10 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.min_freq_softlimit));
>  }
>  
>  static ssize_t gt_min_freq_mhz_store(struct device *kdev,
> @@ -428,8 +404,6 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev,
>  	if (ret)
>  		return ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> -- 
> 2.8.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-05-26 11:45 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-26  8:52 Bug 95634, take 2 Chris Wilson
2016-05-26  8:52 ` [PATCH v3 01/10] drm/i915: Skip idling an idle engine Chris Wilson
2016-05-26  8:52 ` [PATCH v3 02/10] drm/i915: Move legacy kernel context pinning to intel_ringbuffer.c Chris Wilson
2016-05-26 12:04   ` Mika Kuoppala
2016-05-26 12:27     ` Chris Wilson
2016-05-26  8:52 ` [PATCH v3 03/10] drm/i915: Treat kernel context as initialised Chris Wilson
2016-05-26 11:51   ` Chris Wilson
2016-05-26 12:34     ` Chris Wilson
2016-05-26  8:52 ` [PATCH v3 04/10] drm/i915: Mark all default contexts as uninitialised after context loss Chris Wilson
2016-05-26  8:52 ` [PATCH v3 05/10] drm/i915: No need to wait for idle on L3 remap Chris Wilson
2016-05-26 12:06   ` Mika Kuoppala
2016-05-26 12:15   ` Joonas Lahtinen
2016-05-26  8:52 ` [PATCH v3 06/10] drm/i915: Split idling from forcing context switch Chris Wilson
2016-05-26 11:39   ` Joonas Lahtinen
2016-05-26  8:52 ` [PATCH v3 07/10] drm/i915: Only switch to default context when evicting from GGTT Chris Wilson
2016-05-26 11:33   ` Joonas Lahtinen
2016-05-26  8:52 ` [PATCH v3 08/10] drm/i915: Preserve current RPS frequency Chris Wilson
2016-05-26  8:52 ` [PATCH v3 09/10] drm/i915: Remove superfluous powersave work flushing Chris Wilson
2016-05-26 11:45   ` Ville Syrjälä [this message]
2016-05-26 11:58     ` Chris Wilson
2016-05-26 12:35     ` [PATCH] drm: Register the debugfs interfaces after loading the driver Chris Wilson
2016-05-26 13:06       ` Chris Wilson
2016-05-27  6:47         ` Daniel Vetter
2016-05-27  7:44           ` Chris Wilson
2016-05-26 13:17     ` [PATCH] drm/i915: Register debugfs interface last Chris Wilson
2016-05-26 14:30       ` Ville Syrjälä
2016-05-26  8:52 ` [PATCH v3 10/10] drm/i915: Defer enabling rc6 til after we submit the first batch/context Chris Wilson
2016-05-26  9:24 ` ✗ Ro.CI.BAT: failure for series starting with [v3,01/10] drm/i915: Skip idling an idle engine Patchwork
2016-05-26 13:14 ` ✗ Ro.CI.BAT: failure for series starting with [v3,01/10] drm/i915: Skip idling an idle engine (rev2) Patchwork
2016-05-26 13:53 ` ✗ Ro.CI.BAT: warning for series starting with [v3,01/10] drm/i915: Skip idling an idle engine (rev3) Patchwork

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