* [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
@ 2016-10-21 20:55 Chris Wilson
2016-10-21 21:23 ` ✗ Fi.CI.BAT: failure for " Patchwork
2016-10-21 21:58 ` [PATCH] " Ville Syrjälä
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2016-10-21 20:55 UTC (permalink / raw)
To: intel-gfx
The min-freq-table is an array of values that match each CPU frequency to
an equivalent GPU frequency. Setting a single value of 0 on init is both
illegal (generates an error from the PCU) and nonsensical. Let's see if
we survive without that error.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_pm.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b65208e23a08..ba3d1e97986a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5589,10 +5589,6 @@ static void gen6_enable_rps(struct drm_i915_private *dev_priv)
I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 50000);
I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
- ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
- if (ret)
- DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
-
reset_rps(dev_priv, gen6_set_rps);
rc6vids = 0;
--
2.9.3
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^ permalink raw reply related [flat|nested] 4+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
2016-10-21 20:55 [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup Chris Wilson
@ 2016-10-21 21:23 ` Patchwork
2016-10-21 21:58 ` [PATCH] " Ville Syrjälä
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2016-10-21 21:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
URL : https://patchwork.freedesktop.org/series/14187/
State : failure
== Summary ==
Series 14187v1 drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
https://patchwork.freedesktop.org/api/1.0/series/14187/revisions/1/mbox/
Test drv_module_reload_basic:
pass -> DMESG-WARN (fi-skl-6700hq)
skip -> PASS (fi-skl-6770hq)
Test gem_exec_suspend:
Subgroup basic-s3:
dmesg-warn -> PASS (fi-skl-6700hq)
Test gem_ringfill:
Subgroup basic-default-hang:
pass -> TIMEOUT (fi-ivb-3520m)
Subgroup basic-default-interruptible:
pass -> INCOMPLETE (fi-ivb-3520m)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
dmesg-warn -> PASS (fi-skl-6700hq)
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS (fi-skl-6700hq)
Subgroup suspend-read-crc-pipe-c:
dmesg-warn -> PASS (fi-skl-6700hq)
fi-bdw-5557u total:246 pass:231 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:246 pass:204 dwarn:0 dfail:0 fail:0 skip:42
fi-bxt-t5700 total:246 pass:216 dwarn:0 dfail:0 fail:0 skip:30
fi-byt-j1900 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-byt-n2820 total:246 pass:211 dwarn:0 dfail:0 fail:0 skip:35
fi-hsw-4770 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-hsw-4770r total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-ilk-650 total:246 pass:185 dwarn:0 dfail:0 fail:1 skip:60
fi-ivb-3520m total:113 pass:98 dwarn:0 dfail:0 fail:0 skip:13
fi-ivb-3770 total:246 pass:221 dwarn:0 dfail:0 fail:0 skip:25
fi-kbl-7200u total:246 pass:222 dwarn:0 dfail:0 fail:0 skip:24
fi-skl-6260u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:246 pass:222 dwarn:1 dfail:0 fail:0 skip:23
fi-skl-6700k total:246 pass:222 dwarn:1 dfail:0 fail:0 skip:23
fi-skl-6770hq total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:246 pass:210 dwarn:0 dfail:0 fail:0 skip:36
fi-snb-2600 total:246 pass:209 dwarn:0 dfail:0 fail:0 skip:37
Results at /archive/results/CI_IGT_test/Patchwork_2794/
fe893e34141bcdf5e145cc79e3b17e3b8f6b340a drm-intel-nightly: 2016y-10m-21d-20h-04m-02s UTC integration manifest
2c6e3bb drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
2016-10-21 20:55 [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup Chris Wilson
2016-10-21 21:23 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2016-10-21 21:58 ` Ville Syrjälä
2016-10-22 8:39 ` Chris Wilson
1 sibling, 1 reply; 4+ messages in thread
From: Ville Syrjälä @ 2016-10-21 21:58 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Fri, Oct 21, 2016 at 09:55:31PM +0100, Chris Wilson wrote:
> The min-freq-table is an array of values that match each CPU frequency to
> an equivalent GPU frequency. Setting a single value of 0 on init is both
> illegal (generates an error from the PCU) and nonsensical. Let's see if
> we survive without that error.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Yeah never made any sense. If we really wanted to reset the table, we'd
have to set every valid entry to 0.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b65208e23a08..ba3d1e97986a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5589,10 +5589,6 @@ static void gen6_enable_rps(struct drm_i915_private *dev_priv)
> I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 50000);
> I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
>
> - ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
> - if (ret)
> - DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
> -
> reset_rps(dev_priv, gen6_set_rps);
>
> rc6vids = 0;
> --
> 2.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
2016-10-21 21:58 ` [PATCH] " Ville Syrjälä
@ 2016-10-22 8:39 ` Chris Wilson
0 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2016-10-22 8:39 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Sat, Oct 22, 2016 at 12:58:09AM +0300, Ville Syrjälä wrote:
> On Fri, Oct 21, 2016 at 09:55:31PM +0100, Chris Wilson wrote:
> > The min-freq-table is an array of values that match each CPU frequency to
> > an equivalent GPU frequency. Setting a single value of 0 on init is both
> > illegal (generates an error from the PCU) and nonsensical. Let's see if
> > we survive without that error.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Yeah never made any sense. If we really wanted to reset the table, we'd
> have to set every valid entry to 0.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pushed to remove one worrying message from the test logs...
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-10-21 20:55 [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup Chris Wilson
2016-10-21 21:23 ` ✗ Fi.CI.BAT: failure for " Patchwork
2016-10-21 21:58 ` [PATCH] " Ville Syrjälä
2016-10-22 8:39 ` Chris Wilson
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