From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v7 06/20] drm/i915: Add engine reset count to error state
Date: Thu, 27 Apr 2017 16:12:46 -0700 [thread overview]
Message-ID: <20170427231300.32841-7-michel.thierry@intel.com> (raw)
In-Reply-To: <20170427231300.32841-1-michel.thierry@intel.com>
From: Arun Siluvery <arun.siluvery@linux.intel.com>
Driver maintains count of how many times a given engine is reset, useful to
capture this in error state also. It gives an idea of how engine is coping
up with the workloads it is executing before this error state.
A follow-up patch will provide this information in debugfs.
v2: s/engine_reset/reset_engine/ (Chris)
Define count as unsigned int (Tvrtko)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
drivers/gpu/drm/i915/i915_drv.h | 10 ++++++++++
drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a64e9b63cdbc..426db8756e95 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1941,8 +1941,9 @@ int i915_reset_engine(struct intel_engine_cs *engine)
/* replay remaining requests in the queue */
ret = engine->init_hw(engine);
if (ret)
- goto out; //XXX: ignore this line for now
+ goto out;
+ error->reset_engine_count[engine->id]++;
out:
return ret;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8e93189c2104..b00ea523a634 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -982,6 +982,7 @@ struct i915_gpu_state {
enum intel_engine_hangcheck_action hangcheck_action;
struct i915_address_space *vm;
int num_requests;
+ u32 reset_count;
/* position of active request inside the ring */
u32 rq_head, rq_post, rq_tail;
@@ -1617,6 +1618,9 @@ struct i915_gpu_error {
#define I915_RESET_HANDOFF 1
#define I915_WEDGED (BITS_PER_LONG - 1)
+ /** Number of times an engine has been reset */
+ u32 reset_engine_count[I915_NUM_ENGINES];
+
/**
* Waitqueue to signal when a hang is detected. Used to for waiters
* to release the struct_mutex for the reset to procede.
@@ -3439,6 +3443,12 @@ static inline u32 i915_reset_count(struct i915_gpu_error *error)
return READ_ONCE(error->reset_count);
}
+static inline u32 i915_reset_engine_count(struct i915_gpu_error *error,
+ struct intel_engine_cs *engine)
+{
+ return READ_ONCE(error->reset_engine_count[engine->id]);
+}
+
struct drm_i915_gem_request *
i915_gem_reset_prepare_engine(struct intel_engine_cs *engine);
int i915_gem_reset_prepare(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 14e2064b7653..a2ffb1ef2cfa 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -463,6 +463,7 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
err_printf(m, " hangcheck action timestamp: %lu, %u ms ago\n",
ee->hangcheck_timestamp,
jiffies_to_msecs(jiffies - ee->hangcheck_timestamp));
+ err_printf(m, " engine reset count: %u\n", ee->reset_count);
error_print_request(m, " ELSP[0]: ", &ee->execlist[0]);
error_print_request(m, " ELSP[1]: ", &ee->execlist[1]);
@@ -1244,6 +1245,8 @@ static void error_record_engine_registers(struct i915_gpu_state *error,
ee->hangcheck_timestamp = engine->hangcheck.action_timestamp;
ee->hangcheck_action = engine->hangcheck.action;
ee->hangcheck_stalled = engine->hangcheck.stalled;
+ ee->reset_count = i915_reset_engine_count(&dev_priv->gpu_error,
+ engine);
if (USES_PPGTT(dev_priv)) {
int i;
--
2.11.0
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next prev parent reply other threads:[~2017-04-27 23:13 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-27 23:12 [PATCH v7 00/20] Gen8+ engine-reset Michel Thierry
2017-04-27 23:12 ` [PATCH v7 01/20] drm/i915: Update i915.reset to handle engine resets Michel Thierry
2017-04-27 23:12 ` [PATCH v7 02/20] drm/i915: Modify error handler for per engine hang recovery Michel Thierry
2017-04-29 14:19 ` Chris Wilson
2017-05-08 18:31 ` Michel Thierry
2017-05-12 20:55 ` Michel Thierry
2017-05-12 21:09 ` Chris Wilson
2017-05-12 21:23 ` Michel Thierry
2017-05-15 21:14 ` [PATCH " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 03/20] drm/i915: Add support for per engine reset recovery Michel Thierry
2017-04-27 23:50 ` Chris Wilson
2017-04-28 21:59 ` Michel Thierry
2017-05-04 0:26 ` Michel Thierry
2017-05-15 21:18 ` [PATCH " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 04/20] drm/i915: Skip reset request if there is one already Michel Thierry
2017-04-29 14:21 ` Chris Wilson
2017-05-01 21:15 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 05/20] drm/i915: Cancel reset-engine if we couldn't find an active request Michel Thierry
2017-04-29 14:26 ` Chris Wilson
2017-05-15 21:20 ` [PATCH " Michel Thierry
2017-05-15 21:31 ` Chris Wilson
2017-05-15 21:47 ` Chris Wilson
2017-05-15 22:25 ` Michel Thierry
2017-05-16 7:54 ` Chris Wilson
2017-05-17 0:13 ` Michel Thierry
2017-05-17 7:19 ` Chris Wilson
2017-05-17 20:41 ` [PATCH] " Michel Thierry
2017-05-17 20:52 ` Chris Wilson
2017-05-18 1:11 ` Michel Thierry
2017-05-18 7:56 ` Chris Wilson
2017-05-18 17:19 ` Michel Thierry
2017-05-18 18:22 ` [PATCH] drm/i915: Look for active requests earlier in the reset path Michel Thierry
2017-05-18 18:26 ` Michel Thierry
2017-05-18 19:55 ` Chris Wilson
2017-05-18 21:11 ` Michel Thierry
2017-05-18 21:16 ` Chris Wilson
2017-05-18 21:34 ` Michel Thierry
2017-04-27 23:12 ` Michel Thierry [this message]
2017-04-27 23:12 ` [PATCH v7 07/20] drm/i915: Export per-engine reset count info to debugfs Michel Thierry
2017-04-27 23:12 ` [PATCH v7 08/20] drm/i915: Enable Engine reset and recovery support Michel Thierry
2017-04-27 23:12 ` [PATCH v7 09/20] drm/i915: Add engine reset count in get-reset-stats ioctl Michel Thierry
2017-04-27 23:12 ` [PATCH v7 10/20] drm/i915/selftests: reset engine self tests Michel Thierry
2017-04-27 23:12 ` [PATCH v7 11/20] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder Michel Thierry
2017-04-27 23:12 ` [PATCH v7 12/20] drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry
2017-04-27 23:58 ` Chris Wilson
2017-04-28 15:36 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 13/20] drm/i915/guc: Rename the function that resets the GuC Michel Thierry
2017-04-28 7:40 ` Tvrtko Ursulin
2017-05-01 20:09 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 14/20] drm/i915/guc: Add support for reset engine using GuC commands Michel Thierry
2017-04-27 23:12 ` [PATCH v7 15/20] drm/i915: Watchdog timeout: Pass GuC shared data structure during param load Michel Thierry
2017-04-27 23:12 ` [PATCH v7 16/20] drm/i915: Watchdog timeout: IRQ handler for gen8+ Michel Thierry
2017-04-27 23:12 ` [PATCH v7 17/20] drm/i915: Watchdog timeout: Ringbuffer command emission " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 18/20] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Michel Thierry
2017-04-27 23:12 ` [PATCH v7 19/20] drm/i915: Watchdog timeout: Include threshold value in error state Michel Thierry
2017-04-27 23:13 ` [PATCH v7 20/20] drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Michel Thierry
2017-04-27 23:30 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev4) Patchwork
2017-05-15 21:32 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev5) Patchwork
2017-05-15 21:48 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev7) Patchwork
2017-05-17 21:09 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev8) Patchwork
2017-05-18 18:40 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev9) Patchwork
2017-05-18 21:29 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev10) Patchwork
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