From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Michel Thierry <michel.thierry@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v7 13/20] drm/i915/guc: Rename the function that resets the GuC
Date: Fri, 28 Apr 2017 08:40:58 +0100 [thread overview]
Message-ID: <cf37113e-8a0b-f016-cffa-f2c2b29b2f83@linux.intel.com> (raw)
In-Reply-To: <20170427231300.32841-14-michel.thierry@intel.com>
On 28/04/2017 00:12, Michel Thierry wrote:
> intel_guc_reset sounds more like the microcontroller is the one performing
> a reset, while in this case is the opposite. intel_reset_guc not only
> makes it clearer, it follows the other intel_reset functions available.
>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_uc.c | 4 ++--
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c9ff7f726d47..e9e04c92a376 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3031,7 +3031,7 @@ extern int i915_reset_engine(struct intel_engine_cs *engine);
> extern bool intel_has_reset_engine(struct drm_i915_private *dev_priv);
> extern int intel_reset_engine_start(struct intel_engine_cs *engine);
> extern void intel_reset_engine_cancel(struct intel_engine_cs *engine);
> -extern int intel_guc_reset(struct drm_i915_private *dev_priv);
> +extern int intel_reset_guc(struct drm_i915_private *dev_priv);
> extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
> extern void intel_hangcheck_init(struct drm_i915_private *dev_priv);
> extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 900e3767a899..bad282b6c886 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -46,9 +46,9 @@ static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
> int ret;
> u32 guc_status;
>
> - ret = intel_guc_reset(dev_priv);
> + ret = intel_reset_guc(dev_priv);
> if (ret) {
> - DRM_ERROR("GuC reset failed, ret = %d\n", ret);
> + DRM_ERROR("Reset GuC failed, ret = %d\n", ret);
As a non-native speaker I might be wrong, but was thinking something
like "Failed to reset GuC", "Resetting GuC failed", "Reset of GuC
failed" would be clearer? I leave it for someone more competent to decide.
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 120fb440bb8b..00251d83e7bd 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1792,7 +1792,7 @@ bool intel_has_reset_engine(struct drm_i915_private *dev_priv)
> i915.reset == 2);
> }
>
> -int intel_guc_reset(struct drm_i915_private *dev_priv)
> +int intel_reset_guc(struct drm_i915_private *dev_priv)
> {
> int ret;
>
>
Potential message bikeshed aside:
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2017-04-28 7:41 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-27 23:12 [PATCH v7 00/20] Gen8+ engine-reset Michel Thierry
2017-04-27 23:12 ` [PATCH v7 01/20] drm/i915: Update i915.reset to handle engine resets Michel Thierry
2017-04-27 23:12 ` [PATCH v7 02/20] drm/i915: Modify error handler for per engine hang recovery Michel Thierry
2017-04-29 14:19 ` Chris Wilson
2017-05-08 18:31 ` Michel Thierry
2017-05-12 20:55 ` Michel Thierry
2017-05-12 21:09 ` Chris Wilson
2017-05-12 21:23 ` Michel Thierry
2017-05-15 21:14 ` [PATCH " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 03/20] drm/i915: Add support for per engine reset recovery Michel Thierry
2017-04-27 23:50 ` Chris Wilson
2017-04-28 21:59 ` Michel Thierry
2017-05-04 0:26 ` Michel Thierry
2017-05-15 21:18 ` [PATCH " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 04/20] drm/i915: Skip reset request if there is one already Michel Thierry
2017-04-29 14:21 ` Chris Wilson
2017-05-01 21:15 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 05/20] drm/i915: Cancel reset-engine if we couldn't find an active request Michel Thierry
2017-04-29 14:26 ` Chris Wilson
2017-05-15 21:20 ` [PATCH " Michel Thierry
2017-05-15 21:31 ` Chris Wilson
2017-05-15 21:47 ` Chris Wilson
2017-05-15 22:25 ` Michel Thierry
2017-05-16 7:54 ` Chris Wilson
2017-05-17 0:13 ` Michel Thierry
2017-05-17 7:19 ` Chris Wilson
2017-05-17 20:41 ` [PATCH] " Michel Thierry
2017-05-17 20:52 ` Chris Wilson
2017-05-18 1:11 ` Michel Thierry
2017-05-18 7:56 ` Chris Wilson
2017-05-18 17:19 ` Michel Thierry
2017-05-18 18:22 ` [PATCH] drm/i915: Look for active requests earlier in the reset path Michel Thierry
2017-05-18 18:26 ` Michel Thierry
2017-05-18 19:55 ` Chris Wilson
2017-05-18 21:11 ` Michel Thierry
2017-05-18 21:16 ` Chris Wilson
2017-05-18 21:34 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 06/20] drm/i915: Add engine reset count to error state Michel Thierry
2017-04-27 23:12 ` [PATCH v7 07/20] drm/i915: Export per-engine reset count info to debugfs Michel Thierry
2017-04-27 23:12 ` [PATCH v7 08/20] drm/i915: Enable Engine reset and recovery support Michel Thierry
2017-04-27 23:12 ` [PATCH v7 09/20] drm/i915: Add engine reset count in get-reset-stats ioctl Michel Thierry
2017-04-27 23:12 ` [PATCH v7 10/20] drm/i915/selftests: reset engine self tests Michel Thierry
2017-04-27 23:12 ` [PATCH v7 11/20] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder Michel Thierry
2017-04-27 23:12 ` [PATCH v7 12/20] drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry
2017-04-27 23:58 ` Chris Wilson
2017-04-28 15:36 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 13/20] drm/i915/guc: Rename the function that resets the GuC Michel Thierry
2017-04-28 7:40 ` Tvrtko Ursulin [this message]
2017-05-01 20:09 ` Michel Thierry
2017-04-27 23:12 ` [PATCH v7 14/20] drm/i915/guc: Add support for reset engine using GuC commands Michel Thierry
2017-04-27 23:12 ` [PATCH v7 15/20] drm/i915: Watchdog timeout: Pass GuC shared data structure during param load Michel Thierry
2017-04-27 23:12 ` [PATCH v7 16/20] drm/i915: Watchdog timeout: IRQ handler for gen8+ Michel Thierry
2017-04-27 23:12 ` [PATCH v7 17/20] drm/i915: Watchdog timeout: Ringbuffer command emission " Michel Thierry
2017-04-27 23:12 ` [PATCH v7 18/20] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Michel Thierry
2017-04-27 23:12 ` [PATCH v7 19/20] drm/i915: Watchdog timeout: Include threshold value in error state Michel Thierry
2017-04-27 23:13 ` [PATCH v7 20/20] drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Michel Thierry
2017-04-27 23:30 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev4) Patchwork
2017-05-15 21:32 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev5) Patchwork
2017-05-15 21:48 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev7) Patchwork
2017-05-17 21:09 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev8) Patchwork
2017-05-18 18:40 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev9) Patchwork
2017-05-18 21:29 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev10) Patchwork
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