From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v9 10/21] drm/i915: Add engine reset count in get-reset-stats ioctl
Date: Thu, 15 Jun 2017 13:18:17 -0700 [thread overview]
Message-ID: <20170615201828.23144-11-michel.thierry@intel.com> (raw)
In-Reply-To: <20170615201828.23144-1-michel.thierry@intel.com>
Users/tests relying on the total reset count will start seeing a smaller
number since most of the hangs can be handled by engine reset.
Note that if reset engine x, context a running on engine y will be unaware
and unaffected.
To start the discussion, include just a total engine reset count. If it
is deemed useful, it can be extended to report each engine separately.
Our igt's gem_reset_stats test will need changes to ignore the pad field,
since it can now return reset_engine_count.
v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility.
v3: Keep rejecting attempts to use pad as input (Antonio)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 ++++++++++--
include/uapi/drm/i915_drm.h | 6 +++++-
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index c5d1666d7071..04766fdcc4dc 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -1029,6 +1029,8 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_reset_stats *args = data;
struct i915_gem_context *ctx;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
int ret;
if (args->flags || args->pad)
@@ -1047,10 +1049,16 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
return PTR_ERR(ctx);
}
- if (capable(CAP_SYS_ADMIN))
+ if (capable(CAP_SYS_ADMIN)) {
args->reset_count = i915_reset_count(&dev_priv->gpu_error);
- else
+ for_each_engine(engine, dev_priv, id)
+ args->reset_engine_count +=
+ i915_reset_engine_count(&dev_priv->gpu_error,
+ engine);
+ } else {
args->reset_count = 0;
+ args->reset_engine_count = 0;
+ }
args->batch_active = ctx->guilty_count;
args->batch_pending = ctx->active_count;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 15bc9f78ba4d..c599d47629ac 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1286,7 +1286,11 @@ struct drm_i915_reset_stats {
/* Number of batches lost pending for execution, for this context */
__u32 batch_pending;
- __u32 pad;
+ union {
+ __u32 pad;
+ /* Engine resets since boot/module reload, for all contexts */
+ __u32 reset_engine_count;
+ };
};
struct drm_i915_gem_userptr {
--
2.11.0
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next prev parent reply other threads:[~2017-06-15 20:18 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-15 20:18 [PATCH v9 00/21] Gen8+ engine-reset Michel Thierry
2017-06-15 20:18 ` [PATCH v9 01/21] drm/i915: Look for active requests earlier in the reset path Michel Thierry
2017-06-15 20:18 ` [PATCH v9 02/21] drm/i915: Update i915.reset to handle engine resets Michel Thierry
2017-06-15 20:18 ` [PATCH v9 03/21] drm/i915: Modify error handler for per engine hang recovery Michel Thierry
2017-06-15 20:18 ` [PATCH v9 04/21] drm/i915: Include reset engine information in has_gpu_reset getparam Michel Thierry
2017-06-15 20:18 ` [PATCH v9 05/21] drm/i915: Add support for per engine reset recovery Michel Thierry
2017-06-19 12:31 ` Chris Wilson
2017-06-19 12:46 ` Chris Wilson
2017-06-19 18:42 ` Michel Thierry
2017-06-15 20:18 ` [PATCH v9 06/21] drm/i915: Add engine reset count to error state Michel Thierry
2017-06-15 20:18 ` [PATCH v9 07/21] drm/i915: Export per-engine reset count info to debugfs Michel Thierry
2017-06-15 20:18 ` [PATCH v9 RFC 08/21] drm/i915: Carry on with reset even if hw engine is not ready Michel Thierry
2017-06-15 20:18 ` [PATCH v9 09/21] drm/i915: Enable Engine reset and recovery support Michel Thierry
2017-06-15 20:18 ` Michel Thierry [this message]
2017-06-15 21:14 ` [PATCH v9 10/21] drm/i915: Add engine reset count in get-reset-stats ioctl Chris Wilson
2017-06-15 21:23 ` Michel Thierry
2017-06-15 20:18 ` [PATCH v9 11/21] drm/i915/selftests: reset engine self tests Michel Thierry
2017-06-15 20:18 ` [PATCH v9 12/21] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder Michel Thierry
2017-06-15 20:18 ` [PATCH v9 13/21] drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry
2017-06-15 20:18 ` [PATCH v9 14/21] drm/i915/guc: Rename the function that resets the GuC Michel Thierry
2017-06-15 20:18 ` [PATCH v9 15/21] drm/i915/guc: Add support for reset engine using GuC commands Michel Thierry
2017-06-15 20:18 ` [PATCH v9 16/21] drm/i915: Watchdog timeout: Pass GuC shared data structure during param load Michel Thierry
2017-06-15 20:18 ` [PATCH v9 17/21] drm/i915: Watchdog timeout: IRQ handler for gen8+ Michel Thierry
2017-06-15 20:18 ` [PATCH v9 18/21] drm/i915: Watchdog timeout: Ringbuffer command emission " Michel Thierry
2017-06-15 20:18 ` [PATCH v9 19/21] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Michel Thierry
2017-06-15 20:18 ` [PATCH v9 20/21] drm/i915: Watchdog timeout: Include threshold value in error state Michel Thierry
2017-06-15 20:18 ` [PATCH v9 21/21] drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Michel Thierry
2017-06-15 20:42 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev13) Patchwork
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