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From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v9 20/21] drm/i915: Watchdog timeout: Include threshold value in error state
Date: Thu, 15 Jun 2017 13:18:27 -0700	[thread overview]
Message-ID: <20170615201828.23144-21-michel.thierry@intel.com> (raw)
In-Reply-To: <20170615201828.23144-1-michel.thierry@intel.com>

Save the watchdog threshold (in us) as part of the engine state.

v2: Only do it for gen8+ (and prevent a missing-case warn).

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  1 +
 drivers/gpu/drm/i915/i915_gpu_error.c | 12 ++++++++----
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d9bf4c303b6..b11bd181ff4c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -963,6 +963,7 @@ struct i915_gpu_state {
 			int ban_score;
 			int active;
 			int guilty;
+			int watchdog_threshold;
 		} context;
 
 		struct drm_i915_error_object {
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index ebd5501ec134..515fedb61751 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -388,9 +388,11 @@ static void error_print_context(struct drm_i915_error_state_buf *m,
 				const char *header,
 				const struct drm_i915_error_context *ctx)
 {
-	err_printf(m, "%s%s[%d] user_handle %d hw_id %d, ban score %d guilty %d active %d\n",
+	err_printf(m, "%s%s[%d] user_handle %d hw_id %d, ban score %d guilty %d active %d, watchdog %dus\n",
 		   header, ctx->comm, ctx->pid, ctx->handle, ctx->hw_id,
-		   ctx->ban_score, ctx->guilty, ctx->active);
+		   ctx->ban_score, ctx->guilty, ctx->active,
+		   INTEL_GEN(m->i915) >= 8 ?
+			watchdog_to_us(m->i915, ctx->watchdog_threshold) : 0);
 }
 
 static void error_print_engine(struct drm_i915_error_state_buf *m,
@@ -1349,7 +1351,8 @@ static void error_record_engine_execlists(struct intel_engine_cs *engine,
 }
 
 static void record_context(struct drm_i915_error_context *e,
-			   struct i915_gem_context *ctx)
+			   struct i915_gem_context *ctx,
+			   u32 engine_id)
 {
 	if (ctx->pid) {
 		struct task_struct *task;
@@ -1368,6 +1371,7 @@ static void record_context(struct drm_i915_error_context *e,
 	e->ban_score = ctx->ban_score;
 	e->guilty = ctx->guilty_count;
 	e->active = ctx->active_count;
+	e->watchdog_threshold =	ctx->engine[engine_id].watchdog_threshold;
 }
 
 static void request_record_user_bo(struct drm_i915_gem_request *request,
@@ -1431,7 +1435,7 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
 			ee->vm = request->ctx->ppgtt ?
 				&request->ctx->ppgtt->base : &ggtt->base;
 
-			record_context(&ee->context, request->ctx);
+			record_context(&ee->context, request->ctx, engine->id);
 
 			/* We need to copy these to an anonymous buffer
 			 * as the simplest method to avoid being overwritten
-- 
2.11.0

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  parent reply	other threads:[~2017-06-15 20:18 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-15 20:18 [PATCH v9 00/21] Gen8+ engine-reset Michel Thierry
2017-06-15 20:18 ` [PATCH v9 01/21] drm/i915: Look for active requests earlier in the reset path Michel Thierry
2017-06-15 20:18 ` [PATCH v9 02/21] drm/i915: Update i915.reset to handle engine resets Michel Thierry
2017-06-15 20:18 ` [PATCH v9 03/21] drm/i915: Modify error handler for per engine hang recovery Michel Thierry
2017-06-15 20:18 ` [PATCH v9 04/21] drm/i915: Include reset engine information in has_gpu_reset getparam Michel Thierry
2017-06-15 20:18 ` [PATCH v9 05/21] drm/i915: Add support for per engine reset recovery Michel Thierry
2017-06-19 12:31   ` Chris Wilson
2017-06-19 12:46   ` Chris Wilson
2017-06-19 18:42     ` Michel Thierry
2017-06-15 20:18 ` [PATCH v9 06/21] drm/i915: Add engine reset count to error state Michel Thierry
2017-06-15 20:18 ` [PATCH v9 07/21] drm/i915: Export per-engine reset count info to debugfs Michel Thierry
2017-06-15 20:18 ` [PATCH v9 RFC 08/21] drm/i915: Carry on with reset even if hw engine is not ready Michel Thierry
2017-06-15 20:18 ` [PATCH v9 09/21] drm/i915: Enable Engine reset and recovery support Michel Thierry
2017-06-15 20:18 ` [PATCH v9 10/21] drm/i915: Add engine reset count in get-reset-stats ioctl Michel Thierry
2017-06-15 21:14   ` Chris Wilson
2017-06-15 21:23     ` Michel Thierry
2017-06-15 20:18 ` [PATCH v9 11/21] drm/i915/selftests: reset engine self tests Michel Thierry
2017-06-15 20:18 ` [PATCH v9 12/21] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder Michel Thierry
2017-06-15 20:18 ` [PATCH v9 13/21] drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry
2017-06-15 20:18 ` [PATCH v9 14/21] drm/i915/guc: Rename the function that resets the GuC Michel Thierry
2017-06-15 20:18 ` [PATCH v9 15/21] drm/i915/guc: Add support for reset engine using GuC commands Michel Thierry
2017-06-15 20:18 ` [PATCH v9 16/21] drm/i915: Watchdog timeout: Pass GuC shared data structure during param load Michel Thierry
2017-06-15 20:18 ` [PATCH v9 17/21] drm/i915: Watchdog timeout: IRQ handler for gen8+ Michel Thierry
2017-06-15 20:18 ` [PATCH v9 18/21] drm/i915: Watchdog timeout: Ringbuffer command emission " Michel Thierry
2017-06-15 20:18 ` [PATCH v9 19/21] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Michel Thierry
2017-06-15 20:18 ` Michel Thierry [this message]
2017-06-15 20:18 ` [PATCH v9 21/21] drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Michel Thierry
2017-06-15 20:42 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev13) Patchwork

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