* [PATCH] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
@ 2018-02-12 21:37 Chris Wilson
2018-02-12 22:16 ` ✗ Fi.CI.BAT: warning for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Chris Wilson @ 2018-02-12 21:37 UTC (permalink / raw)
To: intel-gfx
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 65 ++++++++++++++++++++++---------------
1 file changed, 38 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index e098e4b2c85c..dd8c1f24980f 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -74,6 +74,14 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
#define VBLANK_EVASION_TIME_US 100
#endif
+static inline bool scanline_in_vblank(struct intel_crtc *crtc,
+ int min, int max,
+ int *scanline)
+{
+ *scanline = intel_get_crtc_scanline(crtc);
+ return *scanline < min && *scanline > max;
+}
+
/**
* intel_pipe_update_start() - start update of a set of display registers
* @new_crtc_state: the new crtc state
@@ -91,12 +99,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode;
- long timeout = msecs_to_jiffies_timeout(1);
int scanline, min, max, vblank_start;
- wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
- DEFINE_WAIT(wait);
vblank_start = adjusted_mode->crtc_vblank_start;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
@@ -112,41 +117,46 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
if (min <= 0 || max <= 0)
return;
- if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
- return;
-
crtc->debug.min_vbl = min;
crtc->debug.max_vbl = max;
trace_i915_pipe_update_start(crtc);
- for (;;) {
- /*
- * prepare_to_wait() has a memory barrier, which guarantees
- * other CPUs can see the task state update by the time we
- * read the scanline.
- */
- prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
+ if (!scanline_in_vblank(crtc, min, max, &scanline)) {
+ wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
+ long timeout = msecs_to_jiffies_timeout(1);
+ DEFINE_WAIT(wait);
- scanline = intel_get_crtc_scanline(crtc);
- if (scanline < min || scanline > max)
- break;
+ if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
+ goto skip_evade;
- if (timeout <= 0) {
- DRM_ERROR("Potential atomic update failure on pipe %c\n",
- pipe_name(crtc->pipe));
- break;
- }
+ for (;;) {
+ /*
+ * prepare_to_wait() has a memory barrier, which
+ * guarantees other CPUs can see the task state update
+ * by the time we read the scanline.
+ */
+ prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
- local_irq_enable();
+ if (scanline_in_vblank(crtc, min, max, &scanline))
+ break;
- timeout = schedule_timeout(timeout);
+ if (timeout <= 0) {
+ DRM_ERROR("Potential atomic update failure on pipe %c\n",
+ pipe_name(crtc->pipe));
+ break;
+ }
- local_irq_disable();
- }
+ local_irq_enable();
- finish_wait(wq, &wait);
+ timeout = schedule_timeout(timeout);
- drm_crtc_vblank_put(&crtc->base);
+ local_irq_disable();
+ }
+
+ finish_wait(wq, &wait);
+
+ drm_crtc_vblank_put(&crtc->base);
+ }
/*
* On VLV/CHV DSI the scanline counter would appear to
@@ -166,6 +176,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
while (need_vlv_dsi_wa && scanline == vblank_start)
scanline = intel_get_crtc_scanline(crtc);
+skip_evade:
crtc->debug.scanline_start = scanline;
crtc->debug.start_vbl_time = ktime_get();
crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
--
2.16.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: warning for RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
2018-02-12 21:37 [PATCH] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade Chris Wilson
@ 2018-02-12 22:16 ` Patchwork
2018-02-12 22:21 ` [PATCH v2] " Chris Wilson
2018-02-12 22:53 ` ✗ Fi.CI.BAT: failure for RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade (rev2) Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-02-12 22:16 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
URL : https://patchwork.freedesktop.org/series/38109/
State : warning
== Summary ==
Series 38109v1 RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
https://patchwork.freedesktop.org/api/1.0/series/38109/revisions/1/mbox/
Test core_auth:
Subgroup basic-auth:
pass -> DMESG-WARN (fi-gdg-551)
pass -> DMESG-WARN (fi-blb-e6850)
pass -> DMESG-WARN (fi-pnv-d510)
pass -> DMESG-WARN (fi-bwr-2160)
pass -> DMESG-WARN (fi-elk-e7500)
pass -> DMESG-WARN (fi-ilk-650)
pass -> DMESG-WARN (fi-snb-2520m)
pass -> DMESG-WARN (fi-snb-2600)
pass -> DMESG-WARN (fi-ivb-3520m)
pass -> DMESG-WARN (fi-ivb-3770)
pass -> DMESG-WARN (fi-byt-j1900)
pass -> DMESG-WARN (fi-byt-n2820)
pass -> DMESG-WARN (fi-hsw-4770)
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
pass -> DMESG-WARN (fi-bsw-n3050)
pass -> DMESG-WARN (fi-skl-6260u)
pass -> DMESG-WARN (fi-skl-6600u)
pass -> DMESG-WARN (fi-skl-6700hq)
pass -> DMESG-WARN (fi-skl-6700k2)
pass -> DMESG-WARN (fi-skl-6770hq)
pass -> DMESG-WARN (fi-skl-guc)
pass -> DMESG-WARN (fi-skl-gvtdvm)
pass -> DMESG-WARN (fi-bxt-j4205)
pass -> DMESG-WARN (fi-kbl-7500u)
pass -> DMESG-WARN (fi-kbl-7560u)
pass -> DMESG-WARN (fi-kbl-r)
pass -> DMESG-WARN (fi-glk-1)
pass -> DMESG-WARN (fi-cfl-s2)
pass -> DMESG-WARN (fi-cnl-y3)
Test core_prop_blob:
Subgroup basic:
pass -> DMESG-WARN (fi-gdg-551)
pass -> DMESG-WARN (fi-blb-e6850)
pass -> DMESG-WARN (fi-pnv-d510)
pass -> DMESG-WARN (fi-bwr-2160)
pass -> DMESG-WARN (fi-elk-e7500)
pass -> DMESG-WARN (fi-ilk-650)
pass -> DMESG-WARN (fi-snb-2520m)
pass -> DMESG-WARN (fi-snb-2600)
pass -> DMESG-WARN (fi-ivb-3520m)
pass -> DMESG-WARN (fi-ivb-3770)
pass -> DMESG-WARN (fi-byt-j1900)
pass -> DMESG-WARN (fi-byt-n2820)
pass -> DMESG-WARN (fi-hsw-4770)
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
pass -> DMESG-WARN (fi-bsw-n3050)
pass -> DMESG-WARN (fi-skl-6260u)
pass -> DMESG-WARN (fi-skl-6600u)
pass -> DMESG-WARN (fi-skl-6700hq)
pass -> DMESG-WARN (fi-skl-6700k2)
pass -> DMESG-WARN (fi-skl-6770hq)
pass -> DMESG-WARN (fi-skl-guc)
pass -> DMESG-WARN (fi-skl-gvtdvm)
pass -> DMESG-WARN (fi-bxt-j4205)
pass -> DMESG-WARN (fi-kbl-7500u)
pass -> DMESG-WARN (fi-kbl-7560u)
pass -> DMESG-WARN (fi-kbl-r)
pass -> DMESG-WARN (fi-glk-1)
pass -> DMESG-WARN (fi-cfl-s2)
pass -> DMESG-WARN (fi-cnl-y3)
Test debugfs_test:
Subgroup read_all_entries:
pass -> DMESG-WARN (fi-gdg-551)
pass -> DMESG-WARN (fi-blb-e6850)
pass -> DMESG-WARN (fi-pnv-d510)
pass -> DMESG-WARN (fi-bwr-2160)
pass -> DMESG-WARN (fi-elk-e7500) fdo#103989 +16
pass -> DMESG-WARN (fi-ilk-650)
pass -> DMESG-WARN (fi-snb-2520m) fdo#103713 +1
pass -> DMESG-WARN (fi-snb-2600)
pass -> DMESG-WARN (fi-ivb-3520m)
pass -> DMESG-WARN (fi-ivb-3770)
pass -> DMESG-WARN (fi-byt-j1900)
pass -> DMESG-WARN (fi-byt-n2820)
pass -> DMESG-WARN (fi-hsw-4770)
pass -> DMESG-WARN (fi-bdw-5557u)
pass -> DMESG-WARN (fi-bdw-gvtdvm)
pass -> DMESG-WARN (fi-bsw-n3050)
pass -> DMESG-WARN (fi-skl-6260u)
pass -> DMESG-WARN (fi-skl-6600u)
pass -> DMESG-WARN (fi-skl-6700hq)
pass -> DMESG-WARN (fi-skl-6700k2)
pass -> DMESG-WARN (fi-skl-6770hq)
pass -> DMESG-WARN (fi-skl-guc)
pass -> DMESG-WARN (fi-skl-gvtdvm)
pass -> DMESG-WARN (fi-bxt-j4205)
pass -> DMESG-WARN (fi-kbl-7500u)
pass -> DMESG-WARN (fi-kbl-7560u)
pass -> DMESG-WARN (fi-kbl-r)
pass -> DMESG-WARN (fi-glk-1)
pass -> DMESG-WARN (fi-cfl-s2)
pass -> DMESG-WARN (fi-cnl-y3)
Test drv_getparams_basic:
WARNING: Long output truncated
83878f486e686dd291ef3566a45103962d7617ed drm-tip: 2018y-02m-12d-17h-43m-07s UTC integration manifest
947897bba50b RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7987/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
2018-02-12 21:37 [PATCH] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade Chris Wilson
2018-02-12 22:16 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2018-02-12 22:21 ` Chris Wilson
2018-02-13 13:01 ` Ville Syrjälä
2018-02-12 22:53 ` ✗ Fi.CI.BAT: failure for RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade (rev2) Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2018-02-12 22:21 UTC (permalink / raw)
To: intel-gfx
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 65 ++++++++++++++++++++++---------------
1 file changed, 38 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index e098e4b2c85c..ad707c97a9d9 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -74,6 +74,14 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
#define VBLANK_EVASION_TIME_US 100
#endif
+static inline bool scanline_in_vblank(struct intel_crtc *crtc,
+ int min, int max,
+ int *scanline)
+{
+ *scanline = intel_get_crtc_scanline(crtc);
+ return *scanline < min || *scanline > max;
+}
+
/**
* intel_pipe_update_start() - start update of a set of display registers
* @new_crtc_state: the new crtc state
@@ -91,12 +99,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode;
- long timeout = msecs_to_jiffies_timeout(1);
int scanline, min, max, vblank_start;
- wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
- DEFINE_WAIT(wait);
vblank_start = adjusted_mode->crtc_vblank_start;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
@@ -112,41 +117,46 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
if (min <= 0 || max <= 0)
return;
- if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
- return;
-
crtc->debug.min_vbl = min;
crtc->debug.max_vbl = max;
trace_i915_pipe_update_start(crtc);
- for (;;) {
- /*
- * prepare_to_wait() has a memory barrier, which guarantees
- * other CPUs can see the task state update by the time we
- * read the scanline.
- */
- prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
+ if (!scanline_in_vblank(crtc, min, max, &scanline)) {
+ wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
+ long timeout = msecs_to_jiffies_timeout(1);
+ DEFINE_WAIT(wait);
- scanline = intel_get_crtc_scanline(crtc);
- if (scanline < min || scanline > max)
- break;
+ if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
+ goto skip_evade;
- if (timeout <= 0) {
- DRM_ERROR("Potential atomic update failure on pipe %c\n",
- pipe_name(crtc->pipe));
- break;
- }
+ for (;;) {
+ /*
+ * prepare_to_wait() has a memory barrier, which
+ * guarantees other CPUs can see the task state update
+ * by the time we read the scanline.
+ */
+ prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
- local_irq_enable();
+ if (scanline_in_vblank(crtc, min, max, &scanline))
+ break;
- timeout = schedule_timeout(timeout);
+ if (timeout <= 0) {
+ DRM_ERROR("Potential atomic update failure on pipe %c\n",
+ pipe_name(crtc->pipe));
+ break;
+ }
- local_irq_disable();
- }
+ local_irq_enable();
- finish_wait(wq, &wait);
+ timeout = schedule_timeout(timeout);
- drm_crtc_vblank_put(&crtc->base);
+ local_irq_disable();
+ }
+
+ finish_wait(wq, &wait);
+
+ drm_crtc_vblank_put(&crtc->base);
+ }
/*
* On VLV/CHV DSI the scanline counter would appear to
@@ -166,6 +176,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
while (need_vlv_dsi_wa && scanline == vblank_start)
scanline = intel_get_crtc_scanline(crtc);
+skip_evade:
crtc->debug.scanline_start = scanline;
crtc->debug.start_vbl_time = ktime_get();
crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
--
2.16.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: failure for RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade (rev2)
2018-02-12 21:37 [PATCH] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade Chris Wilson
2018-02-12 22:16 ` ✗ Fi.CI.BAT: warning for " Patchwork
2018-02-12 22:21 ` [PATCH v2] " Chris Wilson
@ 2018-02-12 22:53 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-02-12 22:53 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade (rev2)
URL : https://patchwork.freedesktop.org/series/38109/
State : failure
== Summary ==
Series 38109v2 RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
https://patchwork.freedesktop.org/api/1.0/series/38109/revisions/2/mbox/
Test prime_vgem:
Subgroup basic-fence-flip:
fail -> PASS (fi-ilk-650)
pass -> FAIL (fi-ivb-3770)
fi-bdw-5557u total:288 pass:265 dwarn:0 dfail:0 fail:2 skip:21 time:441s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:424s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:376s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:498s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:289s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:484s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:487s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:475s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:462s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:569s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:580s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:420s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:288s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:514s
fi-hsw-4770 total:288 pass:259 dwarn:0 dfail:0 fail:2 skip:27 time:413s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:417s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:459s
fi-ivb-3770 total:288 pass:254 dwarn:0 dfail:0 fail:1 skip:33 time:414s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:458s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:492s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:503s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:589s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:435s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:511s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:529s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:496s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:486s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:415s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:527s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:398s
Blacklisted hosts:
fi-glk-dsi total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:26
83878f486e686dd291ef3566a45103962d7617ed drm-tip: 2018y-02m-12d-17h-43m-07s UTC integration manifest
0cdeaaf88e2a RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7988/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade
2018-02-12 22:21 ` [PATCH v2] " Chris Wilson
@ 2018-02-13 13:01 ` Ville Syrjälä
0 siblings, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2018-02-13 13:01 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Mon, Feb 12, 2018 at 10:21:11PM +0000, Chris Wilson wrote:
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 65 ++++++++++++++++++++++---------------
> 1 file changed, 38 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index e098e4b2c85c..ad707c97a9d9 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -74,6 +74,14 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
> #define VBLANK_EVASION_TIME_US 100
> #endif
>
> +static inline bool scanline_in_vblank(struct intel_crtc *crtc,
> + int min, int max,
> + int *scanline)
The function name is wrong. Not sure what to call it really.
scanline_ok(), or reverse the condition and call it
scanline_bad() or scanline_in_danger_zone() (cue Kenny Loggins)?
> +{
> + *scanline = intel_get_crtc_scanline(crtc);
> + return *scanline < min || *scanline > max;
> +}
> +
> /**
> * intel_pipe_update_start() - start update of a set of display registers
> * @new_crtc_state: the new crtc state
> @@ -91,12 +99,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
> struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode;
> - long timeout = msecs_to_jiffies_timeout(1);
> int scanline, min, max, vblank_start;
> - wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
> bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
> - DEFINE_WAIT(wait);
>
> vblank_start = adjusted_mode->crtc_vblank_start;
> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> @@ -112,41 +117,46 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
> if (min <= 0 || max <= 0)
> return;
>
> - if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
> - return;
> -
> crtc->debug.min_vbl = min;
> crtc->debug.max_vbl = max;
> trace_i915_pipe_update_start(crtc);
>
> - for (;;) {
> - /*
> - * prepare_to_wait() has a memory barrier, which guarantees
> - * other CPUs can see the task state update by the time we
> - * read the scanline.
> - */
> - prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
> + if (!scanline_in_vblank(crtc, min, max, &scanline)) {
'goto skip_evade' to avoid messing with the loop indentation?
> + wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
> + long timeout = msecs_to_jiffies_timeout(1);
> + DEFINE_WAIT(wait);
>
> - scanline = intel_get_crtc_scanline(crtc);
> - if (scanline < min || scanline > max)
> - break;
> + if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
> + goto skip_evade;
>
> - if (timeout <= 0) {
> - DRM_ERROR("Potential atomic update failure on pipe %c\n",
> - pipe_name(crtc->pipe));
> - break;
> - }
> + for (;;) {
> + /*
> + * prepare_to_wait() has a memory barrier, which
> + * guarantees other CPUs can see the task state update
> + * by the time we read the scanline.
> + */
> + prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
>
> - local_irq_enable();
> + if (scanline_in_vblank(crtc, min, max, &scanline))
> + break;
>
> - timeout = schedule_timeout(timeout);
> + if (timeout <= 0) {
> + DRM_ERROR("Potential atomic update failure on pipe %c\n",
> + pipe_name(crtc->pipe));
> + break;
> + }
>
> - local_irq_disable();
> - }
> + local_irq_enable();
>
> - finish_wait(wq, &wait);
> + timeout = schedule_timeout(timeout);
>
> - drm_crtc_vblank_put(&crtc->base);
> + local_irq_disable();
> + }
> +
> + finish_wait(wq, &wait);
> +
> + drm_crtc_vblank_put(&crtc->base);
> + }
>
> /*
> * On VLV/CHV DSI the scanline counter would appear to
> @@ -166,6 +176,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
> while (need_vlv_dsi_wa && scanline == vblank_start)
> scanline = intel_get_crtc_scanline(crtc);
I think we'll need to do the dsi w/a regardless, so the label should be
before it.
>
> +skip_evade:
> crtc->debug.scanline_start = scanline;
> crtc->debug.start_vbl_time = ktime_get();
> crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
> --
> 2.16.1
--
Ville Syrjälä
Intel OTC
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-02-13 13:01 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-12 21:37 [PATCH] RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade Chris Wilson
2018-02-12 22:16 ` ✗ Fi.CI.BAT: warning for " Patchwork
2018-02-12 22:21 ` [PATCH v2] " Chris Wilson
2018-02-13 13:01 ` Ville Syrjälä
2018-02-12 22:53 ` ✗ Fi.CI.BAT: failure for RFC drm/i915: Only acquire vblank-irq when waiting for vblank evade (rev2) Patchwork
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