From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 0/3] CNL port refactoring
Date: Thu, 15 Feb 2018 15:26:40 +0530 [thread overview]
Message-ID: <20180215095643.3844-1-mahesh1.kumar@intel.com> (raw)
This series fixes CNL PORT_TX_DW5/7_LNO_D register address.
This series also introduces macros to get register address of
CNL_PORT_TX registers instead of defining for each DW instance.
Mahesh Kumar (3):
drm/i915/cnl: Fix PORT_TX_DW5/7 register address
drm/i915/cnl; Add macro to get PORT_TX register
drm/i915/cnl: Replace PORT_TX register macros with new ones
drivers/gpu/drm/i915/i915_reg.h | 135 ++++++++++++----------------------------
1 file changed, 39 insertions(+), 96 deletions(-)
--
2.14.1
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next reply other threads:[~2018-02-15 9:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-15 9:56 Mahesh Kumar [this message]
2018-02-15 9:56 ` [PATCH 1/3] drm/i915/cnl: Fix PORT_TX_DW5/7 register address Mahesh Kumar
2018-02-15 14:02 ` Jani Nikula
2018-02-15 23:43 ` Rodrigo Vivi
2018-02-16 17:57 ` Rodrigo Vivi
2018-02-15 9:56 ` [PATCH 2/3] drm/i915/cnl; Add macro to get PORT_TX register Mahesh Kumar
2018-02-15 9:56 ` [PATCH 3/3] drm/i915/cnl: Replace PORT_TX register macros with new ones Mahesh Kumar
2018-02-15 10:01 ` ✗ Fi.CI.CHECKPATCH: warning for CNL port refactoring Patchwork
2018-02-15 10:16 ` ✓ Fi.CI.BAT: success " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-03-09 12:58 [PATCH 0/3] " Mahesh Kumar
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