[PATCH 1/8] drm/i915: Use the correct power domain for aux ch

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* [PATCH 1/8] drm/i915: Use the correct power domain for aux ch
@ 2018-02-22 18:10 Ville Syrjala
  2018-02-22 18:10 ` [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it Ville Syrjala
                   ` (11 more replies)
  0 siblings, 12 replies; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Select the aux power domain based on the aux ch rather than based on
the port. Now we can rid ourselves of the port E FIXME as well.

v2: Split from the enum aux_ch patch (Rodrigo)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> #v1
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f20b25f98e5a..af1ee5e97d17 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6277,7 +6277,7 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
 
 	encoder->hpd_pin = intel_hpd_pin_default(dev_priv, encoder->port);
 
-	switch (encoder->port) {
+	switch (intel_aux_port(dev_priv, encoder->port)) {
 	case PORT_A:
 		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
 		break;
@@ -6290,10 +6290,6 @@ intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
 	case PORT_D:
 		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
 		break;
-	case PORT_E:
-		/* FIXME: Check VBT for actual wiring of PORT E */
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
-		break;
 	case PORT_F:
 		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
 		break;
-- 
2.13.6

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^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-22 18:10 ` [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp Ville Syrjala
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Since we no longer have a 1:1 correspondence between ports and AUX
channels, let's give AUX channels their own enum. Makes it easier
to tell the apples from the oranges, and we get rid of the
port E AUX power domain FIXME since we now derive the power domain
from the actual AUX CH.

v2: Rebase due to AUX F
v3: Split out the power domain fix (Rodrigo)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> #v2
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> #v2
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |   8 +-
 drivers/gpu/drm/i915/intel_display.h |  11 ++
 drivers/gpu/drm/i915/intel_dp.c      | 236 +++++++++++++++++------------------
 drivers/gpu/drm/i915/intel_drv.h     |   1 +
 4 files changed, 131 insertions(+), 125 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8c12ee2f89a9..eea5b2c537d4 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5354,8 +5354,8 @@ enum {
 #define _DPF_AUX_CH_DATA4	(dev_priv->info.display_mmio_offset + 0x64520)
 #define _DPF_AUX_CH_DATA5	(dev_priv->info.display_mmio_offset + 0x64524)
 
-#define DP_AUX_CH_CTL(port)	_MMIO_PORT(port, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL)
-#define DP_AUX_CH_DATA(port, i)	_MMIO(_PORT(port, _DPA_AUX_CH_DATA1, _DPB_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
+#define DP_AUX_CH_CTL(aux_ch)	_MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL)
+#define DP_AUX_CH_DATA(aux_ch, i)	_MMIO(_PORT(aux_ch, _DPA_AUX_CH_DATA1, _DPB_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
 
 #define   DP_AUX_CH_CTL_SEND_BUSY	    (1 << 31)
 #define   DP_AUX_CH_CTL_DONE		    (1 << 30)
@@ -7882,8 +7882,8 @@ enum {
 #define _PCH_DPD_AUX_CH_DATA4	0xe4320
 #define _PCH_DPD_AUX_CH_DATA5	0xe4324
 
-#define PCH_DP_AUX_CH_CTL(port)		_MMIO_PORT((port) - PORT_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)
-#define PCH_DP_AUX_CH_DATA(port, i)	_MMIO(_PORT((port) - PORT_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
+#define PCH_DP_AUX_CH_CTL(aux_ch)		_MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)
+#define PCH_DP_AUX_CH_DATA(aux_ch, i)	_MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */
 
 /* CPT */
 #define  PORT_TRANS_A_SEL_CPT	0
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index c4042e342f50..f5733a2576e7 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -139,6 +139,17 @@ enum dpio_phy {
 
 #define I915_NUM_PHYS_VLV 2
 
+enum aux_ch {
+	AUX_CH_A,
+	AUX_CH_B,
+	AUX_CH_C,
+	AUX_CH_D,
+	_AUX_CH_E, /* does not exist */
+	AUX_CH_F,
+};
+
+#define aux_ch_name(a) ((a) + 'A')
+
 enum intel_display_power_domain {
 	POWER_DOMAIN_PIPE_A,
 	POWER_DOMAIN_PIPE_B,
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index af1ee5e97d17..eeb8a026fd08 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1331,171 +1331,194 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	return ret;
 }
 
-static enum port intel_aux_port(struct drm_i915_private *dev_priv,
-				enum port port)
+static enum aux_ch intel_aux_ch(struct intel_dp *intel_dp)
 {
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	enum port port = encoder->port;
 	const struct ddi_vbt_port_info *info =
 		&dev_priv->vbt.ddi_port_info[port];
-	enum port aux_port;
+	enum aux_ch aux_ch;
 
 	if (!info->alternate_aux_channel) {
+		aux_ch = (enum aux_ch) port;
+
 		DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
-			      port_name(port), port_name(port));
-		return port;
+			      aux_ch_name(aux_ch), port_name(port));
+		return aux_ch;
 	}
 
 	switch (info->alternate_aux_channel) {
 	case DP_AUX_A:
-		aux_port = PORT_A;
+		aux_ch = AUX_CH_A;
 		break;
 	case DP_AUX_B:
-		aux_port = PORT_B;
+		aux_ch = AUX_CH_B;
 		break;
 	case DP_AUX_C:
-		aux_port = PORT_C;
+		aux_ch = AUX_CH_C;
 		break;
 	case DP_AUX_D:
-		aux_port = PORT_D;
+		aux_ch = AUX_CH_D;
 		break;
 	case DP_AUX_F:
-		aux_port = PORT_F;
+		aux_ch = AUX_CH_F;
 		break;
 	default:
 		MISSING_CASE(info->alternate_aux_channel);
-		aux_port = PORT_A;
+		aux_ch = AUX_CH_A;
 		break;
 	}
 
 	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
-		      port_name(aux_port), port_name(port));
+		      aux_ch_name(aux_ch), port_name(port));
 
-	return aux_port;
+	return aux_ch;
+}
+
+static enum intel_display_power_domain
+intel_aux_power_domain(struct intel_dp *intel_dp)
+{
+	switch (intel_dp->aux_ch) {
+	case AUX_CH_A:
+		return POWER_DOMAIN_AUX_A;
+	case AUX_CH_B:
+		return POWER_DOMAIN_AUX_B;
+	case AUX_CH_C:
+		return POWER_DOMAIN_AUX_C;
+	case AUX_CH_D:
+		return POWER_DOMAIN_AUX_D;
+	case AUX_CH_F:
+		return POWER_DOMAIN_AUX_F;
+	default:
+		MISSING_CASE(intel_dp->aux_ch);
+		return POWER_DOMAIN_AUX_A;
+	}
 }
 
 static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum port port)
+				  enum aux_ch aux_ch)
 {
-	switch (port) {
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-		return DP_AUX_CH_CTL(port);
+	switch (aux_ch) {
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_CTL(PORT_B);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_CTL(AUX_CH_B);
 	}
 }
 
 static i915_reg_t g4x_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum port port, int index)
+				   enum aux_ch aux_ch, int index)
 {
-	switch (port) {
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-		return DP_AUX_CH_DATA(port, index);
+	switch (aux_ch) {
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_DATA(PORT_B, index);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_DATA(AUX_CH_B, index);
 	}
 }
 
 static i915_reg_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum port port)
-{
-	switch (port) {
-	case PORT_A:
-		return DP_AUX_CH_CTL(port);
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-		return PCH_DP_AUX_CH_CTL(port);
+				  enum aux_ch aux_ch)
+{
+	switch (aux_ch) {
+	case AUX_CH_A:
+		return DP_AUX_CH_CTL(aux_ch);
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+		return PCH_DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_CTL(PORT_A);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
 
 static i915_reg_t ilk_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum port port, int index)
-{
-	switch (port) {
-	case PORT_A:
-		return DP_AUX_CH_DATA(port, index);
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-		return PCH_DP_AUX_CH_DATA(port, index);
+				   enum aux_ch aux_ch, int index)
+{
+	switch (aux_ch) {
+	case AUX_CH_A:
+		return DP_AUX_CH_DATA(aux_ch, index);
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+		return PCH_DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_DATA(PORT_A, index);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
 
 static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum port port)
-{
-	switch (port) {
-	case PORT_A:
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-	case PORT_F:
-		return DP_AUX_CH_CTL(port);
+				  enum aux_ch aux_ch)
+{
+	switch (aux_ch) {
+	case AUX_CH_A:
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+	case AUX_CH_F:
+		return DP_AUX_CH_CTL(aux_ch);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_CTL(PORT_A);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_CTL(AUX_CH_A);
 	}
 }
 
 static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum port port, int index)
-{
-	switch (port) {
-	case PORT_A:
-	case PORT_B:
-	case PORT_C:
-	case PORT_D:
-	case PORT_F:
-		return DP_AUX_CH_DATA(port, index);
+				   enum aux_ch aux_ch, int index)
+{
+	switch (aux_ch) {
+	case AUX_CH_A:
+	case AUX_CH_B:
+	case AUX_CH_C:
+	case AUX_CH_D:
+	case AUX_CH_F:
+		return DP_AUX_CH_DATA(aux_ch, index);
 	default:
-		MISSING_CASE(port);
-		return DP_AUX_CH_DATA(PORT_A, index);
+		MISSING_CASE(aux_ch);
+		return DP_AUX_CH_DATA(AUX_CH_A, index);
 	}
 }
 
 static i915_reg_t intel_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				    enum port port)
+				    enum aux_ch aux_ch)
 {
 	if (INTEL_GEN(dev_priv) >= 9)
-		return skl_aux_ctl_reg(dev_priv, port);
+		return skl_aux_ctl_reg(dev_priv, aux_ch);
 	else if (HAS_PCH_SPLIT(dev_priv))
-		return ilk_aux_ctl_reg(dev_priv, port);
+		return ilk_aux_ctl_reg(dev_priv, aux_ch);
 	else
-		return g4x_aux_ctl_reg(dev_priv, port);
+		return g4x_aux_ctl_reg(dev_priv, aux_ch);
 }
 
 static i915_reg_t intel_aux_data_reg(struct drm_i915_private *dev_priv,
-				     enum port port, int index)
+				     enum aux_ch aux_ch, int index)
 {
 	if (INTEL_GEN(dev_priv) >= 9)
-		return skl_aux_data_reg(dev_priv, port, index);
+		return skl_aux_data_reg(dev_priv, aux_ch, index);
 	else if (HAS_PCH_SPLIT(dev_priv))
-		return ilk_aux_data_reg(dev_priv, port, index);
+		return ilk_aux_data_reg(dev_priv, aux_ch, index);
 	else
-		return g4x_aux_data_reg(dev_priv, port, index);
+		return g4x_aux_data_reg(dev_priv, aux_ch, index);
 }
 
 static void intel_aux_reg_init(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
-	enum port port = intel_aux_port(dev_priv,
-					dp_to_dig_port(intel_dp)->base.port);
+	enum aux_ch aux_ch = intel_dp->aux_ch;
 	int i;
 
-	intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, port);
+	intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, aux_ch);
 	for (i = 0; i < ARRAY_SIZE(intel_dp->aux_ch_data_reg); i++)
-		intel_dp->aux_ch_data_reg[i] = intel_aux_data_reg(dev_priv, port, i);
+		intel_dp->aux_ch_data_reg[i] = intel_aux_data_reg(dev_priv, aux_ch, i);
 }
 
 static void
@@ -1507,14 +1530,17 @@ intel_dp_aux_fini(struct intel_dp *intel_dp)
 static void
 intel_dp_aux_init(struct intel_dp *intel_dp)
 {
-	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-	enum port port = intel_dig_port->base.port;
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+
+	intel_dp->aux_ch = intel_aux_ch(intel_dp);
+	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
 
 	intel_aux_reg_init(intel_dp);
 	drm_dp_aux_init(&intel_dp->aux);
 
 	/* Failure to allocate our preferred name is not critical */
-	intel_dp->aux.name = kasprintf(GFP_KERNEL, "DPDDC-%c", port_name(port));
+	intel_dp->aux.name = kasprintf(GFP_KERNEL, "DPDDC-%c",
+				       port_name(encoder->port));
 	intel_dp->aux.transfer = intel_dp_aux_transfer;
 }
 
@@ -6266,38 +6292,6 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 	return false;
 }
 
-/* Set up the hotplug pin and aux power domain. */
-static void
-intel_dp_init_connector_port_info(struct intel_digital_port *intel_dig_port)
-{
-	struct intel_encoder *encoder = &intel_dig_port->base;
-	struct intel_dp *intel_dp = &intel_dig_port->dp;
-	struct intel_encoder *intel_encoder = &intel_dig_port->base;
-	struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
-
-	encoder->hpd_pin = intel_hpd_pin_default(dev_priv, encoder->port);
-
-	switch (intel_aux_port(dev_priv, encoder->port)) {
-	case PORT_A:
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
-		break;
-	case PORT_B:
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
-		break;
-	case PORT_C:
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
-		break;
-	case PORT_D:
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
-		break;
-	case PORT_F:
-		intel_dp->aux_power_domain = POWER_DOMAIN_AUX_F;
-		break;
-	default:
-		MISSING_CASE(encoder->port);
-	}
-}
-
 static void intel_dp_modeset_retry_work_fn(struct work_struct *work)
 {
 	struct intel_connector *intel_connector;
@@ -6403,7 +6397,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 		connector->interlace_allowed = true;
 	connector->doublescan_allowed = 0;
 
-	intel_dp_init_connector_port_info(intel_dig_port);
+	intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
 	intel_dp_aux_init(intel_dp);
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1535bfb7ea40..1908bbcc585a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1053,6 +1053,7 @@ struct intel_dp {
 	bool detect_done;
 	bool channel_eq_status;
 	bool reset_link_params;
+	enum aux_ch aux_ch;
 	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
-- 
2.13.6

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
  2018-02-22 18:10 ` [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-22 18:10 ` [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init() Ville Syrjala
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Just store function pointers that give us the correct register offsets
instead of storing the register offsets themselves. Slightly less
efficient perhaps but saves a few bytes and better matches how we do
things elsewhere.

v2: Keep a local array of data registers (Chris)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c  | 85 ++++++++++++++++++++--------------------
 drivers/gpu/drm/i915/intel_drv.h |  5 ++-
 2 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index eeb8a026fd08..2091ed8dfe8e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -936,7 +936,7 @@ static uint32_t
 intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
-	i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg;
+	i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);
 	uint32_t status;
 	bool done;
 
@@ -1089,7 +1089,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv =
 			to_i915(intel_dig_port->base.base.dev);
-	i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg;
+	i915_reg_t ch_ctl, ch_data[5];
 	uint32_t aux_clock_divider;
 	int i, ret, recv_bytes;
 	uint32_t status;
@@ -1097,6 +1097,10 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 	bool has_aux_irq = HAS_AUX_IRQ(dev_priv);
 	bool vdd;
 
+	ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);
+	for (i = 0; i < ARRAY_SIZE(ch_data); i++)
+		ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i);
+
 	pps_lock(intel_dp);
 
 	/*
@@ -1154,7 +1158,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 		for (try = 0; try < 5; try++) {
 			/* Load the send data into the aux channel data registers */
 			for (i = 0; i < send_bytes; i += 4)
-				I915_WRITE(intel_dp->aux_ch_data_reg[i >> 2],
+				I915_WRITE(ch_data[i >> 2],
 					   intel_dp_pack_aux(send + i,
 							     send_bytes - i));
 
@@ -1239,7 +1243,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 		recv_bytes = recv_size;
 
 	for (i = 0; i < recv_bytes; i += 4)
-		intel_dp_unpack_aux(I915_READ(intel_dp->aux_ch_data_reg[i >> 2]),
+		intel_dp_unpack_aux(I915_READ(ch_data[i >> 2]),
 				    recv + i, recv_bytes - i);
 
 	ret = recv_bytes;
@@ -1396,9 +1400,11 @@ intel_aux_power_domain(struct intel_dp *intel_dp)
 	}
 }
 
-static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum aux_ch aux_ch)
+static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_B:
 	case AUX_CH_C:
@@ -1410,9 +1416,11 @@ static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t g4x_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum aux_ch aux_ch, int index)
+static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_B:
 	case AUX_CH_C:
@@ -1424,9 +1432,11 @@ static i915_reg_t g4x_aux_data_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum aux_ch aux_ch)
+static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_A:
 		return DP_AUX_CH_CTL(aux_ch);
@@ -1440,9 +1450,11 @@ static i915_reg_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t ilk_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum aux_ch aux_ch, int index)
+static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_A:
 		return DP_AUX_CH_DATA(aux_ch, index);
@@ -1456,9 +1468,11 @@ static i915_reg_t ilk_aux_data_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				  enum aux_ch aux_ch)
+static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_A:
 	case AUX_CH_B:
@@ -1472,9 +1486,11 @@ static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
-				   enum aux_ch aux_ch, int index)
+static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	enum aux_ch aux_ch = intel_dp->aux_ch;
+
 	switch (aux_ch) {
 	case AUX_CH_A:
 	case AUX_CH_B:
@@ -1488,37 +1504,20 @@ static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static i915_reg_t intel_aux_ctl_reg(struct drm_i915_private *dev_priv,
-				    enum aux_ch aux_ch)
-{
-	if (INTEL_GEN(dev_priv) >= 9)
-		return skl_aux_ctl_reg(dev_priv, aux_ch);
-	else if (HAS_PCH_SPLIT(dev_priv))
-		return ilk_aux_ctl_reg(dev_priv, aux_ch);
-	else
-		return g4x_aux_ctl_reg(dev_priv, aux_ch);
-}
-
-static i915_reg_t intel_aux_data_reg(struct drm_i915_private *dev_priv,
-				     enum aux_ch aux_ch, int index)
-{
-	if (INTEL_GEN(dev_priv) >= 9)
-		return skl_aux_data_reg(dev_priv, aux_ch, index);
-	else if (HAS_PCH_SPLIT(dev_priv))
-		return ilk_aux_data_reg(dev_priv, aux_ch, index);
-	else
-		return g4x_aux_data_reg(dev_priv, aux_ch, index);
-}
-
 static void intel_aux_reg_init(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
-	enum aux_ch aux_ch = intel_dp->aux_ch;
-	int i;
 
-	intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, aux_ch);
-	for (i = 0; i < ARRAY_SIZE(intel_dp->aux_ch_data_reg); i++)
-		intel_dp->aux_ch_data_reg[i] = intel_aux_data_reg(dev_priv, aux_ch, i);
+	if (INTEL_GEN(dev_priv) >= 9) {
+		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
+		intel_dp->aux_ch_data_reg = skl_aux_data_reg;
+	} else if (HAS_PCH_SPLIT(dev_priv)) {
+		intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg;
+		intel_dp->aux_ch_data_reg = ilk_aux_data_reg;
+	} else {
+		intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg;
+		intel_dp->aux_ch_data_reg = g4x_aux_data_reg;
+	}
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1908bbcc585a..8f38e584d375 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1042,8 +1042,6 @@ struct intel_dp_compliance {
 
 struct intel_dp {
 	i915_reg_t output_reg;
-	i915_reg_t aux_ch_ctl_reg;
-	i915_reg_t aux_ch_data_reg[5];
 	uint32_t DP;
 	int link_rate;
 	uint8_t lane_count;
@@ -1128,6 +1126,9 @@ struct intel_dp {
 				     int send_bytes,
 				     uint32_t aux_clock_divider);
 
+	i915_reg_t (*aux_ch_ctl_reg)(struct intel_dp *dp);
+	i915_reg_t (*aux_ch_data_reg)(struct intel_dp *dp, int index);
+
 	/* This is called before a link training is starterd */
 	void (*prepare_link_retrain)(struct intel_dp *intel_dp);
 
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
  2018-02-22 18:10 ` [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it Ville Syrjala
  2018-02-22 18:10 ` [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-23 15:31   ` Ville Syrjälä
  2018-02-22 18:10 ` [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider() Ville Syrjala
                   ` (8 subsequent siblings)
  11 siblings, 1 reply; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Collect all the aux ch vfunc assignments into intel_dp_aux_init()
instead of having it spread around.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 53 +++++++++++++++++++----------------------
 1 file changed, 24 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2091ed8dfe8e..2c3eb90b9499 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1504,9 +1504,20 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 	}
 }
 
-static void intel_aux_reg_init(struct intel_dp *intel_dp)
+static void
+intel_dp_aux_fini(struct intel_dp *intel_dp)
+{
+	kfree(intel_dp->aux.name);
+}
+
+static void
+intel_dp_aux_init(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+
+	intel_dp->aux_ch = intel_aux_ch(intel_dp);
+	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
 
 	if (INTEL_GEN(dev_priv) >= 9) {
 		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
@@ -1518,23 +1529,21 @@ static void intel_aux_reg_init(struct intel_dp *intel_dp)
 		intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg;
 		intel_dp->aux_ch_data_reg = g4x_aux_data_reg;
 	}
-}
 
-static void
-intel_dp_aux_fini(struct intel_dp *intel_dp)
-{
-	kfree(intel_dp->aux.name);
-}
-
-static void
-intel_dp_aux_init(struct intel_dp *intel_dp)
-{
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	if (INTEL_GEN(dev_priv) >= 9)
+		intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider;
+	else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+		intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider;
+	else if (HAS_PCH_SPLIT(dev_priv))
+		intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider;
+	else
+		intel_dp->get_aux_clock_divider = g4x_get_aux_clock_divider;
 
-	intel_dp->aux_ch = intel_aux_ch(intel_dp);
-	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
+	if (INTEL_GEN(dev_priv) >= 9)
+		intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl;
+	else
+		intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;
 
-	intel_aux_reg_init(intel_dp);
 	drm_dp_aux_init(&intel_dp->aux);
 
 	/* Failure to allocate our preferred name is not critical */
@@ -6342,20 +6351,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 	intel_dp->active_pipe = INVALID_PIPE;
 
 	/* intel_dp vfuncs */
-	if (INTEL_GEN(dev_priv) >= 9)
-		intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider;
-	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-		intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider;
-	else if (HAS_PCH_SPLIT(dev_priv))
-		intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider;
-	else
-		intel_dp->get_aux_clock_divider = g4x_get_aux_clock_divider;
-
-	if (INTEL_GEN(dev_priv) >= 9)
-		intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl;
-	else
-		intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;
-
 	if (HAS_DDI(dev_priv))
 		intel_dp->prepare_link_retrain = intel_ddi_prepare_link_retrain;
 
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()
  2018-02-22 18:10 ` [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init() Ville Syrjala
@ 2018-02-23 15:31   ` Ville Syrjälä
  0 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2018-02-23 15:31 UTC (permalink / raw)
  To: intel-gfx

On Thu, Feb 22, 2018 at 08:10:32PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Collect all the aux ch vfunc assignments into intel_dp_aux_init()
> instead of having it spread around.
> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed 1-4 to dinq. Thanks for the reviews.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (2 preceding siblings ...)
  2018-02-22 18:10 ` [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init() Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-28 16:19   ` Ville Syrjälä
  2018-02-22 18:10 ` [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/ Ville Syrjala
                   ` (7 subsequent siblings)
  11 siblings, 1 reply; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

While it seems totally unlikely that any system would mix a cpu/north
aux channel with a pch/south port (or vice versa) we should still
consult intel_dp->aux_ch rather than encoder->port when figuring out
which clock is actually used by the aux ch.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2c3eb90b9499..8d503be73dbd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -956,8 +956,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
 
 static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
 
 	if (index)
 		return 0;
@@ -971,8 +970,7 @@ static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 
 static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
 
 	if (index)
 		return 0;
@@ -982,7 +980,7 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 	 * like to run at 2MHz.  So, take the cdclk or PCH rawclk value and
 	 * divide by 2000 and use that
 	 */
-	if (intel_dig_port->base.port == PORT_A)
+	if (intel_dp->aux_ch == AUX_CH_A)
 		return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000);
 	else
 		return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000);
@@ -990,10 +988,9 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 
 static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
+	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
 
-	if (intel_dig_port->base.port != PORT_A && HAS_PCH_LPT_H(dev_priv)) {
+	if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
 		/* Workaround for non-ULT HSW */
 		switch (index) {
 		case 0: return 63;
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()
  2018-02-22 18:10 ` [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider() Ville Syrjala
@ 2018-02-28 16:19   ` Ville Syrjälä
  0 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2018-02-28 16:19 UTC (permalink / raw)
  To: intel-gfx

On Thu, Feb 22, 2018 at 08:10:33PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> While it seems totally unlikely that any system would mix a cpu/north
> aux channel with a pch/south port (or vice versa) we should still
> consult intel_dp->aux_ch rather than encoder->port when figuring out
> which clock is actually used by the aux ch.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed to dinq with Chris's irc r-b:
15:07 < vsyrjala> a few trivial patches looking for r-bs: https://patchwork.freedesktop.org/patch/206279/
                  https://patchwork.freedesktop.org/patch/206280/
15:41 < ickle> s/_ch/_xfer/ r-b
15:42 < ickle> aux_ch makes sense, but requires some reading for me
16:26 < ickle> vsyrjala: read enough to be happy with AUX_CH_foo, so r-b

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 13 +++++--------
>  1 file changed, 5 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2c3eb90b9499..8d503be73dbd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -956,8 +956,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
>  
>  static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  {
> -	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
>  
>  	if (index)
>  		return 0;
> @@ -971,8 +970,7 @@ static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  
>  static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  {
> -	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
>  
>  	if (index)
>  		return 0;
> @@ -982,7 +980,7 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  	 * like to run at 2MHz.  So, take the cdclk or PCH rawclk value and
>  	 * divide by 2000 and use that
>  	 */
> -	if (intel_dig_port->base.port == PORT_A)
> +	if (intel_dp->aux_ch == AUX_CH_A)
>  		return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000);
>  	else
>  		return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000);
> @@ -990,10 +988,9 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  
>  static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  {
> -	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
>  
> -	if (intel_dig_port->base.port != PORT_A && HAS_PCH_LPT_H(dev_priv)) {
> +	if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
>  		/* Workaround for non-ULT HSW */
>  		switch (index) {
>  		case 0: return 63;
> -- 
> 2.13.6

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (3 preceding siblings ...)
  2018-02-22 18:10 ` [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider() Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rename intel_dp_aux_ch() to intel_dp_aux_xfer() to better convey
what it actually does.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8d503be73dbd..217cc6aee477 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1079,9 +1079,9 @@ static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
 }
 
 static int
-intel_dp_aux_ch(struct intel_dp *intel_dp,
-		const uint8_t *send, int send_bytes,
-		uint8_t *recv, int recv_size, bool aksv_write)
+intel_dp_aux_xfer(struct intel_dp *intel_dp,
+		  const uint8_t *send, int send_bytes,
+		  uint8_t *recv, int recv_size, bool aksv_write)
 {
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv =
@@ -1286,8 +1286,8 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 		if (msg->buffer)
 			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
 
-		ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize,
-				      false);
+		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
+					rxbuf, rxsize, false);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 
@@ -1309,8 +1309,8 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 		if (WARN_ON(rxsize > 20))
 			return -E2BIG;
 
-		ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize,
-				      false);
+		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
+					rxbuf, rxsize, false);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 			/*
@@ -5109,8 +5109,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
 	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
 
-	ret = intel_dp_aux_ch(intel_dp, txbuf, sizeof(txbuf), rxbuf,
-			      sizeof(rxbuf), true);
+	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
+				rxbuf, sizeof(rxbuf), true);
 	if (ret < 0) {
 		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
 		return ret;
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (4 preceding siblings ...)
  2018-02-22 18:10 ` [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/ Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-22 21:20   ` Ville Syrjälä
  2018-02-22 21:27   ` [PATCH v2 " Ville Syrjala
  2018-02-22 18:10 ` [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header Ville Syrjala
                   ` (5 subsequent siblings)
  11 siblings, 2 replies; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's try to keep the details on the AKSV stuff concentrated
in one place. So move the control bit and +5 data size handling
there.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
 1 file changed, 13 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 217cc6aee477..328a03f14d8a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
 	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
 }
 
-static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
-					  bool has_aux_irq,
-					  int send_bytes,
-					  uint32_t aux_clock_divider,
-					  bool aksv_write)
-{
-	uint32_t val = 0;
-
-	if (aksv_write) {
-		send_bytes += 5;
-		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
-	}
-
-	return val | intel_dp->get_aux_send_ctl(intel_dp,
-						has_aux_irq,
-						send_bytes,
-						aux_clock_divider);
-}
-
 static int
 intel_dp_aux_xfer(struct intel_dp *intel_dp,
 		  const uint8_t *send, int send_bytes,
-		  uint8_t *recv, int recv_size, bool aksv_write)
+		  uint8_t *recv, int recv_size,
+		  u32 aux_send_ctl_flags)
 {
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv =
@@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 	}
 
 	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
-		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
-							 has_aux_irq,
-							 send_bytes,
-							 aux_clock_divider,
-							 aksv_write);
+		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
+							  has_aux_irq,
+							  send_bytes,
+							  aux_clock_divider);
+
+		send_ctl |= aux_send_ctl_flags;
 
 		/* Must try at least 3 times according to DP spec */
 		for (try = 0; try < 5; try++) {
@@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, false);
+					rxbuf, rxsize, 0);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 
@@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			return -E2BIG;
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, false);
+					rxbuf, rxsize, 0);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 			/*
@@ -5109,8 +5092,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
 	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
 
-	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
-				rxbuf, sizeof(rxbuf), true);
+	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf) + 5,
+				rxbuf, sizeof(rxbuf),
+				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
 	if (ret < 0) {
 		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
 		return ret;
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
@ 2018-02-22 21:20   ` Ville Syrjälä
  2018-02-22 21:27   ` [PATCH v2 " Ville Syrjala
  1 sibling, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2018-02-22 21:20 UTC (permalink / raw)
  To: intel-gfx

On Thu, Feb 22, 2018 at 08:10:35PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's try to keep the details on the AKSV stuff concentrated
> in one place. So move the control bit and +5 data size handling
> there.
> 
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
>  1 file changed, 13 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 217cc6aee477..328a03f14d8a 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>  	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
>  }
>  
> -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> -					  bool has_aux_irq,
> -					  int send_bytes,
> -					  uint32_t aux_clock_divider,
> -					  bool aksv_write)
> -{
> -	uint32_t val = 0;
> -
> -	if (aksv_write) {
> -		send_bytes += 5;
> -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> -	}
> -
> -	return val | intel_dp->get_aux_send_ctl(intel_dp,
> -						has_aux_irq,
> -						send_bytes,
> -						aux_clock_divider);
> -}
> -
>  static int
>  intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  		  const uint8_t *send, int send_bytes,
> -		  uint8_t *recv, int recv_size, bool aksv_write)
> +		  uint8_t *recv, int recv_size,
> +		  u32 aux_send_ctl_flags)
>  {
>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv =
> @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  	}
>  
>  	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
> -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> -							 has_aux_irq,
> -							 send_bytes,
> -							 aux_clock_divider,
> -							 aksv_write);
> +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> +							  has_aux_irq,
> +							  send_bytes,
> +							  aux_clock_divider);
> +
> +		send_ctl |= aux_send_ctl_flags;

Actually I just realized this doesn't quite do what I wanted. Since
I now pass the full msg size this guy wants to load all of it into
the aux data registers. Since txbuf[] is on the stack we should just
end up loading some stack garbage which I suppose is fine from the 
hardware POV (it should just ignore data right?).

But still perhaps not the best approach to access beyond the buffer
on the stack. So the fix would be to make txbuf[] five bytes longer
and maybe zeroing it to avoid loading stack garbage into the
registers.

>  
>  		/* Must try at least 3 times according to DP spec */
>  		for (try = 0; try < 5; try++) {
> @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>  			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
>  
>  		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>  		if (ret > 0) {
>  			msg->reply = rxbuf[0] >> 4;
>  
> @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>  			return -E2BIG;
>  
>  		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>  		if (ret > 0) {
>  			msg->reply = rxbuf[0] >> 4;
>  			/*
> @@ -5109,8 +5092,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>  	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
>  	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
>  
> -	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> -				rxbuf, sizeof(rxbuf), true);
> +	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf) + 5,
> +				rxbuf, sizeof(rxbuf),
> +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
>  	if (ret < 0) {
>  		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
>  		return ret;
> -- 
> 2.13.6

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
  2018-02-22 21:20   ` Ville Syrjälä
@ 2018-02-22 21:27   ` Ville Syrjala
  2018-02-23 11:10     ` Ramalingam C
  1 sibling, 1 reply; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 21:27 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's try to keep the details on the AKSV stuff concentrated
in one place. So move the control bit and +5 data size handling
there.

v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
    will still load into the registers even though the hardware
    will ignore it

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
 1 file changed, 13 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 217cc6aee477..0d699d230b77 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
 	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
 }
 
-static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
-					  bool has_aux_irq,
-					  int send_bytes,
-					  uint32_t aux_clock_divider,
-					  bool aksv_write)
-{
-	uint32_t val = 0;
-
-	if (aksv_write) {
-		send_bytes += 5;
-		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
-	}
-
-	return val | intel_dp->get_aux_send_ctl(intel_dp,
-						has_aux_irq,
-						send_bytes,
-						aux_clock_divider);
-}
-
 static int
 intel_dp_aux_xfer(struct intel_dp *intel_dp,
 		  const uint8_t *send, int send_bytes,
-		  uint8_t *recv, int recv_size, bool aksv_write)
+		  uint8_t *recv, int recv_size,
+		  u32 aux_send_ctl_flags)
 {
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv =
@@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 	}
 
 	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
-		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
-							 has_aux_irq,
-							 send_bytes,
-							 aux_clock_divider,
-							 aksv_write);
+		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
+							  has_aux_irq,
+							  send_bytes,
+							  aux_clock_divider);
+
+		send_ctl |= aux_send_ctl_flags;
 
 		/* Must try at least 3 times according to DP spec */
 		for (try = 0; try < 5; try++) {
@@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, false);
+					rxbuf, rxsize, 0);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 
@@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			return -E2BIG;
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, false);
+					rxbuf, rxsize, 0);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 			/*
@@ -5085,7 +5068,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 				u8 *an)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
-	uint8_t txbuf[4], rxbuf[2], reply = 0;
+	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
 	ssize_t dpcd_ret;
 	int ret;
 
@@ -5110,7 +5093,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
 
 	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
-				rxbuf, sizeof(rxbuf), true);
+				rxbuf, sizeof(rxbuf),
+				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
 	if (ret < 0) {
 		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
 		return ret;
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-22 21:27   ` [PATCH v2 " Ville Syrjala
@ 2018-02-23 11:10     ` Ramalingam C
  2018-02-23 13:46       ` Ville Syrjälä
  0 siblings, 1 reply; 24+ messages in thread
From: Ramalingam C @ 2018-02-23 11:10 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

This is really making it cleaner.

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>



On Friday 23 February 2018 02:57 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Let's try to keep the details on the AKSV stuff concentrated
> in one place. So move the control bit and +5 data size handling
> there.
>
> v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
>      will still load into the registers even though the hardware
>      will ignore it
>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
>   1 file changed, 13 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 217cc6aee477..0d699d230b77 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>   	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
>   }
>   
> -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> -					  bool has_aux_irq,
> -					  int send_bytes,
> -					  uint32_t aux_clock_divider,
> -					  bool aksv_write)
> -{
> -	uint32_t val = 0;
> -
> -	if (aksv_write) {
> -		send_bytes += 5;
> -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> -	}
> -
> -	return val | intel_dp->get_aux_send_ctl(intel_dp,
> -						has_aux_irq,
> -						send_bytes,
> -						aux_clock_divider);
> -}
> -
>   static int
>   intel_dp_aux_xfer(struct intel_dp *intel_dp,
>   		  const uint8_t *send, int send_bytes,
> -		  uint8_t *recv, int recv_size, bool aksv_write)
> +		  uint8_t *recv, int recv_size,
> +		  u32 aux_send_ctl_flags)
>   {
>   	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>   	struct drm_i915_private *dev_priv =
> @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>   	}
>   
>   	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
> -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> -							 has_aux_irq,
> -							 send_bytes,
> -							 aux_clock_divider,
> -							 aksv_write);
> +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> +							  has_aux_irq,
> +							  send_bytes,
> +							  aux_clock_divider);
> +
> +		send_ctl |= aux_send_ctl_flags;
>   
>   		/* Must try at least 3 times according to DP spec */
>   		for (try = 0; try < 5; try++) {
> @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>   			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
>   
>   		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>   		if (ret > 0) {
>   			msg->reply = rxbuf[0] >> 4;
>   
> @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>   			return -E2BIG;
>   
>   		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>   		if (ret > 0) {
>   			msg->reply = rxbuf[0] >> 4;
>   			/*
> @@ -5085,7 +5068,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>   				u8 *an)
>   {
>   	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
> -	uint8_t txbuf[4], rxbuf[2], reply = 0;
> +	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
You might want to use the macros for size of txbuf as  HEADER_SIZE + 
DRM_HDCP_KSV_LEN, as it is done in the next patch.
--Ram
>   	ssize_t dpcd_ret;
>   	int ret;
>   
> @@ -5110,7 +5093,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>   	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
>   
>   	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> -				rxbuf, sizeof(rxbuf), true);
> +				rxbuf, sizeof(rxbuf),
> +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
>   	if (ret < 0) {
>   		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
>   		return ret;

_______________________________________________
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-23 11:10     ` Ramalingam C
@ 2018-02-23 13:46       ` Ville Syrjälä
  2018-02-23 14:44         ` Ramalingam C
  0 siblings, 1 reply; 24+ messages in thread
From: Ville Syrjälä @ 2018-02-23 13:46 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

On Fri, Feb 23, 2018 at 04:40:42PM +0530, Ramalingam C wrote:
> This is really making it cleaner.
> 
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> 
> 
> 
> On Friday 23 February 2018 02:57 AM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Let's try to keep the details on the AKSV stuff concentrated
> > in one place. So move the control bit and +5 data size handling
> > there.
> >
> > v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
> >      will still load into the registers even though the hardware
> >      will ignore it
> >
> > Cc: Sean Paul <seanpaul@chromium.org>
> > Cc: Ramalingam C <ramalingam.c@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
> >   1 file changed, 13 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 217cc6aee477..0d699d230b77 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
> >   	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
> >   }
> >   
> > -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> > -					  bool has_aux_irq,
> > -					  int send_bytes,
> > -					  uint32_t aux_clock_divider,
> > -					  bool aksv_write)
> > -{
> > -	uint32_t val = 0;
> > -
> > -	if (aksv_write) {
> > -		send_bytes += 5;
> > -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> > -	}
> > -
> > -	return val | intel_dp->get_aux_send_ctl(intel_dp,
> > -						has_aux_irq,
> > -						send_bytes,
> > -						aux_clock_divider);
> > -}
> > -
> >   static int
> >   intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >   		  const uint8_t *send, int send_bytes,
> > -		  uint8_t *recv, int recv_size, bool aksv_write)
> > +		  uint8_t *recv, int recv_size,
> > +		  u32 aux_send_ctl_flags)
> >   {
> >   	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> >   	struct drm_i915_private *dev_priv =
> > @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >   	}
> >   
> >   	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
> > -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> > -							 has_aux_irq,
> > -							 send_bytes,
> > -							 aux_clock_divider,
> > -							 aksv_write);
> > +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> > +							  has_aux_irq,
> > +							  send_bytes,
> > +							  aux_clock_divider);
> > +
> > +		send_ctl |= aux_send_ctl_flags;
> >   
> >   		/* Must try at least 3 times according to DP spec */
> >   		for (try = 0; try < 5; try++) {
> > @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >   			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
> >   
> >   		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> > -					rxbuf, rxsize, false);
> > +					rxbuf, rxsize, 0);
> >   		if (ret > 0) {
> >   			msg->reply = rxbuf[0] >> 4;
> >   
> > @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >   			return -E2BIG;
> >   
> >   		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> > -					rxbuf, rxsize, false);
> > +					rxbuf, rxsize, 0);
> >   		if (ret > 0) {
> >   			msg->reply = rxbuf[0] >> 4;
> >   			/*
> > @@ -5085,7 +5068,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
> >   				u8 *an)
> >   {
> >   	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
> > -	uint8_t txbuf[4], rxbuf[2], reply = 0;
> > +	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
> You might want to use the macros for size of txbuf as  HEADER_SIZE + 
> DRM_HDCP_KSV_LEN, as it is done in the next patch.

As the original code was using a bare 5 I figured I'll keep using it here
as well to make it easier to see what's moving where.

> --Ram
> >   	ssize_t dpcd_ret;
> >   	int ret;
> >   
> > @@ -5110,7 +5093,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
> >   	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
> >   
> >   	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> > -				rxbuf, sizeof(rxbuf), true);
> > +				rxbuf, sizeof(rxbuf),
> > +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
> >   	if (ret < 0) {
> >   		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
> >   		return ret;

-- 
Ville Syrjälä
Intel OTC
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-23 13:46       ` Ville Syrjälä
@ 2018-02-23 14:44         ` Ramalingam C
  2018-03-02 16:30           ` Ville Syrjälä
  0 siblings, 1 reply; 24+ messages in thread
From: Ramalingam C @ 2018-02-23 14:44 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx



On Friday 23 February 2018 07:16 PM, Ville Syrjälä wrote:
> On Fri, Feb 23, 2018 at 04:40:42PM +0530, Ramalingam C wrote:
>> This is really making it cleaner.
>>
>> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
>>
>>
>>
>> On Friday 23 February 2018 02:57 AM, Ville Syrjala wrote:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> Let's try to keep the details on the AKSV stuff concentrated
>>> in one place. So move the control bit and +5 data size handling
>>> there.
>>>
>>> v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
>>>       will still load into the registers even though the hardware
>>>       will ignore it
>>>
>>> Cc: Sean Paul <seanpaul@chromium.org>
>>> Cc: Ramalingam C <ramalingam.c@intel.com>
>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
>>>    1 file changed, 13 insertions(+), 29 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>>> index 217cc6aee477..0d699d230b77 100644
>>> --- a/drivers/gpu/drm/i915/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>>> @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>>>    	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
>>>    }
>>>    
>>> -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
>>> -					  bool has_aux_irq,
>>> -					  int send_bytes,
>>> -					  uint32_t aux_clock_divider,
>>> -					  bool aksv_write)
>>> -{
>>> -	uint32_t val = 0;
>>> -
>>> -	if (aksv_write) {
>>> -		send_bytes += 5;
>>> -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
>>> -	}
>>> -
>>> -	return val | intel_dp->get_aux_send_ctl(intel_dp,
>>> -						has_aux_irq,
>>> -						send_bytes,
>>> -						aux_clock_divider);
>>> -}
>>> -
>>>    static int
>>>    intel_dp_aux_xfer(struct intel_dp *intel_dp,
>>>    		  const uint8_t *send, int send_bytes,
>>> -		  uint8_t *recv, int recv_size, bool aksv_write)
>>> +		  uint8_t *recv, int recv_size,
>>> +		  u32 aux_send_ctl_flags)
>>>    {
>>>    	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>>>    	struct drm_i915_private *dev_priv =
>>> @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>>>    	}
>>>    
>>>    	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
>>> -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
>>> -							 has_aux_irq,
>>> -							 send_bytes,
>>> -							 aux_clock_divider,
>>> -							 aksv_write);
>>> +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
>>> +							  has_aux_irq,
>>> +							  send_bytes,
>>> +							  aux_clock_divider);
>>> +
>>> +		send_ctl |= aux_send_ctl_flags;
>>>    
>>>    		/* Must try at least 3 times according to DP spec */
>>>    		for (try = 0; try < 5; try++) {
>>> @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>>>    			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
>>>    
>>>    		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
>>> -					rxbuf, rxsize, false);
>>> +					rxbuf, rxsize, 0);
>>>    		if (ret > 0) {
>>>    			msg->reply = rxbuf[0] >> 4;
>>>    
>>> @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>>>    			return -E2BIG;
>>>    
>>>    		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
>>> -					rxbuf, rxsize, false);
>>> +					rxbuf, rxsize, 0);
>>>    		if (ret > 0) {
>>>    			msg->reply = rxbuf[0] >> 4;
>>>    			/*
>>> @@ -5085,7 +5068,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>>>    				u8 *an)
>>>    {
>>>    	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
>>> -	uint8_t txbuf[4], rxbuf[2], reply = 0;
>>> +	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
>> You might want to use the macros for size of txbuf as  HEADER_SIZE +
>> DRM_HDCP_KSV_LEN, as it is done in the next patch.
> As the original code was using a bare 5 I figured I'll keep using it here
> as well to make it easier to see what's moving where.
Suggested the above, to make the 8th patch just for pulling out the aux 
header population.
I am happy with the current shape too :)

--Ram
>
>> --Ram
>>>    	ssize_t dpcd_ret;
>>>    	int ret;
>>>    
>>> @@ -5110,7 +5093,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>>>    	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
>>>    
>>>    	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
>>> -				rxbuf, sizeof(rxbuf), true);
>>> +				rxbuf, sizeof(rxbuf),
>>> +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
>>>    	if (ret < 0) {
>>>    		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
>>>    		return ret;

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^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v2 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
  2018-02-23 14:44         ` Ramalingam C
@ 2018-03-02 16:30           ` Ville Syrjälä
  0 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2018-03-02 16:30 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

On Fri, Feb 23, 2018 at 08:14:53PM +0530, Ramalingam C wrote:
> 
> 
> On Friday 23 February 2018 07:16 PM, Ville Syrjälä wrote:
> > On Fri, Feb 23, 2018 at 04:40:42PM +0530, Ramalingam C wrote:
> >> This is really making it cleaner.
> >>
> >> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> >>
> >>
> >>
> >> On Friday 23 February 2018 02:57 AM, Ville Syrjala wrote:
> >>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>
> >>> Let's try to keep the details on the AKSV stuff concentrated
> >>> in one place. So move the control bit and +5 data size handling
> >>> there.
> >>>
> >>> v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
> >>>       will still load into the registers even though the hardware
> >>>       will ignore it
> >>>
> >>> Cc: Sean Paul <seanpaul@chromium.org>
> >>> Cc: Ramalingam C <ramalingam.c@intel.com>
> >>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>> ---
> >>>    drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
> >>>    1 file changed, 13 insertions(+), 29 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> >>> index 217cc6aee477..0d699d230b77 100644
> >>> --- a/drivers/gpu/drm/i915/intel_dp.c
> >>> +++ b/drivers/gpu/drm/i915/intel_dp.c
> >>> @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
> >>>    	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
> >>>    }
> >>>    
> >>> -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> >>> -					  bool has_aux_irq,
> >>> -					  int send_bytes,
> >>> -					  uint32_t aux_clock_divider,
> >>> -					  bool aksv_write)
> >>> -{
> >>> -	uint32_t val = 0;
> >>> -
> >>> -	if (aksv_write) {
> >>> -		send_bytes += 5;
> >>> -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> >>> -	}
> >>> -
> >>> -	return val | intel_dp->get_aux_send_ctl(intel_dp,
> >>> -						has_aux_irq,
> >>> -						send_bytes,
> >>> -						aux_clock_divider);
> >>> -}
> >>> -
> >>>    static int
> >>>    intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >>>    		  const uint8_t *send, int send_bytes,
> >>> -		  uint8_t *recv, int recv_size, bool aksv_write)
> >>> +		  uint8_t *recv, int recv_size,
> >>> +		  u32 aux_send_ctl_flags)
> >>>    {
> >>>    	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> >>>    	struct drm_i915_private *dev_priv =
> >>> @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >>>    	}
> >>>    
> >>>    	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
> >>> -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> >>> -							 has_aux_irq,
> >>> -							 send_bytes,
> >>> -							 aux_clock_divider,
> >>> -							 aksv_write);
> >>> +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> >>> +							  has_aux_irq,
> >>> +							  send_bytes,
> >>> +							  aux_clock_divider);
> >>> +
> >>> +		send_ctl |= aux_send_ctl_flags;
> >>>    
> >>>    		/* Must try at least 3 times according to DP spec */
> >>>    		for (try = 0; try < 5; try++) {
> >>> @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >>>    			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
> >>>    
> >>>    		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> >>> -					rxbuf, rxsize, false);
> >>> +					rxbuf, rxsize, 0);
> >>>    		if (ret > 0) {
> >>>    			msg->reply = rxbuf[0] >> 4;
> >>>    
> >>> @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >>>    			return -E2BIG;
> >>>    
> >>>    		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> >>> -					rxbuf, rxsize, false);
> >>> +					rxbuf, rxsize, 0);
> >>>    		if (ret > 0) {
> >>>    			msg->reply = rxbuf[0] >> 4;
> >>>    			/*
> >>> @@ -5085,7 +5068,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
> >>>    				u8 *an)
> >>>    {
> >>>    	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
> >>> -	uint8_t txbuf[4], rxbuf[2], reply = 0;
> >>> +	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
> >> You might want to use the macros for size of txbuf as  HEADER_SIZE +
> >> DRM_HDCP_KSV_LEN, as it is done in the next patch.
> > As the original code was using a bare 5 I figured I'll keep using it here
> > as well to make it easier to see what's moving where.
> Suggested the above, to make the 8th patch just for pulling out the aux 
> header population.
> I am happy with the current shape too :)

I decided to be lazy and leave it as is.

Remainder of the series pushed to dinq. Thanks for the reviews.

> 
> --Ram
> >
> >> --Ram
> >>>    	ssize_t dpcd_ret;
> >>>    	int ret;
> >>>    
> >>> @@ -5110,7 +5093,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
> >>>    	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
> >>>    
> >>>    	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> >>> -				rxbuf, sizeof(rxbuf), true);
> >>> +				rxbuf, sizeof(rxbuf),
> >>> +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
> >>>    	if (ret < 0) {
> >>>    		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
> >>>    		return ret;

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (5 preceding siblings ...)
  2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
@ 2018-02-22 18:10 ` Ville Syrjala
  2018-02-22 21:28   ` [PATCH v2 " Ville Syrjala
  2018-02-22 18:38 ` ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
                   ` (4 subsequent siblings)
  11 siblings, 1 reply; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 18:10 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We have two instances of the code to fill out the header for the aux
message. Pull it into a small helper.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 32 ++++++++++++++++++++------------
 1 file changed, 20 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 328a03f14d8a..48fa18c7bf6f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1240,6 +1240,17 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 
 #define BARE_ADDRESS_SIZE	3
 #define HEADER_SIZE		(BARE_ADDRESS_SIZE + 1)
+
+static void
+intel_dp_aux_header(u8 txbuf[HEADER_SIZE],
+		    const struct drm_dp_aux_msg *msg)
+{
+	txbuf[0] = (msg->request << 4) | ((msg->address >> 16) & 0xf);
+	txbuf[1] = (msg->address >> 8) & 0xff;
+	txbuf[2] = msg->address & 0xff;
+	txbuf[3] = msg->size - 1;
+}
+
 static ssize_t
 intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -1248,11 +1259,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	size_t txsize, rxsize;
 	int ret;
 
-	txbuf[0] = (msg->request << 4) |
-		((msg->address >> 16) & 0xf);
-	txbuf[1] = (msg->address >> 8) & 0xff;
-	txbuf[2] = msg->address & 0xff;
-	txbuf[3] = msg->size - 1;
+	intel_dp_aux_header(txbuf, msg);
 
 	switch (msg->request & ~DP_AUX_I2C_MOT) {
 	case DP_AUX_NATIVE_WRITE:
@@ -5068,7 +5075,12 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 				u8 *an)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
-	uint8_t txbuf[4], rxbuf[2], reply = 0;
+	static const struct drm_dp_aux_msg msg = {
+		.request = DP_AUX_NATIVE_WRITE,
+		.address = DP_AUX_HDCP_AKSV,
+		.size = DRM_HDCP_KSV_LEN,
+	};
+	uint8_t txbuf[HEADER_SIZE], rxbuf[2], reply = 0;
 	ssize_t dpcd_ret;
 	int ret;
 
@@ -5086,13 +5098,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 	 * we were writing the data, and then tickle the hardware to output the
 	 * data once the header is sent out.
 	 */
-	txbuf[0] = (DP_AUX_NATIVE_WRITE << 4) |
-		   ((DP_AUX_HDCP_AKSV >> 16) & 0xf);
-	txbuf[1] = (DP_AUX_HDCP_AKSV >> 8) & 0xff;
-	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
-	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
+	intel_dp_aux_header(txbuf, &msg);
 
-	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf) + 5,
+	ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size,
 				rxbuf, sizeof(rxbuf),
 				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
 	if (ret < 0) {
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH v2 8/8] drm/i915: Deduplicate the code to fill the aux message header
  2018-02-22 18:10 ` [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header Ville Syrjala
@ 2018-02-22 21:28   ` Ville Syrjala
  2018-02-23 11:19     ` Ramalingam C
  0 siblings, 1 reply; 24+ messages in thread
From: Ville Syrjala @ 2018-02-22 21:28 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We have two instances of the code to fill out the header for the aux
message. Pull it into a small helper.

v2: Rebase due to txbuf[] changes

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 32 ++++++++++++++++++++------------
 1 file changed, 20 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0d699d230b77..e04aaa182d4c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1240,6 +1240,17 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
 
 #define BARE_ADDRESS_SIZE	3
 #define HEADER_SIZE		(BARE_ADDRESS_SIZE + 1)
+
+static void
+intel_dp_aux_header(u8 txbuf[HEADER_SIZE],
+		    const struct drm_dp_aux_msg *msg)
+{
+	txbuf[0] = (msg->request << 4) | ((msg->address >> 16) & 0xf);
+	txbuf[1] = (msg->address >> 8) & 0xff;
+	txbuf[2] = msg->address & 0xff;
+	txbuf[3] = msg->size - 1;
+}
+
 static ssize_t
 intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -1248,11 +1259,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	size_t txsize, rxsize;
 	int ret;
 
-	txbuf[0] = (msg->request << 4) |
-		((msg->address >> 16) & 0xf);
-	txbuf[1] = (msg->address >> 8) & 0xff;
-	txbuf[2] = msg->address & 0xff;
-	txbuf[3] = msg->size - 1;
+	intel_dp_aux_header(txbuf, msg);
 
 	switch (msg->request & ~DP_AUX_I2C_MOT) {
 	case DP_AUX_NATIVE_WRITE:
@@ -5068,7 +5075,12 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 				u8 *an)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
-	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
+	static const struct drm_dp_aux_msg msg = {
+		.request = DP_AUX_NATIVE_WRITE,
+		.address = DP_AUX_HDCP_AKSV,
+		.size = DRM_HDCP_KSV_LEN,
+	};
+	uint8_t txbuf[HEADER_SIZE + DRM_HDCP_KSV_LEN] = {}, rxbuf[2], reply = 0;
 	ssize_t dpcd_ret;
 	int ret;
 
@@ -5086,13 +5098,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
 	 * we were writing the data, and then tickle the hardware to output the
 	 * data once the header is sent out.
 	 */
-	txbuf[0] = (DP_AUX_NATIVE_WRITE << 4) |
-		   ((DP_AUX_HDCP_AKSV >> 16) & 0xf);
-	txbuf[1] = (DP_AUX_HDCP_AKSV >> 8) & 0xff;
-	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
-	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
+	intel_dp_aux_header(txbuf, &msg);
 
-	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
+	ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size,
 				rxbuf, sizeof(rxbuf),
 				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
 	if (ret < 0) {
-- 
2.13.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH v2 8/8] drm/i915: Deduplicate the code to fill the aux message header
  2018-02-22 21:28   ` [PATCH v2 " Ville Syrjala
@ 2018-02-23 11:19     ` Ramalingam C
  0 siblings, 0 replies; 24+ messages in thread
From: Ramalingam C @ 2018-02-23 11:19 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx

With minor suggestions:

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>


On Friday 23 February 2018 02:58 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We have two instances of the code to fill out the header for the aux
> message. Pull it into a small helper.
>
> v2: Rebase due to txbuf[] changes
>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_dp.c | 32 ++++++++++++++++++++------------
>   1 file changed, 20 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0d699d230b77..e04aaa182d4c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1240,6 +1240,17 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>   
>   #define BARE_ADDRESS_SIZE	3
>   #define HEADER_SIZE		(BARE_ADDRESS_SIZE + 1)
> +
> +static void
> +intel_dp_aux_header(u8 txbuf[HEADER_SIZE],
> +		    const struct drm_dp_aux_msg *msg)
> +{
> +	txbuf[0] = (msg->request << 4) | ((msg->address >> 16) & 0xf);
> +	txbuf[1] = (msg->address >> 8) & 0xff;
> +	txbuf[2] = msg->address & 0xff;
> +	txbuf[3] = msg->size - 1;
> +}
> +
>   static ssize_t
>   intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>   {
> @@ -1248,11 +1259,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>   	size_t txsize, rxsize;
>   	int ret;
>   
> -	txbuf[0] = (msg->request << 4) |
> -		((msg->address >> 16) & 0xf);
> -	txbuf[1] = (msg->address >> 8) & 0xff;
> -	txbuf[2] = msg->address & 0xff;
> -	txbuf[3] = msg->size - 1;
> +	intel_dp_aux_header(txbuf, msg);
>   
>   	switch (msg->request & ~DP_AUX_I2C_MOT) {
>   	case DP_AUX_NATIVE_WRITE:
> @@ -5068,7 +5075,12 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>   				u8 *an)
>   {
>   	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
> -	uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
> +	static const struct drm_dp_aux_msg msg = {
> +		.request = DP_AUX_NATIVE_WRITE,
> +		.address = DP_AUX_HDCP_AKSV,
> +		.size = DRM_HDCP_KSV_LEN,
> +	};
> +	uint8_t txbuf[HEADER_SIZE + DRM_HDCP_KSV_LEN] = {}, rxbuf[2], reply = 0;
Replacing numbers with macros could be moved to the previous patch of 
the series.
>   	ssize_t dpcd_ret;
>   	int ret;
>   
> @@ -5086,13 +5098,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>   	 * we were writing the data, and then tickle the hardware to output the
>   	 * data once the header is sent out.
>   	 */
> -	txbuf[0] = (DP_AUX_NATIVE_WRITE << 4) |
> -		   ((DP_AUX_HDCP_AKSV >> 16) & 0xf);
> -	txbuf[1] = (DP_AUX_HDCP_AKSV >> 8) & 0xff;
> -	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
> -	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
> +	intel_dp_aux_header(txbuf, &msg);
>   
> -	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> +	ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size,
We could use the HEADER_SIZE + DRM_HDCP_KSV_LEN itself for txbuf size, 
as they are const anyway.
this also could be moved to the prev patch, so that this patch just adds 
a helper for filling the aux header.

--Ram
>   				rxbuf, sizeof(rxbuf),
>   				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
>   	if (ret < 0) {

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (6 preceding siblings ...)
  2018-02-22 18:10 ` [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header Ville Syrjala
@ 2018-02-22 18:38 ` Patchwork
  2018-02-22 19:42 ` ✓ Fi.CI.BAT: success " Patchwork
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2018-02-22 18:38 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch
URL   : https://patchwork.freedesktop.org/series/38802/
State : failure

== Summary ==

Series 38802v1 series starting with [1/8] drm/i915: Use the correct power domain for aux ch
https://patchwork.freedesktop.org/api/1.0/series/38802/revisions/1/mbox/

Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> INCOMPLETE (fi-byt-n2820)
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                pass       -> FAIL       (fi-gdg-551) fdo#102575
Test prime_vgem:
        Subgroup basic-fence-flip:
                pass       -> FAIL       (fi-ilk-650) fdo#104008

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:413s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:423s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:371s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:483s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:284s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:478s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:465s
fi-byt-n2820     total:51   pass:41   dwarn:0   dfail:0   fail:0   skip:9  
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:565s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:415s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:281s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:507s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:385s
fi-ilk-650       total:288  pass:227  dwarn:0   dfail:0   fail:1   skip:60  time:406s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:446s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:409s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:454s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:490s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:448s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:494s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:583s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:428s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:501s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:515s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:491s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:471s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:407s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:427s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:390s
Blacklisted hosts:
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:389s

6e31b67bbce7f33193410c7861ca871688a9eba4 drm-tip: 2018y-02m-22d-16h-59m-35s UTC integration manifest
3d86edd0373f drm/i915: Deduplicate the code to fill the aux message header
f94ff6b37b19 drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
075406f4aa64 drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/
18e185341191 drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()
585492868eb5 drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()
eb2247bc2364 drm/i915: Nuke aux regs from intel_dp
dd8317188d10 drm/i915: Add enum aux_ch and clean up the aux init to use it
0971e56d97af drm/i915: Use the correct power domain for aux ch

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8130/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (7 preceding siblings ...)
  2018-02-22 18:38 ` ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
@ 2018-02-22 19:42 ` Patchwork
  2018-02-22 21:59 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2018-02-22 19:42 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch
URL   : https://patchwork.freedesktop.org/series/38802/
State : success

== Summary ==

Series 38802v1 series starting with [1/8] drm/i915: Use the correct power domain for aux ch
https://patchwork.freedesktop.org/api/1.0/series/38802/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-a:
                fail       -> PASS       (fi-skl-6700k2)
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:419s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:430s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:372s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:483s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:284s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:477s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:463s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:452s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:568s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:415s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:283s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:505s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:387s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:406s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:453s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:412s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:452s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:489s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:493s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:585s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:426s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:500s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:518s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:488s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:469s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:404s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:428s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:399s
Blacklisted hosts:
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:391s

b9f1df86d4379ec76dddc07cf6e1cc85ffb26ffd drm-tip: 2018y-02m-22d-18h-25m-51s UTC integration manifest
af521ffbcd15 drm/i915: Deduplicate the code to fill the aux message header
87cb73c6b38f drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
a5474d899d4b drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/
6e65422ecfb8 drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()
09cf1fce556c drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()
a7ede63bb7cc drm/i915: Nuke aux regs from intel_dp
e04fc26369c9 drm/i915: Add enum aux_ch and clean up the aux init to use it
537c7099afb5 drm/i915: Use the correct power domain for aux ch

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8131/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (8 preceding siblings ...)
  2018-02-22 19:42 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-02-22 21:59 ` Patchwork
  2018-02-23  2:29 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
  2018-02-23  5:19 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
  11 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2018-02-22 21:59 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
URL   : https://patchwork.freedesktop.org/series/38802/
State : success

== Summary ==

Series 38802v3 series starting with [1/8] drm/i915: Use the correct power domain for aux ch
https://patchwork.freedesktop.org/api/1.0/series/38802/revisions/3/mbox/

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-a:
                fail       -> PASS       (fi-skl-6700k2)

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:424s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:426s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:384s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:483s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:286s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:486s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:468s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:457s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:560s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:418s
fi-gdg-551       total:288  pass:180  dwarn:0   dfail:0   fail:0   skip:108 time:285s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:507s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:389s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:409s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:442s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:411s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:454s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:491s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:495s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:587s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:423s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:506s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:520s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:488s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:479s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:404s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:511s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:392s
Blacklisted hosts:
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:393s
fi-bxt-dsi failed to collect. IGT log at Patchwork_8138/fi-bxt-dsi/run0.log

b9f1df86d4379ec76dddc07cf6e1cc85ffb26ffd drm-tip: 2018y-02m-22d-18h-25m-51s UTC integration manifest
b64e625299e1 drm/i915: Deduplicate the code to fill the aux message header
f780134d3bf3 drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
251bef6efb5c drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/
32505a1a54c9 drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()
e9ff91110496 drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()
8f4e7ab1745a drm/i915: Nuke aux regs from intel_dp
275b4282d59f drm/i915: Add enum aux_ch and clean up the aux init to use it
ba08330c140f drm/i915: Use the correct power domain for aux ch

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8138/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (9 preceding siblings ...)
  2018-02-22 21:59 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
@ 2018-02-23  2:29 ` Patchwork
  2018-02-23  5:19 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
  11 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2018-02-23  2:29 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch
URL   : https://patchwork.freedesktop.org/series/38802/
State : warning

== Summary ==

Test drv_suspend:
        Subgroup forcewake:
                pass       -> SKIP       (shard-snb)
Test kms_flip:
        Subgroup wf_vblank-ts-check-interruptible:
                fail       -> PASS       (shard-hsw) fdo#100368 +1
Test kms_flip_tiling:
        Subgroup flip-to-yf-tiled:
                fail       -> PASS       (shard-apl) fdo#103822
Test kms_setmode:
        Subgroup basic:
                fail       -> PASS       (shard-hsw) fdo#99912 +1
Test kms_cursor_crc:
        Subgroup cursor-64x64-suspend:
                pass       -> INCOMPLETE (shard-hsw) fdo#103540
Test gem_eio:
        Subgroup in-flight-contexts:
                pass       -> INCOMPLETE (shard-apl) fdo#104945 +1
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-primscrn-indfb-msflip-blt:
                fail       -> PASS       (shard-apl) fdo#103167

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167

shard-apl        total:3417 pass:1792 dwarn:1   dfail:0   fail:11  skip:1611 time:11709s
shard-hsw        total:3407 pass:1735 dwarn:1   dfail:0   fail:1   skip:1668 time:11332s
shard-snb        total:3465 pass:1357 dwarn:1   dfail:0   fail:2   skip:2105 time:6588s
Blacklisted hosts:
shard-kbl        total:3428 pass:1928 dwarn:12  dfail:1   fail:14  skip:1472 time:9219s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8131/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
  2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
                   ` (10 preceding siblings ...)
  2018-02-23  2:29 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
@ 2018-02-23  5:19 ` Patchwork
  2018-02-23 13:58   ` Ville Syrjälä
  11 siblings, 1 reply; 24+ messages in thread
From: Patchwork @ 2018-02-23  5:19 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
URL   : https://patchwork.freedesktop.org/series/38802/
State : warning

== Summary ==

Test kms_flip_tiling:
        Subgroup flip-to-yf-tiled:
                fail       -> PASS       (shard-apl) fdo#103822
Test drv_suspend:
        Subgroup forcewake:
                pass       -> SKIP       (shard-snb)
Test kms_flip:
        Subgroup 2x-wf_vblank-ts-check:
                fail       -> PASS       (shard-hsw) fdo#100368 +1
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-primscrn-indfb-msflip-blt:
                fail       -> PASS       (shard-apl) fdo#103167

fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167

shard-apl        total:3465 pass:1821 dwarn:1   dfail:0   fail:12  skip:1631 time:12344s
shard-hsw        total:3465 pass:1768 dwarn:1   dfail:0   fail:2   skip:1693 time:11672s
shard-snb        total:3465 pass:1357 dwarn:1   dfail:0   fail:2   skip:2105 time:6617s
Blacklisted hosts:
shard-kbl        total:3428 pass:1925 dwarn:15  dfail:1   fail:14  skip:1472 time:9202s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8138/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
  2018-02-23  5:19 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
@ 2018-02-23 13:58   ` Ville Syrjälä
  0 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2018-02-23 13:58 UTC (permalink / raw)
  To: intel-gfx

On Fri, Feb 23, 2018 at 05:19:19AM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3)
> URL   : https://patchwork.freedesktop.org/series/38802/
> State : warning
> 
> == Summary ==
> 
> Test kms_flip_tiling:
>         Subgroup flip-to-yf-tiled:
>                 fail       -> PASS       (shard-apl) fdo#103822
> Test drv_suspend:
>         Subgroup forcewake:
>                 pass       -> SKIP       (shard-snb)

Test requirement not met in function suspend_via_rtcwake, file igt_aux.c:815:
Test requirement: ret == 0
rtcwake test failed with 1
This failure could mean that something is wrong with the rtcwake tool or how your distro is set up.
Subtest forcewake: SKIP (0.017s)

> Test kms_flip:
>         Subgroup 2x-wf_vblank-ts-check:
>                 fail       -> PASS       (shard-hsw) fdo#100368 +1
> Test kms_frontbuffer_tracking:
>         Subgroup fbc-1p-primscrn-indfb-msflip-blt:
>                 fail       -> PASS       (shard-apl) fdo#103167
> 
> fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
> fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
> fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
> 
> shard-apl        total:3465 pass:1821 dwarn:1   dfail:0   fail:12  skip:1631 time:12344s
> shard-hsw        total:3465 pass:1768 dwarn:1   dfail:0   fail:2   skip:1693 time:11672s
> shard-snb        total:3465 pass:1357 dwarn:1   dfail:0   fail:2   skip:2105 time:6617s
> Blacklisted hosts:
> shard-kbl        total:3428 pass:1925 dwarn:15  dfail:1   fail:14  skip:1472 time:9202s
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8138/shards.html

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, other threads:[~2018-03-02 16:30 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
2018-02-22 18:10 ` [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it Ville Syrjala
2018-02-22 18:10 ` [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp Ville Syrjala
2018-02-22 18:10 ` [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init() Ville Syrjala
2018-02-23 15:31   ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider() Ville Syrjala
2018-02-28 16:19   ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/ Ville Syrjala
2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
2018-02-22 21:20   ` Ville Syrjälä
2018-02-22 21:27   ` [PATCH v2 " Ville Syrjala
2018-02-23 11:10     ` Ramalingam C
2018-02-23 13:46       ` Ville Syrjälä
2018-02-23 14:44         ` Ramalingam C
2018-03-02 16:30           ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header Ville Syrjala
2018-02-22 21:28   ` [PATCH v2 " Ville Syrjala
2018-02-23 11:19     ` Ramalingam C
2018-02-22 18:38 ` ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
2018-02-22 19:42 ` ✓ Fi.CI.BAT: success " Patchwork
2018-02-22 21:59 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
2018-02-23  2:29 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
2018-02-23  5:19 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
2018-02-23 13:58   ` Ville Syrjälä

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