Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dhinakaran.pandiyan@intel.com
Subject: [PATCH 3/6] drm/i915: Exit PSR before do a aux transaction in gen < 9
Date: Fri, 23 Feb 2018 18:03:08 -0800	[thread overview]
Message-ID: <20180224020311.14813-3-jose.souza@intel.com> (raw)
In-Reply-To: <20180224020311.14813-1-jose.souza@intel.com>

As gen < 9 hardware don't have the aux ch mutex, we need to exit PSR
and wait until it is back to inactive state before do any aux ch
transaction.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c  |  8 +++++++-
 drivers/gpu/drm/i915/intel_drv.h |  9 +++++++++
 drivers/gpu/drm/i915/intel_psr.c | 42 ++++++++++++++++++++++++++++++++++------
 3 files changed, 52 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7be2fec51651..dacdd98bbb2e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1088,8 +1088,14 @@ static bool intel_dp_aux_ch_trylock(struct intel_dp *intel_dp)
 			to_i915(intel_dig_port->base.base.dev);
 	i915_reg_t ch_mutex;
 
-	if (!intel_dp->aux_ch_mutex_reg)
+	if (!intel_dp->aux_ch_mutex_reg) {
+		/* As gen < 9 hardware don't have the aux ch mutex, we need to
+		 * exit PSR and wait until it is back to inactive state before
+		 * do any aux ch transaction
+		 */
+		intel_psr_exit(intel_dp, true);
 		return true;
+	}
 
 	ch_mutex = intel_dp->aux_ch_mutex_reg(intel_dp);
 	I915_WRITE(ch_mutex, DP_AUX_CH_MUTEX_ENABLE);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 267cc6c5a89f..7adcd5955d1b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1881,6 +1881,15 @@ void intel_psr_single_frame_update(struct drm_i915_private *dev_priv,
 				   unsigned frontbuffer_bits);
 void intel_psr_compute_config(struct intel_dp *intel_dp,
 			      struct intel_crtc_state *crtc_state);
+/**
+ * Exit PSR in the given DisplayPort.
+ * @intel_dp: DisplayPort which PSR should be exit if running
+ * @wait_exit: if true it will wait until PSR have changed to inactive state,
+ * otherwise there is not wait.
+ *
+ * It will also schedule a work to try to active PSR again.
+ */
+void intel_psr_exit(struct intel_dp *intel_dp, bool wait_exit);
 
 /* intel_runtime_pm.c */
 int intel_power_domains_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index e8c32c3afb0e..0b889c85e8da 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -56,6 +56,8 @@
 #include "intel_drv.h"
 #include "i915_drv.h"
 
+#define PSR_ACTIVE_DELAY_MSEC 100
+
 static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -486,6 +488,16 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp,
 	}
 }
 
+static void intel_psr_active_schedule(struct i915_psr *psr,
+				      unsigned int msec_delay)
+{
+	if (psr->active || psr->busy_frontbuffer_bits)
+		return;
+
+	if (!work_busy(&psr->work.work))
+		schedule_delayed_work(&psr->work, msecs_to_jiffies(msec_delay));
+}
+
 /**
  * intel_psr_enable - Enable PSR
  * @intel_dp: Intel DP
@@ -534,8 +546,9 @@ void intel_psr_enable(struct intel_dp *intel_dp,
 		 *     - On HSW/BDW we get a recoverable frozen screen until
 		 *       next exit-activate sequence.
 		 */
-		schedule_delayed_work(&dev_priv->psr.work,
-				      msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5));
+		intel_psr_active_schedule(&dev_priv->psr,
+					  intel_dp->panel_power_cycle_delay
+					  * 5);
 	}
 
 unlock:
@@ -886,10 +899,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 	if (frontbuffer_bits)
 		dev_priv->psr.exit(dev_priv->psr.enabled, false);
 
-	if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
-		if (!work_busy(&dev_priv->psr.work.work))
-			schedule_delayed_work(&dev_priv->psr.work,
-					      msecs_to_jiffies(100));
+	intel_psr_active_schedule(&dev_priv->psr, PSR_ACTIVE_DELAY_MSEC);
 	mutex_unlock(&dev_priv->psr.lock);
 }
 
@@ -955,3 +965,23 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
 		dev_priv->psr.exit = hsw_psr_exit;
 	}
 }
+
+void intel_psr_exit(struct intel_dp *intel_dp, bool wait_exit)
+{
+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+	struct drm_device *dev = intel_dig_port->base.base.dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
+	if (!HAS_PSR(dev_priv))
+		return;
+
+	mutex_lock(&dev_priv->psr.lock);
+
+	if (dev_priv->psr.enabled != intel_dp)
+		goto out;
+
+	dev_priv->psr.exit(intel_dp, wait_exit);
+	intel_psr_active_schedule(&dev_priv->psr, PSR_ACTIVE_DELAY_MSEC);
+out:
+	mutex_unlock(&dev_priv->psr.lock);
+}
-- 
2.16.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-02-24  2:04 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-24  2:03 [PATCH 1/6] drm/i915/skl+: Add and enable DP AUX CH mutex José Roberto de Souza
2018-02-24  2:03 ` [PATCH 2/6] drm/i915/psr: Share the common code between PSR exit and disable José Roberto de Souza
2018-02-24  2:03 ` José Roberto de Souza [this message]
2018-02-27 20:35   ` [PATCH 3/6] drm/i915: Exit PSR before do a aux transaction in gen < 9 Pandiyan, Dhinakaran
2018-02-24  2:03 ` [PATCH 4/6] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink José Roberto de Souza
2018-02-24  2:03 ` [PATCH 5/6] drm/i915/psr: Handle PSR RFB storage error José Roberto de Souza
2018-02-24  2:03 ` [PATCH 6/6] drm/i915/psr/hsw+: Enable CRC check in the static frame on the sink side José Roberto de Souza
2018-02-24  2:42 ` ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/skl+: Add and enable DP AUX CH mutex Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180224020311.14813-3-jose.souza@intel.com \
    --to=jose.souza@intel.com \
    --cc=dhinakaran.pandiyan@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox