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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH 03/12] drm/i915/psr: Nuke aux frame sync
Date: Thu, 22 Mar 2018 15:57:28 -0700	[thread overview]
Message-ID: <20180322225728.GJ2557@intel.com> (raw)
In-Reply-To: <20180322214848.28022-3-jose.souza@intel.com>

On Thu, Mar 22, 2018 at 02:48:39PM -0700, José Roberto de Souza wrote:
> Without GTC enabled hardware is sending dummy aux frame sync value
> that is not useful to sink do selective update, that is why it also
> require that sink supports and requires the y-coordinate.
> 
> So removing everything related to aux frame sync, if GTC is enabled
> we can bring this back.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>

> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(but I would like to give a time for Vathsala to comment on this)

> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  1 -
>  drivers/gpu/drm/i915/intel_psr.c | 23 +----------------------
>  2 files changed, 1 insertion(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c9c3b2ba6a86..7fe00509e51a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -602,7 +602,6 @@ struct i915_psr {
>  	struct delayed_work work;
>  	unsigned busy_frontbuffer_bits;
>  	bool psr2_support;
> -	bool aux_frame_sync;
>  	bool link_standby;
>  	bool y_cord_support;
>  	bool colorimetry_support;
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index b8e083e10029..d46320a451d9 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -137,16 +137,9 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
>  
>  	if (INTEL_GEN(dev_priv) >= 9 &&
>  	    (intel_dp->psr_dpcd[0] & DP_PSR2_IS_SUPPORTED)) {
> -		uint8_t frame_sync_cap;
>  
>  		dev_priv->psr.sink_support = true;
> -		if (drm_dp_dpcd_readb(&intel_dp->aux,
> -				      DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
> -				      &frame_sync_cap) != 1)
> -			frame_sync_cap = 0;
> -		dev_priv->psr.aux_frame_sync = frame_sync_cap & DP_AUX_FRAME_SYNC_CAP;
> -		/* PSR2 needs frame sync as well */
> -		dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync;
> +		dev_priv->psr.psr2_support = true;
>  		DRM_DEBUG_KMS("PSR2 %s on sink",
>  			      dev_priv->psr.psr2_support ? "supported" : "not supported");
>  
> @@ -269,11 +262,6 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  
>  
> -	/* Enable AUX frame sync at sink */
> -	if (dev_priv->psr.aux_frame_sync)
> -		drm_dp_dpcd_writeb(&intel_dp->aux,
> -				DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
> -				DP_AUX_FRAME_SYNC_ENABLE);
>  	/* Enable ALPM at sink for psr2 */
>  	if (dev_priv->psr.psr2_support && dev_priv->psr.alpm)
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
> @@ -712,11 +700,6 @@ static void hsw_psr_disable(struct intel_dp *intel_dp,
>  		i915_reg_t psr_status;
>  		u32 psr_status_mask;
>  
> -		if (dev_priv->psr.aux_frame_sync)
> -			drm_dp_dpcd_writeb(&intel_dp->aux,
> -					DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
> -					0);
> -
>  		if (dev_priv->psr.psr2_support) {
>  			psr_status = EDP_PSR2_STATUS;
>  			psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
> @@ -860,10 +843,6 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
>  		return;
>  
>  	if (HAS_DDI(dev_priv)) {
> -		if (dev_priv->psr.aux_frame_sync)
> -			drm_dp_dpcd_writeb(&intel_dp->aux,
> -					DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
> -					0);
>  		if (dev_priv->psr.psr2_support) {
>  			val = I915_READ(EDP_PSR2_CTL);
>  			WARN_ON(!(val & EDP_PSR2_ENABLE));
> -- 
> 2.16.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2018-03-22 22:57 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-22 21:48 [PATCH 01/12] drm: Add DP PSR2 sink enable bit José Roberto de Souza
2018-03-22 21:48 ` [PATCH 02/12] drm: Add DP last received PSR SDP VSC register and bits José Roberto de Souza
2018-03-22 23:23   ` Rodrigo Vivi
2018-03-23  0:59     ` Souza, Jose
2018-03-23  5:40       ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 03/12] drm/i915/psr: Nuke aux frame sync José Roberto de Souza
2018-03-22 22:57   ` Rodrigo Vivi [this message]
2018-03-23  0:53     ` Souza, Jose
2018-03-23 22:14     ` Pandiyan, Dhinakaran
2018-03-23 23:49       ` Souza, Jose
2018-03-24  2:16         ` Pandiyan, Dhinakaran
2018-03-27  0:11           ` Souza, Jose
2018-03-22 21:48 ` [PATCH 04/12] drm/i915/psr: Tie PSR2 support to Y coordinate requirement José Roberto de Souza
2018-03-22 23:09   ` Rodrigo Vivi
2018-03-22 23:16     ` Souza, Jose
2018-03-23 22:59   ` Pandiyan, Dhinakaran
2018-03-23 23:51     ` Souza, Jose
2018-03-24  2:34       ` Pandiyan, Dhinakaran
2018-03-27 21:36         ` Rodrigo Vivi
2018-03-28  3:35           ` Nagaraju, Vathsala
2018-03-22 21:48 ` [PATCH 05/12] drm/i915/psr/cnl: Enable Y-coordinate support in source José Roberto de Souza
2018-03-22 21:48 ` [PATCH 06/12] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-22 21:48 ` [PATCH 07/12] drm/i915/psr: Use PSR2 macro for PSR2 José Roberto de Souza
2018-03-22 23:12   ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 08/12] drm/i915/psr: Cache sink synchronization latency José Roberto de Souza
2018-03-22 23:15   ` Rodrigo Vivi
2018-03-23  0:21     ` Souza, Jose
2018-03-22 21:48 ` [PATCH 09/12] drm/i915/psr: Set DPCD PSR2 enable bit when needed José Roberto de Souza
2018-03-22 23:20   ` Rodrigo Vivi
2018-03-22 21:48 ` [PATCH 10/12] drm/i915/debugfs: Print sink PSR state and debug info José Roberto de Souza
2018-03-22 23:31   ` Rodrigo Vivi
2018-03-23  0:06     ` Souza, Jose
2018-03-23  0:11       ` Rodrigo Vivi
2018-03-24  3:23       ` Pandiyan, Dhinakaran
2018-03-22 21:48 ` [PATCH 11/12] drm/i915/debugfs: Print information about what caused a PSR exit José Roberto de Souza
2018-03-22 23:27   ` Rodrigo Vivi
2018-03-22 23:43     ` Pandiyan, Dhinakaran
2018-03-23  0:16       ` Souza, Jose
2018-03-23  0:22         ` Pandiyan, Dhinakaran
2018-03-22 21:48 ` [PATCH 12/12] drm/i915/debugfs: Print how many blocks were sent in a selective update José Roberto de Souza
2018-03-22 23:46   ` Rodrigo Vivi
2018-03-23  0:52     ` Souza, Jose
2018-03-22 21:56 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm: Add DP PSR2 sink enable bit Patchwork
2018-03-22 22:14 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-03-22 23:19 ` [PATCH 01/12] " Rodrigo Vivi

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