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From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [PATCH v5 02/28] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
Date: Fri,  5 Oct 2018 16:22:40 -0700	[thread overview]
Message-ID: <20181005232306.31133-3-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181005232306.31133-1-manasi.d.navare@intel.com>

This patch defines the DP DSC receiver capability size that gives
total number of DP DSC DPCD registers.
This also adds a missing #defines for DP DSC support missed in the
commit id (ab6a46ea6842ce "Add DPCD definitions for DP 1.4 DSC feature")

v3:
* MIN_SLICE_WIDTH = 2560 (Anusha)
* Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320
v2:
* Add SHIFT define and DECOMPRESSION_EN define missed in prev patch

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 include/drm/drm_dp_helper.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 2a3843f248cf..18b55301a35d 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -231,6 +231,8 @@
 #define DP_DSC_MAX_BITS_PER_PIXEL_LOW       0x067   /* eDP 1.4 */
 
 #define DP_DSC_MAX_BITS_PER_PIXEL_HI        0x068   /* eDP 1.4 */
+# define DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK  (0x3 << 0)
+# define DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT 8
 
 #define DP_DSC_DEC_COLOR_FORMAT_CAP         0x069
 # define DP_DSC_RGB                         (1 << 0)
@@ -279,6 +281,8 @@
 # define DP_DSC_THROUGHPUT_MODE_1_1000      (14 << 4)
 
 #define DP_DSC_MAX_SLICE_WIDTH              0x06C
+#define DP_DSC_MIN_SLICE_WIDTH_VALUE        2560
+#define DP_DSC_SLICE_WIDTH_MULTIPLIER       320
 
 #define DP_DSC_SLICE_CAP_2                  0x06D
 # define DP_DSC_16_PER_DP_DSC_SINK          (1 << 0)
@@ -477,6 +481,7 @@
 # define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)
 
 #define DP_DSC_ENABLE                       0x160   /* DP 1.4 */
+# define DP_DECOMPRESSION_EN                (1 << 0)
 
 #define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
 # define DP_PSR_ENABLE			    (1 << 0)
@@ -963,6 +968,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
 
 #define DP_BRANCH_OUI_HEADER_SIZE	0xc
 #define DP_RECEIVER_CAP_SIZE		0xf
+#define DP_DSC_RECEIVER_CAP_SIZE        0xf
 #define EDP_PSR_RECEIVER_CAP_SIZE	2
 #define EDP_DISPLAY_CTL_CAP_SIZE	3
 
-- 
2.18.0

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  parent reply	other threads:[~2018-10-05 23:22 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-05 23:22 [PATCH v5 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare
2018-10-05 23:22 ` [PATCH v5 01/28] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming Manasi Navare
2018-10-05 23:22 ` Manasi Navare [this message]
2018-10-05 23:22 ` [PATCH v5 03/28] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init Manasi Navare
2018-10-05 23:22 ` [PATCH v5 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters Manasi Navare
2018-10-05 23:22 ` [PATCH v5 05/28] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC Manasi Navare
2018-10-05 23:22 ` [PATCH v5 06/28] drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported Manasi Navare
2018-10-05 23:22 ` [PATCH v5 07/28] drm/dp: Define payload size for DP SDP PPS packet Manasi Navare
2018-10-05 23:22 ` [PATCH v5 08/28] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-10-05 23:22 ` [PATCH v5 09/28] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-10-05 23:22 ` [PATCH v5 10/28] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-10-05 23:22 ` [PATCH v5 11/28] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-10-16  1:27   ` Manasi Navare
2018-10-05 23:22 ` [PATCH v5 12/28] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-10-05 23:22 ` [PATCH v5 13/28] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-10-16  1:29   ` Manasi Navare
2018-10-22 23:53   ` Srivatsa, Anusha
2018-10-05 23:22 ` [PATCH v5 14/28] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-10-05 23:22 ` [PATCH v5 15/28] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-10-22 22:04   ` [Intel-gfx] " Srivatsa, Anusha
2018-10-05 23:22 ` [PATCH v5 16/28] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-10-16  1:31   ` Manasi Navare
2018-10-22 22:26   ` Srivatsa, Anusha
2018-10-05 23:22 ` [PATCH v5 17/28] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-10-22 23:34   ` Srivatsa, Anusha
2018-10-23 18:42     ` Manasi Navare
2018-10-23 18:45       ` Srivatsa, Anusha
2018-10-05 23:22 ` [PATCH v5 18/28] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-10-22 18:50   ` Manasi Navare
2018-10-05 23:22 ` [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-10-16  1:22   ` Manasi Navare
2018-10-16 19:01   ` Ville Syrjälä
2018-10-16 19:19     ` Ville Syrjälä
2018-10-16 19:42       ` Manasi Navare
2018-10-16 19:45         ` Ville Syrjälä
2018-10-16 21:04           ` Manasi Navare
2018-10-16 21:21             ` [Intel-gfx] " Manasi Navare
2018-10-16 19:19     ` Manasi Navare
2018-10-16 19:33       ` Ville Syrjälä
2018-10-05 23:22 ` [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-10-16 19:58   ` Srivatsa, Anusha
2018-10-16 21:02     ` Manasi Navare
2018-10-17 16:58       ` Srivatsa, Anusha
2018-10-05 23:22 ` [PATCH v5 21/28] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-10-05 23:23 ` [PATCH v5 22/28] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-10-05 23:23 ` [PATCH v5 23/28] drm/i915/icl: Add Display Stream Splitter control registers Manasi Navare
2018-10-05 23:23 ` [PATCH v5 24/28] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-10-18 17:02   ` Ville Syrjälä
2018-10-19 22:40     ` Manasi Navare
2018-10-05 23:23 ` [PATCH v5 25/28] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-10-05 23:23 ` [PATCH v5 26/28] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-10-16  1:23   ` Manasi Navare
2018-10-16 19:31   ` Ville Syrjälä
2018-10-05 23:23 ` [PATCH v5 27/28] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-10-05 23:34   ` Lyude Paul
2018-10-09 22:20     ` Manasi Navare
2018-10-09 22:24       ` Lyude Paul
2018-10-05 23:23 ` [PATCH v5 28/28] drm/i915/dsc: Force DSC enable if requested by IGT/userspace Manasi Navare
2018-10-24 17:51   ` Srivatsa, Anusha
2018-10-06  0:21 ` ✗ Fi.CI.CHECKPATCH: warning for Display Stream Compression enabling on eDP/DP (rev5) Patchwork
2018-10-06  0:31 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-06  0:45 ` ✗ Fi.CI.BAT: failure " Patchwork

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