From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [PATCH v3 37/37] HAX drm/i915: add the fake lmem region
Date: Fri, 9 Aug 2019 23:26:43 +0100 [thread overview]
Message-ID: <20190809222643.23142-38-matthew.auld@intel.com> (raw)
In-Reply-To: <20190809222643.23142-1-matthew.auld@intel.com>
Intended for upstream testing so that we can still exercise the LMEM
plumbing and !HAS_MAPPABLE_APERTURE paths. Smoke tested on Skull Canyon
device. This works by allocating an intel_memory_region for a reserved
portion of system memory, which we treat like LMEM. For the LMEMBAR we
steal the aperture and 1:1 it map to the stolen region.
To enable simply set i915_fake_lmem_start= on the kernel cmdline with the
start of reserved region(see memmap=). The size of the region we can
use is determined by the size of the mappable aperture, so the size of
reserved region should be >= mappable_end.
eg. memmap=2G$16G i915_fake_lmem_start=0x400000000
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
arch/x86/kernel/early-quirks.c | 26 ++++++++
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 3 +
drivers/gpu/drm/i915/i915_drv.c | 8 +++
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +
drivers/gpu/drm/i915/intel_memory_region.h | 4 ++
drivers/gpu/drm/i915/intel_region_lmem.c | 69 ++++++++++++++++++++++
drivers/gpu/drm/i915/intel_region_lmem.h | 5 ++
include/drm/i915_drm.h | 3 +
8 files changed, 121 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 6f6b1d04dadf..9b04655e3926 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -603,6 +603,32 @@ static void __init intel_graphics_quirks(int num, int slot, int func)
}
}
+struct resource intel_graphics_fake_lmem_res __ro_after_init = DEFINE_RES_MEM(0, 0);
+EXPORT_SYMBOL(intel_graphics_fake_lmem_res);
+
+static int __init early_i915_fake_lmem_init(char *s)
+{
+ u64 start;
+ int ret;
+
+ if (*s == '=')
+ s++;
+
+ ret = kstrtoull(s, 16, &start);
+ if (ret)
+ return ret;
+
+ intel_graphics_fake_lmem_res.start = start;
+ intel_graphics_fake_lmem_res.end = SZ_2G; /* Placeholder; depends on aperture size */
+
+ printk(KERN_INFO "Intel graphics fake LMEM starts at %pa\n",
+ &intel_graphics_fake_lmem_res.start);
+
+ return 0;
+}
+
+early_param("i915_fake_lmem_start", early_i915_fake_lmem_init);
+
static void __init force_disable_hpet(int num, int slot, int func)
{
#ifdef CONFIG_HPET_TIMER
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 2194e2c3bdcd..bcdc7fd099af 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -252,6 +252,7 @@ void __iomem *i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object *obj,
resource_size_t offset;
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= intel_graphics_fake_lmem_res.start;
return io_mapping_map_wc(&obj->mm.region->iomap, offset, PAGE_SIZE);
}
@@ -262,6 +263,7 @@ void __iomem *i915_gem_object_lmem_io_map_page_atomic(struct drm_i915_gem_object
resource_size_t offset;
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= intel_graphics_fake_lmem_res.start;
return io_mapping_map_atomic_wc(&obj->mm.region->iomap, offset);
}
@@ -275,6 +277,7 @@ void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
GEM_BUG_ON(!(obj->flags & I915_BO_ALLOC_CONTIGUOUS));
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= intel_graphics_fake_lmem_res.start;
return io_mapping_map_wc(&obj->mm.region->iomap, offset, size);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 845e80c2acc0..f71685a6d49b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1474,6 +1474,14 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
dev_priv->drm.driver_features &= ~DRIVER_ATOMIC;
+ /* Check if we support fake LMEM -- enable for live selftests */
+ if (INTEL_GEN(dev_priv) >= 9 && i915_selftest.live &&
+ intel_graphics_fake_lmem_res.start) {
+ mkwrite_device_info(dev_priv)->memory_regions =
+ REGION_SMEM | REGION_LMEM;
+ GEM_BUG_ON(!HAS_LMEM(dev_priv));
+ }
+
ret = pci_enable_device(pdev);
if (ret)
goto out_fini;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0819ac9837dc..355268d85374 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2747,6 +2747,9 @@ int i915_gem_init_memory_regions(struct drm_i915_private *i915)
case INTEL_STOLEN:
mem = i915_gem_stolen_setup(i915);
break;
+ case INTEL_LMEM:
+ mem = intel_setup_fake_lmem(i915);
+ break;
}
if (IS_ERR(mem)) {
diff --git a/drivers/gpu/drm/i915/intel_memory_region.h b/drivers/gpu/drm/i915/intel_memory_region.h
index 340411dcf86b..13b3daec4127 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.h
+++ b/drivers/gpu/drm/i915/intel_memory_region.h
@@ -9,6 +9,7 @@
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <linux/io-mapping.h>
+#include <drm/drm_mm.h>
#include "i915_buddy.h"
@@ -69,6 +70,9 @@ struct intel_memory_region {
struct io_mapping iomap;
struct resource region;
+ /* For faking for lmem */
+ struct drm_mm_node fake_mappable;
+
struct i915_buddy_mm mm;
struct mutex mm_lock;
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c
index 7f1543e2759c..b8f671634919 100644
--- a/drivers/gpu/drm/i915/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/intel_region_lmem.c
@@ -41,9 +41,41 @@ lmem_create_object(struct intel_memory_region *mem,
return obj;
}
+static int init_fake_lmem_bar(struct intel_memory_region *mem)
+{
+ struct drm_i915_private *i915 = mem->i915;
+ struct i915_ggtt *ggtt = &i915->ggtt;
+ unsigned long n;
+ int ret;
+
+ mem->fake_mappable.start = 0;
+ mem->fake_mappable.size = resource_size(&mem->region);
+ mem->fake_mappable.color = I915_COLOR_UNEVICTABLE;
+
+ ret = drm_mm_reserve_node(&ggtt->vm.mm, &mem->fake_mappable);
+ if (ret)
+ return ret;
+
+ /* 1:1 map the mappable aperture to our reserved region */
+ for (n = 0; n < mem->fake_mappable.size >> PAGE_SHIFT; ++n) {
+ ggtt->vm.insert_page(&ggtt->vm,
+ mem->region.start + (n << PAGE_SHIFT),
+ n << PAGE_SHIFT, I915_CACHE_NONE, 0);
+ }
+
+ return 0;
+}
+
+static void release_fake_lmem_bar(struct intel_memory_region *mem)
+{
+ if (drm_mm_node_allocated(&mem->fake_mappable))
+ drm_mm_remove_node(&mem->fake_mappable);
+}
+
static void
region_lmem_release(struct intel_memory_region *mem)
{
+ release_fake_lmem_bar(mem);
io_mapping_fini(&mem->iomap);
intel_memory_region_release_buddy(mem);
}
@@ -53,6 +85,11 @@ region_lmem_init(struct intel_memory_region *mem)
{
int ret;
+ if (intel_graphics_fake_lmem_res.start) {
+ ret = init_fake_lmem_bar(mem);
+ GEM_BUG_ON(ret);
+ }
+
if (!io_mapping_init_wc(&mem->iomap,
mem->io_start,
resource_size(&mem->region)))
@@ -70,3 +107,35 @@ const struct intel_memory_region_ops intel_region_lmem_ops = {
.release = region_lmem_release,
.create_object = lmem_create_object,
};
+
+struct intel_memory_region *
+intel_setup_fake_lmem(struct drm_i915_private *i915)
+{
+ struct pci_dev *pdev = i915->drm.pdev;
+ struct intel_memory_region *mem;
+ resource_size_t mappable_end;
+ resource_size_t io_start;
+ resource_size_t start;
+
+ GEM_BUG_ON(HAS_MAPPABLE_APERTURE(i915));
+ GEM_BUG_ON(!intel_graphics_fake_lmem_res.start);
+
+ /* Your mappable aperture belongs to me now! */
+ mappable_end = pci_resource_len(pdev, 2);
+ io_start = pci_resource_start(pdev, 2),
+ start = intel_graphics_fake_lmem_res.start;
+
+ mem = intel_memory_region_create(i915,
+ start,
+ mappable_end,
+ I915_GTT_PAGE_SIZE_4K,
+ io_start,
+ &intel_region_lmem_ops);
+ if (!IS_ERR(mem)) {
+ DRM_INFO("Intel graphics fake LMEM: %pR\n", &mem->region);
+ DRM_INFO("Intel graphics fake LMEM IO start: %llx\n",
+ (u64)mem->io_start);
+ }
+
+ return mem;
+}
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.h b/drivers/gpu/drm/i915/intel_region_lmem.h
index ed2a3bab6443..213def7c7b8a 100644
--- a/drivers/gpu/drm/i915/intel_region_lmem.h
+++ b/drivers/gpu/drm/i915/intel_region_lmem.h
@@ -6,6 +6,11 @@
#ifndef __INTEL_REGION_LMEM_H
#define __INTEL_REGION_LMEM_H
+struct drm_i915_private;
+
extern const struct intel_memory_region_ops intel_region_lmem_ops;
+struct intel_memory_region *
+intel_setup_fake_lmem(struct drm_i915_private *i915);
+
#endif /* !__INTEL_REGION_LMEM_H */
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 23274cf92712..4d9dd548963b 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -39,6 +39,9 @@ bool i915_gpu_turbo_disable(void);
/* Exported from arch/x86/kernel/early-quirks.c */
extern struct resource intel_graphics_stolen_res;
+/* Exported from arch/x86/kernel/early-printk.c */
+extern struct resource intel_graphics_fake_lmem_res;
+
/*
* The Bridge device's PCI config space has information about the
* fb aperture size and the amount of pre-reserved memory.
--
2.20.1
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next prev parent reply other threads:[~2019-08-09 22:26 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 22:26 [PATCH v3 00/37] Introduce memory region concept (including device local memory) Matthew Auld
2019-08-09 22:26 ` [PATCH v3 01/37] drm/i915: buddy allocator Matthew Auld
2019-08-09 22:26 ` [PATCH v3 02/37] drm/i915: introduce intel_memory_region Matthew Auld
2019-08-10 9:51 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 03/37] drm/i915/region: support basic eviction Matthew Auld
2019-08-10 10:18 ` Chris Wilson
2019-08-11 5:59 ` Tang, CQ
2019-08-09 22:26 ` [PATCH v3 04/37] drm/i915/region: support continuous allocations Matthew Auld
2019-08-10 10:22 ` Chris Wilson
2019-08-13 19:17 ` Daniel Vetter
2019-08-09 22:26 ` [PATCH v3 05/37] drm/i915/region: support volatile objects Matthew Auld
2019-08-10 10:25 ` [Intel-gfx] " Chris Wilson
2019-08-10 10:26 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 06/37] drm/i915: Add memory region information to device_info Matthew Auld
2019-08-10 10:28 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 07/37] drm/i915: support creating LMEM objects Matthew Auld
2019-08-10 10:37 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 08/37] drm/i915: setup io-mapping for LMEM Matthew Auld
2019-08-09 22:26 ` [PATCH v3 09/37] drm/i915/lmem: support kernel mapping Matthew Auld
2019-08-09 22:26 ` [PATCH v3 10/37] drm/i915/blt: don't assume pinned intel_context Matthew Auld
2019-08-09 22:26 ` [PATCH v3 11/37] drm/i915/blt: bump size restriction Matthew Auld
2019-08-09 22:26 ` [PATCH v3 12/37] drm/i915/blt: support copying objects Matthew Auld
2019-08-10 10:45 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 13/37] drm/i915/selftests: move gpu-write-dw into utils Matthew Auld
2019-08-10 10:45 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 14/37] drm/i915/selftests: add write-dword test for LMEM Matthew Auld
2019-08-09 22:26 ` [PATCH v3 15/37] drm/i915/selftest: extend coverage to include LMEM huge-pages Matthew Auld
2019-08-09 22:26 ` [PATCH v3 16/37] drm/i915/lmem: support CPU relocations Matthew Auld
2019-08-10 10:50 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 17/37] drm/i915/lmem: support pread Matthew Auld
2019-08-09 22:26 ` [PATCH v3 18/37] drm/i915/lmem: support pwrite Matthew Auld
2019-08-09 22:26 ` [PATCH v3 19/37] drm/i915: enumerate and init each supported region Matthew Auld
2019-08-10 10:54 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 20/37] drm/i915: treat shmem as a region Matthew Auld
2019-08-09 22:26 ` [PATCH v3 21/37] drm/i915: treat stolen " Matthew Auld
2019-08-09 22:26 ` [PATCH v3 22/37] drm/i915: define HAS_MAPPABLE_APERTURE Matthew Auld
2019-08-09 22:26 ` [PATCH v3 23/37] drm/i915: do not map aperture if it is not available Matthew Auld
2019-08-10 11:02 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 24/37] drm/i915: set num_fence_regs to 0 if there is no aperture Matthew Auld
2019-08-09 22:46 ` Daniele Ceraolo Spurio
2019-08-13 21:22 ` Daniele Ceraolo Spurio
2019-08-09 22:26 ` [PATCH v3 25/37] drm/i915/selftests: check for missing aperture Matthew Auld
2019-08-09 22:26 ` [PATCH v3 26/37] drm/i915: error capture with no ggtt slot Matthew Auld
2019-08-10 11:11 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 27/37] drm/i915: Don't try to place HWS in non-existing mappable region Matthew Auld
2019-08-10 11:14 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 28/37] drm/i915: check for missing aperture in insert_mappable_node Matthew Auld
2019-08-10 11:15 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 29/37] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Matthew Auld
2019-08-10 11:28 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 30/37] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET Matthew Auld
2019-08-10 11:32 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 31/37] drm/i915/lmem: add helper to get CPU accessible offset Matthew Auld
2019-08-09 22:26 ` [PATCH v3 32/37] drm/i915: Add cpu and lmem fault handlers Matthew Auld
2019-08-10 11:38 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 33/37] drm/i915: cpu-map based dumb buffers Matthew Auld
2019-08-10 11:44 ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 34/37] drm/i915: support basic object migration Matthew Auld
2019-08-10 11:45 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 35/37] drm/i915: Introduce GEM_OBJECT_SETPARAM with I915_PARAM_MEMORY_REGION Matthew Auld
2019-08-10 11:54 ` Chris Wilson
2019-10-01 6:28 ` [Intel-gfx] " Niranjan Vishwanathapura
2019-08-09 22:26 ` [PATCH v3 36/37] drm/i915/query: Expose memory regions through the query uAPI Matthew Auld
2019-08-10 11:58 ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` Matthew Auld [this message]
2019-08-09 22:51 ` ✗ Fi.CI.CHECKPATCH: warning for Introduce memory region concept (including device local memory) (rev3) Patchwork
2019-08-09 23:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-09 23:45 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-08-13 19:20 ` [PATCH v3 00/37] Introduce memory region concept (including device local memory) Dave Airlie
2019-09-12 13:33 ` [Intel-gfx] " Joonas Lahtinen
2019-09-13 9:55 ` Dave Airlie
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