public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Daniel Vetter <daniel@ffwll.ch>
To: Matthew Auld <matthew.auld@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 04/37] drm/i915/region: support continuous allocations
Date: Tue, 13 Aug 2019 21:17:33 +0200	[thread overview]
Message-ID: <20190813191733.GZ7444@phenom.ffwll.local> (raw)
In-Reply-To: <20190809222643.23142-5-matthew.auld@intel.com>

On Fri, Aug 09, 2019 at 11:26:10PM +0100, Matthew Auld wrote:
> Some objects may need to be allocated as a continuous block, thinking
> ahead the various kernel io_mapping interfaces seem to expect it.

Not really, we can vmalloc for iomappings too.
-Daniel

> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> ---
>  .../gpu/drm/i915/gem/i915_gem_object_types.h  |   4 +
>  drivers/gpu/drm/i915/gem/i915_gem_region.c    |  10 +-
>  drivers/gpu/drm/i915/gem/i915_gem_region.h    |   3 +-
>  .../drm/i915/selftests/intel_memory_region.c  | 152 +++++++++++++++++-
>  drivers/gpu/drm/i915/selftests/mock_region.c  |   5 +-
>  5 files changed, 166 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 5e2fa37e9bc0..eb92243d473b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -116,6 +116,10 @@ struct drm_i915_gem_object {
>  
>  	I915_SELFTEST_DECLARE(struct list_head st_link);
>  
> +	unsigned long flags;
> +#define I915_BO_ALLOC_CONTIGUOUS BIT(0)
> +#define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS)
> +
>  	/*
>  	 * Is the object to be mapped as read-only to the GPU
>  	 * Only honoured if hardware has relevant pte bit
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.c b/drivers/gpu/drm/i915/gem/i915_gem_region.c
> index be126e70c90f..d9cd722b5dbf 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_region.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_region.c
> @@ -42,6 +42,9 @@ i915_gem_object_get_pages_buddy(struct drm_i915_gem_object *obj)
>  		return -ENOMEM;
>  	}
>  
> +	if (obj->flags & I915_BO_ALLOC_CONTIGUOUS)
> +		flags = I915_ALLOC_CONTIGUOUS;
> +
>  	ret = __intel_memory_region_get_pages_buddy(mem, size, flags, blocks);
>  	if (ret)
>  		goto err_free_sg;
> @@ -98,10 +101,12 @@ i915_gem_object_get_pages_buddy(struct drm_i915_gem_object *obj)
>  }
>  
>  void i915_gem_object_init_memory_region(struct drm_i915_gem_object *obj,
> -					struct intel_memory_region *mem)
> +					struct intel_memory_region *mem,
> +					unsigned long flags)
>  {
>  	INIT_LIST_HEAD(&obj->mm.blocks);
>  	obj->mm.region= mem;
> +	obj->flags = flags;
>  
>  	mutex_lock(&mem->obj_lock);
>  	list_add(&obj->mm.region_link, &mem->objects);
> @@ -125,6 +130,9 @@ i915_gem_object_create_region(struct intel_memory_region *mem,
>  	if (!mem)
>  		return ERR_PTR(-ENODEV);
>  
> +	if (flags & ~I915_BO_ALLOC_FLAGS)
> +		return ERR_PTR(-EINVAL);
> +
>  	size = round_up(size, mem->min_page_size);
>  
>  	GEM_BUG_ON(!size);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.h b/drivers/gpu/drm/i915/gem/i915_gem_region.h
> index ebddc86d78f7..f2ff6f8bff74 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_region.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_region.h
> @@ -17,7 +17,8 @@ void i915_gem_object_put_pages_buddy(struct drm_i915_gem_object *obj,
>  				     struct sg_table *pages);
>  
>  void i915_gem_object_init_memory_region(struct drm_i915_gem_object *obj,
> -					struct intel_memory_region *mem);
> +					struct intel_memory_region *mem,
> +					unsigned long flags);
>  void i915_gem_object_release_memory_region(struct drm_i915_gem_object *obj);
>  
>  struct drm_i915_gem_object *
> diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> index 2f13e4c1d999..70b467d4e811 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> @@ -81,17 +81,17 @@ static int igt_mock_fill(void *arg)
>  
>  static void igt_mark_evictable(struct drm_i915_gem_object *obj)
>  {
> -	i915_gem_object_unpin_pages(obj);
> +	if (i915_gem_object_has_pinned_pages(obj))
> +		i915_gem_object_unpin_pages(obj);
>  	obj->mm.madv = I915_MADV_DONTNEED;
>  	list_move(&obj->mm.region_link, &obj->mm.region->purgeable);
>  }
>  
> -static int igt_mock_shrink(void *arg)
> +static int igt_frag_region(struct intel_memory_region *mem,
> +			   struct list_head *objects)
>  {
> -	struct intel_memory_region *mem = arg;
>  	struct drm_i915_gem_object *obj;
>  	unsigned long n_objects;
> -	LIST_HEAD(objects);
>  	resource_size_t target;
>  	resource_size_t total;
>  	int err = 0;
> @@ -109,7 +109,7 @@ static int igt_mock_shrink(void *arg)
>  			goto err_close_objects;
>  		}
>  
> -		list_add(&obj->st_link, &objects);
> +		list_add(&obj->st_link, objects);
>  
>  		err = i915_gem_object_pin_pages(obj);
>  		if (err)
> @@ -123,6 +123,39 @@ static int igt_mock_shrink(void *arg)
>  			igt_mark_evictable(obj);
>  	}
>  
> +	return 0;
> +
> +err_close_objects:
> +	close_objects(objects);
> +	return err;
> +}
> +
> +static void igt_defrag_region(struct list_head *objects)
> +{
> +	struct drm_i915_gem_object *obj;
> +
> +	list_for_each_entry(obj, objects, st_link) {
> +		if (obj->mm.madv == I915_MADV_WILLNEED)
> +			igt_mark_evictable(obj);
> +	}
> +}
> +
> +static int igt_mock_shrink(void *arg)
> +{
> +	struct intel_memory_region *mem = arg;
> +	struct drm_i915_gem_object *obj;
> +	LIST_HEAD(objects);
> +	resource_size_t target;
> +	resource_size_t total;
> +	int err;
> +
> +	err = igt_frag_region(mem, &objects);
> +	if (err)
> +		return err;
> +
> +	total = resource_size(&mem->region);
> +	target = mem->mm.chunk_size;
> +
>  	while (target <= total / 2) {
>  		obj = i915_gem_object_create_region(mem, target, 0);
>  		if (IS_ERR(obj)) {
> @@ -154,11 +187,120 @@ static int igt_mock_shrink(void *arg)
>  	return err;
>  }
>  
> +static int igt_mock_continuous(void *arg)
> +{
> +	struct intel_memory_region *mem = arg;
> +	struct drm_i915_gem_object *obj;
> +	LIST_HEAD(objects);
> +	resource_size_t target;
> +	resource_size_t total;
> +	int err;
> +
> +	err = igt_frag_region(mem, &objects);
> +	if (err)
> +		return err;
> +
> +	total = resource_size(&mem->region);
> +	target = total / 2;
> +
> +	/*
> +	 * Sanity check that we can allocate all of the available fragmented
> +	 * space.
> +	 */
> +	obj = i915_gem_object_create_region(mem, target, 0);
> +	if (IS_ERR(obj)) {
> +		err = PTR_ERR(obj);
> +		goto err_close_objects;
> +	}
> +
> +	list_add(&obj->st_link, &objects);
> +
> +	err = i915_gem_object_pin_pages(obj);
> +	if (err) {
> +		pr_err("failed to allocate available space\n");
> +		goto err_close_objects;
> +	}
> +
> +	igt_mark_evictable(obj);
> +
> +	/* Try the smallest possible size -- should succeed */
> +	obj = i915_gem_object_create_region(mem, mem->mm.chunk_size,
> +					    I915_BO_ALLOC_CONTIGUOUS);
> +	if (IS_ERR(obj)) {
> +		err = PTR_ERR(obj);
> +		goto err_close_objects;
> +	}
> +
> +	list_add(&obj->st_link, &objects);
> +
> +	err = i915_gem_object_pin_pages(obj);
> +	if (err) {
> +		pr_err("failed to allocate smallest possible size\n");
> +		goto err_close_objects;
> +	}
> +
> +	igt_mark_evictable(obj);
> +
> +	if (obj->mm.pages->nents != 1) {
> +		pr_err("[1]object spans multiple sg entries\n");
> +		err = -EINVAL;
> +		goto err_close_objects;
> +	}
> +
> +	/*
> +	 * Even though there is enough free space for the allocation, we
> +	 * shouldn't be able to allocate it, given that it is fragmented, and
> +	 * non-continuous.
> +	 */
> +	obj = i915_gem_object_create_region(mem, target, I915_BO_ALLOC_CONTIGUOUS);
> +	if (IS_ERR(obj)) {
> +		err = PTR_ERR(obj);
> +		goto err_close_objects;
> +	}
> +
> +	list_add(&obj->st_link, &objects);
> +
> +	err = i915_gem_object_pin_pages(obj);
> +	if (!err) {
> +		pr_err("expected allocation to fail\n");
> +		err = -EINVAL;
> +		goto err_close_objects;
> +	}
> +
> +	igt_defrag_region(&objects);
> +
> +	/* Should now succeed */
> +	obj = i915_gem_object_create_region(mem, target, I915_BO_ALLOC_CONTIGUOUS);
> +	if (IS_ERR(obj)) {
> +		err = PTR_ERR(obj);
> +		goto err_close_objects;
> +	}
> +
> +	list_add(&obj->st_link, &objects);
> +
> +	err = i915_gem_object_pin_pages(obj);
> +	if (err) {
> +		pr_err("failed to allocate from defraged area\n");
> +		goto err_close_objects;
> +	}
> +
> +	if (obj->mm.pages->nents != 1) {
> +		pr_err("object spans multiple sg entries\n");
> +		err = -EINVAL;
> +	}
> +
> +err_close_objects:
> +	close_objects(&objects);
> +
> +	return err;
> +}
> +
>  int intel_memory_region_mock_selftests(void)
>  {
>  	static const struct i915_subtest tests[] = {
>  		SUBTEST(igt_mock_fill),
>  		SUBTEST(igt_mock_shrink),
> +		SUBTEST(igt_mock_continuous),
>  	};
>  	struct intel_memory_region *mem;
>  	struct drm_i915_private *i915;
> diff --git a/drivers/gpu/drm/i915/selftests/mock_region.c b/drivers/gpu/drm/i915/selftests/mock_region.c
> index cc97250dca62..d73f37712c44 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_region.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_region.c
> @@ -23,6 +23,9 @@ mock_object_create(struct intel_memory_region *mem,
>  	struct drm_i915_gem_object *obj;
>  	unsigned int cache_level;
>  
> +	if (flags & I915_BO_ALLOC_CONTIGUOUS)
> +		size = roundup_pow_of_two(size);
> +
>  	if (size > BIT(mem->mm.max_order) * mem->mm.chunk_size)
>  		return ERR_PTR(-E2BIG);
>  
> @@ -38,7 +41,7 @@ mock_object_create(struct intel_memory_region *mem,
>  	cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
>  	i915_gem_object_set_cache_coherency(obj, cache_level);
>  
> -	i915_gem_object_init_memory_region(obj, mem);
> +	i915_gem_object_init_memory_region(obj, mem, flags);
>  
>  	return obj;
>  }
> -- 
> 2.20.1
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-08-13 19:17 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-09 22:26 [PATCH v3 00/37] Introduce memory region concept (including device local memory) Matthew Auld
2019-08-09 22:26 ` [PATCH v3 01/37] drm/i915: buddy allocator Matthew Auld
2019-08-09 22:26 ` [PATCH v3 02/37] drm/i915: introduce intel_memory_region Matthew Auld
2019-08-10  9:51   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 03/37] drm/i915/region: support basic eviction Matthew Auld
2019-08-10 10:18   ` Chris Wilson
2019-08-11  5:59     ` Tang, CQ
2019-08-09 22:26 ` [PATCH v3 04/37] drm/i915/region: support continuous allocations Matthew Auld
2019-08-10 10:22   ` Chris Wilson
2019-08-13 19:17   ` Daniel Vetter [this message]
2019-08-09 22:26 ` [PATCH v3 05/37] drm/i915/region: support volatile objects Matthew Auld
2019-08-10 10:25   ` [Intel-gfx] " Chris Wilson
2019-08-10 10:26   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 06/37] drm/i915: Add memory region information to device_info Matthew Auld
2019-08-10 10:28   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 07/37] drm/i915: support creating LMEM objects Matthew Auld
2019-08-10 10:37   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 08/37] drm/i915: setup io-mapping for LMEM Matthew Auld
2019-08-09 22:26 ` [PATCH v3 09/37] drm/i915/lmem: support kernel mapping Matthew Auld
2019-08-09 22:26 ` [PATCH v3 10/37] drm/i915/blt: don't assume pinned intel_context Matthew Auld
2019-08-09 22:26 ` [PATCH v3 11/37] drm/i915/blt: bump size restriction Matthew Auld
2019-08-09 22:26 ` [PATCH v3 12/37] drm/i915/blt: support copying objects Matthew Auld
2019-08-10 10:45   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 13/37] drm/i915/selftests: move gpu-write-dw into utils Matthew Auld
2019-08-10 10:45   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 14/37] drm/i915/selftests: add write-dword test for LMEM Matthew Auld
2019-08-09 22:26 ` [PATCH v3 15/37] drm/i915/selftest: extend coverage to include LMEM huge-pages Matthew Auld
2019-08-09 22:26 ` [PATCH v3 16/37] drm/i915/lmem: support CPU relocations Matthew Auld
2019-08-10 10:50   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 17/37] drm/i915/lmem: support pread Matthew Auld
2019-08-09 22:26 ` [PATCH v3 18/37] drm/i915/lmem: support pwrite Matthew Auld
2019-08-09 22:26 ` [PATCH v3 19/37] drm/i915: enumerate and init each supported region Matthew Auld
2019-08-10 10:54   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 20/37] drm/i915: treat shmem as a region Matthew Auld
2019-08-09 22:26 ` [PATCH v3 21/37] drm/i915: treat stolen " Matthew Auld
2019-08-09 22:26 ` [PATCH v3 22/37] drm/i915: define HAS_MAPPABLE_APERTURE Matthew Auld
2019-08-09 22:26 ` [PATCH v3 23/37] drm/i915: do not map aperture if it is not available Matthew Auld
2019-08-10 11:02   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 24/37] drm/i915: set num_fence_regs to 0 if there is no aperture Matthew Auld
2019-08-09 22:46   ` Daniele Ceraolo Spurio
2019-08-13 21:22     ` Daniele Ceraolo Spurio
2019-08-09 22:26 ` [PATCH v3 25/37] drm/i915/selftests: check for missing aperture Matthew Auld
2019-08-09 22:26 ` [PATCH v3 26/37] drm/i915: error capture with no ggtt slot Matthew Auld
2019-08-10 11:11   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 27/37] drm/i915: Don't try to place HWS in non-existing mappable region Matthew Auld
2019-08-10 11:14   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 28/37] drm/i915: check for missing aperture in insert_mappable_node Matthew Auld
2019-08-10 11:15   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 29/37] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Matthew Auld
2019-08-10 11:28   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 30/37] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET Matthew Auld
2019-08-10 11:32   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 31/37] drm/i915/lmem: add helper to get CPU accessible offset Matthew Auld
2019-08-09 22:26 ` [PATCH v3 32/37] drm/i915: Add cpu and lmem fault handlers Matthew Auld
2019-08-10 11:38   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 33/37] drm/i915: cpu-map based dumb buffers Matthew Auld
2019-08-10 11:44   ` Chris Wilson
2019-08-09 22:26 ` [PATCH v3 34/37] drm/i915: support basic object migration Matthew Auld
2019-08-10 11:45   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 35/37] drm/i915: Introduce GEM_OBJECT_SETPARAM with I915_PARAM_MEMORY_REGION Matthew Auld
2019-08-10 11:54   ` Chris Wilson
2019-10-01  6:28   ` [Intel-gfx] " Niranjan Vishwanathapura
2019-08-09 22:26 ` [PATCH v3 36/37] drm/i915/query: Expose memory regions through the query uAPI Matthew Auld
2019-08-10 11:58   ` [Intel-gfx] " Chris Wilson
2019-08-09 22:26 ` [PATCH v3 37/37] HAX drm/i915: add the fake lmem region Matthew Auld
2019-08-09 22:51 ` ✗ Fi.CI.CHECKPATCH: warning for Introduce memory region concept (including device local memory) (rev3) Patchwork
2019-08-09 23:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-09 23:45 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-08-13 19:20 ` [PATCH v3 00/37] Introduce memory region concept (including device local memory) Dave Airlie
2019-09-12 13:33   ` [Intel-gfx] " Joonas Lahtinen
2019-09-13  9:55     ` Dave Airlie

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190813191733.GZ7444@phenom.ffwll.local \
    --to=daniel@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.auld@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox