[PATCH v9 0/6] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[PATCH v9 0/6] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[Ramalingam C]

Enabling the HDCP1.4 and 2.2 on TGL by supporting the HW block movement
from DDI into transcoder.

v9:
  s/trans/cpu_transcoder
  enum port and transcoders are declared at few headers.

Ramalingam C (6):
  drm/i915: mei_hdcp: I915 sends ddi index as per ME FW
  drm: Move port definition back to i915 header
  drm: Extend I915 mei interface for transcoder info
  misc/mei/hdcp: Fill transcoder index in port info
  drm/i915/hdcp: update current transcoder into  intel_hdcp
  drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+

 drivers/gpu/drm/i915/display/intel_bios.h     |   1 +
 drivers/gpu/drm/i915/display/intel_display.h  |  18 ++
 .../drm/i915/display/intel_display_types.h    |   7 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   3 +
 drivers/gpu/drm/i915/display/intel_dp.h       |   1 +
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 210 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_hdcp.h     |   4 +
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  13 +-
 drivers/gpu/drm/i915/display/intel_hdmi.h     |   1 +
 drivers/gpu/drm/i915/display/intel_hotplug.h  |   1 +
 drivers/gpu/drm/i915/display/intel_sdvo.h     |   1 +
 drivers/gpu/drm/i915/i915_reg.h               | 124 ++++++++++-
 drivers/misc/mei/hdcp/mei_hdcp.c              |  45 ++--
 drivers/misc/mei/hdcp/mei_hdcp.h              |  16 +-
 include/drm/i915_drm.h                        |  18 --
 include/drm/i915_mei_hdcp_interface.h         |  29 ++-
 16 files changed, 372 insertions(+), 120 deletions(-)

-- 
2.20.1

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[PATCH v9 1/6] drm/i915: mei_hdcp: I915 sends ddi index as per ME FW

[Ramalingam C]

I915 converts it's port value into ddi index defiend by ME FW
and pass it as a member of hdcp_port_data structure.

Hence expose the enum mei_fw_ddi to I915 through
i915_mei_interface.h.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 15 +++++++++-
 drivers/misc/mei/hdcp/mei_hdcp.c          | 34 ++++++++---------------
 drivers/misc/mei/hdcp/mei_hdcp.h          | 12 --------
 include/drm/i915_mei_hdcp_interface.h     | 16 +++++++++--
 4 files changed, 39 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 6ec5ceeab601..534832f435dc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1749,13 +1749,26 @@ static const struct component_ops i915_hdcp_component_ops = {
 	.unbind = i915_hdcp_component_unbind,
 };
 
+static inline
+enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
+{
+	switch (port) {
+	case PORT_A:
+		return MEI_DDI_A;
+	case PORT_B ... PORT_F:
+		return (enum mei_fw_ddi)port;
+	default:
+		return MEI_DDI_INVALID_PORT;
+	}
+}
+
 static inline int initialize_hdcp_port_data(struct intel_connector *connector,
 					    const struct intel_hdcp_shim *shim)
 {
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct hdcp_port_data *data = &hdcp->port_data;
 
-	data->port = connector->encoder->port;
+	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
 	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
 	data->protocol = (u8)shim->protocol;
 
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index c681f6fab342..3638c77eba26 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -27,18 +27,6 @@
 
 #include "mei_hdcp.h"
 
-static inline u8 mei_get_ddi_index(enum port port)
-{
-	switch (port) {
-	case PORT_A:
-		return MEI_DDI_A;
-	case PORT_B ... PORT_F:
-		return (u8)port;
-	default:
-		return MEI_DDI_INVALID_PORT;
-	}
-}
-
 /**
  * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
  * @dev: device corresponding to the mei_cl_device
@@ -69,7 +57,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
 				WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
 
 	session_init_in.port.integrated_port_type = data->port_type;
-	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_init_in.port.physical_port = (u8)data->fw_ddi;
 	session_init_in.protocol = data->protocol;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
@@ -138,7 +126,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
 				WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
 
 	verify_rxcert_in.port.integrated_port_type = data->port_type;
-	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
 
 	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
 	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
@@ -208,7 +196,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
 	send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
 
 	send_hprime_in.port.integrated_port_type = data->port_type;
-	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
 
 	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
 	       HDCP_2_2_H_PRIME_LEN);
@@ -265,7 +253,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
 					WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
 
 	pairing_info_in.port.integrated_port_type = data->port_type;
-	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
+	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
 
 	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
 	       HDCP_2_2_E_KH_KM_LEN);
@@ -323,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
 	lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
 
 	lc_init_in.port.integrated_port_type = data->port_type;
-	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	lc_init_in.port.physical_port = (u8)data->fw_ddi;
 
 	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
 	if (byte < 0) {
@@ -378,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
 					WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
 
 	verify_lprime_in.port.integrated_port_type = data->port_type;
-	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
 
 	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
 	       HDCP_2_2_L_PRIME_LEN);
@@ -435,7 +423,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
 	get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
 
 	get_skey_in.port.integrated_port_type = data->port_type;
-	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
+	get_skey_in.port.physical_port = (u8)data->fw_ddi;
 
 	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
 	if (byte < 0) {
@@ -499,7 +487,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
 					WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
 
 	verify_repeater_in.port.integrated_port_type = data->port_type;
-	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
 
 	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
 	       HDCP_2_2_RXINFO_LEN);
@@ -569,7 +557,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
 			WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
 
 	verify_mprime_in.port.integrated_port_type = data->port_type;
-	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
 
 	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
 	       HDCP_2_2_MPRIME_LEN);
@@ -630,7 +618,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
 	enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
 
 	enable_auth_in.port.integrated_port_type = data->port_type;
-	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
+	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
 	enable_auth_in.stream_type = data->streams[0].stream_type;
 
 	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
@@ -684,7 +672,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
 				WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
 
 	session_close_in.port.integrated_port_type = data->port_type;
-	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_close_in.port.physical_port = (u8)data->fw_ddi;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
 			      sizeof(session_close_in));
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index e4b1cd54c853..e60282eb2d48 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -362,16 +362,4 @@ struct wired_cmd_repeater_auth_stream_req_out {
 	struct hdcp_cmd_header	header;
 	struct hdcp_port_id	port;
 } __packed;
-
-enum mei_fw_ddi {
-	MEI_DDI_INVALID_PORT = 0x0,
-
-	MEI_DDI_B = 1,
-	MEI_DDI_C,
-	MEI_DDI_D,
-	MEI_DDI_E,
-	MEI_DDI_F,
-	MEI_DDI_A = 7,
-	MEI_DDI_RANGE_END = MEI_DDI_A,
-};
 #endif /* __MEI_HDCP_H__ */
diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
index 8c344255146a..a97acf1c9710 100644
--- a/include/drm/i915_mei_hdcp_interface.h
+++ b/include/drm/i915_mei_hdcp_interface.h
@@ -42,9 +42,21 @@ enum hdcp_wired_protocol {
 	HDCP_PROTOCOL_DP
 };
 
+enum mei_fw_ddi {
+	MEI_DDI_INVALID_PORT = 0x0,
+
+	MEI_DDI_B = 1,
+	MEI_DDI_C,
+	MEI_DDI_D,
+	MEI_DDI_E,
+	MEI_DDI_F,
+	MEI_DDI_A = 7,
+	MEI_DDI_RANGE_END = MEI_DDI_A,
+};
+
 /**
  * struct hdcp_port_data - intel specific HDCP port data
- * @port: port index as per I915
+ * @fw_ddi: ddi index as per ME FW
  * @port_type: HDCP port type as per ME FW classification
  * @protocol: HDCP adaptation as per ME FW
  * @k: No of streams transmitted on a port. Only on DP MST this is != 1
@@ -56,7 +68,7 @@ enum hdcp_wired_protocol {
  *	     streams
  */
 struct hdcp_port_data {
-	enum port port;
+	enum mei_fw_ddi fw_ddi;
 	u8 port_type;
 	u8 protocol;
 	u16 k;
-- 
2.20.1

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[PATCH v9 2/6] drm: Move port definition back to i915 header

[Ramalingam C]

Handled the need for exposing enum port to mei_hdcp driver, by
converting the port into ddi index as per ME FW and sending to mei_hdcp.

Hence move enum port definition into I915 driver itself.

v2:
  intel_display.h is included in intel_hdcp.h
v3:
  enum port is declared in headers.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.h    |  1 +
 drivers/gpu/drm/i915/display/intel_display.h | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h      |  1 +
 drivers/gpu/drm/i915/display/intel_hdcp.h    |  1 +
 drivers/gpu/drm/i915/display/intel_hdmi.h    |  1 +
 drivers/gpu/drm/i915/display/intel_hotplug.h |  1 +
 drivers/gpu/drm/i915/display/intel_sdvo.h    |  1 +
 include/drm/i915_drm.h                       | 18 ------------------
 8 files changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 4969189e620f..4c6e56a3940a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -35,6 +35,7 @@
 #include <drm/i915_drm.h>
 
 struct drm_i915_private;
+enum port;
 
 enum intel_backlight_type {
 	INTEL_BACKLIGHT_PMIC,
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index e57e6969051d..40610d51327e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -182,6 +182,24 @@ enum plane_id {
 	for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
 		for_each_if((__crtc)->plane_ids_mask & BIT(__p))
 
+enum port {
+	PORT_NONE = -1,
+
+	PORT_A = 0,
+	PORT_B,
+	PORT_C,
+	PORT_D,
+	PORT_E,
+	PORT_F,
+	PORT_G,
+	PORT_H,
+	PORT_I,
+
+	I915_MAX_PORTS
+};
+
+#define port_name(p) ((p) + 'A')
+
 /*
  * Ports identifier referenced from other drivers.
  * Expected to remain stable over time
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 657bbb1f5ed0..e01d1f89409d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -13,6 +13,7 @@
 #include "i915_reg.h"
 
 enum pipe;
+enum port;
 struct drm_connector_state;
 struct drm_encoder;
 struct drm_i915_private;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 13555b054930..59a2b40405cc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -15,6 +15,7 @@ struct drm_connector_state;
 struct drm_i915_private;
 struct intel_connector;
 struct intel_hdcp_shim;
+enum port;
 
 void intel_hdcp_atomic_check(struct drm_connector *connector,
 			     struct drm_connector_state *old_state,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index 106c2e0bc3c9..cf1ea5427639 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -23,6 +23,7 @@ struct intel_crtc_state;
 struct intel_hdmi;
 struct drm_connector_state;
 union hdmi_infoframe;
+enum port;
 
 void intel_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg,
 		     enum port port);
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.h b/drivers/gpu/drm/i915/display/intel_hotplug.h
index b0cd447b7fbc..087b5f57b321 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.h
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.h
@@ -13,6 +13,7 @@
 struct drm_i915_private;
 struct intel_connector;
 struct intel_encoder;
+enum port;
 
 void intel_hpd_poll_init(struct drm_i915_private *dev_priv);
 enum intel_hotplug_state intel_encoder_hotplug(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.h b/drivers/gpu/drm/i915/display/intel_sdvo.h
index c9e05bcdd141..a66f224aa17d 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.h
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.h
@@ -14,6 +14,7 @@
 
 struct drm_i915_private;
 enum pipe;
+enum port;
 
 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
 			     i915_reg_t sdvo_reg, enum pipe *pipe);
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 23274cf92712..6722005884db 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -100,22 +100,4 @@ extern struct resource intel_graphics_stolen_res;
 #define INTEL_GEN11_BSM_DW1	0xc4
 #define   INTEL_BSM_MASK	(-(1u << 20))
 
-enum port {
-	PORT_NONE = -1,
-
-	PORT_A = 0,
-	PORT_B,
-	PORT_C,
-	PORT_D,
-	PORT_E,
-	PORT_F,
-	PORT_G,
-	PORT_H,
-	PORT_I,
-
-	I915_MAX_PORTS
-};
-
-#define port_name(p) ((p) + 'A')
-
 #endif				/* _I915_DRM_H_ */
-- 
2.20.1

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[PATCH v9 3/6] drm: Extend I915 mei interface for transcoder info

[Ramalingam C]

I915 needs to send the index of the transcoder as per ME FW.
To support this, define enum mei_fw_ddi and add as a member into
the struct hdcp_port_data.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 include/drm/i915_mei_hdcp_interface.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
index a97acf1c9710..0de629bf2f62 100644
--- a/include/drm/i915_mei_hdcp_interface.h
+++ b/include/drm/i915_mei_hdcp_interface.h
@@ -54,9 +54,21 @@ enum mei_fw_ddi {
 	MEI_DDI_RANGE_END = MEI_DDI_A,
 };
 
+enum mei_fw_tc {
+	MEI_INVALID_TRANSCODER = 0x00,	/* Invalid transcoder type */
+	MEI_TC_EDP,			/* Transcoder for eDP */
+	MEI_TC_DSI0,			/* Transcoder for DSI0 */
+	MEI_TC_DSI1,			/* Transcoder for DSI1 */
+	MEI_TC_A = 0x10,		/* Transcoder TCA */
+	MEI_TC_B,			/* Transcoder TCB */
+	MEI_TC_C,			/* Transcoder TCC */
+	MEI_TC_D			/* Transcoder TCD */
+};
+
 /**
  * struct hdcp_port_data - intel specific HDCP port data
  * @fw_ddi: ddi index as per ME FW
+ * @fw_tc: transcoder index as per ME FW
  * @port_type: HDCP port type as per ME FW classification
  * @protocol: HDCP adaptation as per ME FW
  * @k: No of streams transmitted on a port. Only on DP MST this is != 1
@@ -69,6 +81,7 @@ enum mei_fw_ddi {
  */
 struct hdcp_port_data {
 	enum mei_fw_ddi fw_ddi;
+	enum mei_fw_tc fw_tc;
 	u8 port_type;
 	u8 protocol;
 	u16 k;
-- 
2.20.1

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[PATCH v9 4/6] misc/mei/hdcp: Fill transcoder index in port info

[Ramalingam C]

For gen12+ platform we need to pass the transcoder info
as part of the port info into ME FW.

This change fills the payload for ME FW from hdcp_port_data.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 11 +++++++++++
 drivers/misc/mei/hdcp/mei_hdcp.h |  4 +++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 3638c77eba26..93027fd96c71 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -58,6 +58,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
 
 	session_init_in.port.integrated_port_type = data->port_type;
 	session_init_in.port.physical_port = (u8)data->fw_ddi;
+	session_init_in.port.attached_transcoder = (u8)data->fw_tc;
 	session_init_in.protocol = data->protocol;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
@@ -127,6 +128,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
 
 	verify_rxcert_in.port.integrated_port_type = data->port_type;
 	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
+	verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
 	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
@@ -197,6 +199,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
 
 	send_hprime_in.port.integrated_port_type = data->port_type;
 	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
+	send_hprime_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
 	       HDCP_2_2_H_PRIME_LEN);
@@ -254,6 +257,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
 
 	pairing_info_in.port.integrated_port_type = data->port_type;
 	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
+	pairing_info_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
 	       HDCP_2_2_E_KH_KM_LEN);
@@ -312,6 +316,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
 
 	lc_init_in.port.integrated_port_type = data->port_type;
 	lc_init_in.port.physical_port = (u8)data->fw_ddi;
+	lc_init_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
 	if (byte < 0) {
@@ -367,6 +372,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
 
 	verify_lprime_in.port.integrated_port_type = data->port_type;
 	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
+	verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
 	       HDCP_2_2_L_PRIME_LEN);
@@ -424,6 +430,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
 
 	get_skey_in.port.integrated_port_type = data->port_type;
 	get_skey_in.port.physical_port = (u8)data->fw_ddi;
+	get_skey_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
 	if (byte < 0) {
@@ -488,6 +495,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
 
 	verify_repeater_in.port.integrated_port_type = data->port_type;
 	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
+	verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
 	       HDCP_2_2_RXINFO_LEN);
@@ -558,6 +566,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
 
 	verify_mprime_in.port.integrated_port_type = data->port_type;
 	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
+	verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
 	       HDCP_2_2_MPRIME_LEN);
@@ -619,6 +628,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
 
 	enable_auth_in.port.integrated_port_type = data->port_type;
 	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
+	enable_auth_in.port.attached_transcoder = (u8)data->fw_tc;
 	enable_auth_in.stream_type = data->streams[0].stream_type;
 
 	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
@@ -673,6 +683,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
 
 	session_close_in.port.integrated_port_type = data->port_type;
 	session_close_in.port.physical_port = (u8)data->fw_ddi;
+	session_close_in.port.attached_transcoder = (u8)data->fw_tc;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
 			      sizeof(session_close_in));
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index e60282eb2d48..58e439d2fc1a 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
 /* Uniquely identifies the hdcp port being addressed for a given command. */
 struct hdcp_port_id {
 	u8	integrated_port_type;
+	/* Used until Gen11.5. Must be zero for Gen11.5+ */
 	u8	physical_port;
-	u16	reserved;
+	u8	attached_transcoder;
+	u8	reserved;
 } __packed;
 
 /*
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v9 5/6] drm/i915/hdcp: update current transcoder into intel_hdcp

[Ramalingam C]

On gen12+ platforms, HDCP HW is associated to the transcoder.
Hence on every modeset update associated transcoder into the
intel_hdcp of the port.

v2:
  s/trans/cpu_transcoder [Jani]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  7 +++
 drivers/gpu/drm/i915/display/intel_dp.c       |  3 ++
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 49 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_hdcp.h     |  3 ++
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  3 ++
 5 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 449abaea619f..fc85b3e284d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -388,6 +388,13 @@ struct intel_hdcp {
 	wait_queue_head_t cp_irq_queue;
 	atomic_t cp_irq_count;
 	int cp_irq_count_cached;
+
+	/*
+	 * HDCP register access for gen12+ need the transcoder associated.
+	 * Transcoder attached to the connector could be changed at modeset.
+	 * Hence caching the transcoder here.
+	 */
+	enum transcoder cpu_transcoder;
 };
 
 struct intel_connector {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 921ad0a2f7ba..ba5317d56da7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2244,6 +2244,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
 	intel_psr_compute_config(intel_dp, pipe_config);
 
+	intel_hdcp_transcoder_config(intel_connector,
+				     pipe_config->cpu_transcoder);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 534832f435dc..1e5548833e8f 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1762,13 +1762,60 @@ enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
 	}
 }
 
+static inline
+enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
+{
+	switch (cpu_transcoder) {
+	case TRANSCODER_A ... TRANSCODER_D:
+		return (enum mei_fw_tc)(cpu_transcoder | 0x10);
+	case TRANSCODER_EDP:
+		return MEI_TC_EDP;
+	case TRANSCODER_DSI_0:
+		return MEI_TC_DSI0;
+	case TRANSCODER_DSI_1:
+		return MEI_TC_DSI1;
+	default:
+		return MEI_INVALID_TRANSCODER;
+	}
+}
+
+void intel_hdcp_transcoder_config(struct intel_connector *connector,
+				  enum transcoder cpu_transcoder)
+{
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+
+	if (!hdcp->shim)
+		return;
+
+	if (INTEL_GEN(dev_priv) >= 12) {
+		mutex_lock(&hdcp->mutex);
+		hdcp->cpu_transcoder = cpu_transcoder;
+		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
+		mutex_unlock(&hdcp->mutex);
+	}
+}
+
 static inline int initialize_hdcp_port_data(struct intel_connector *connector,
 					    const struct intel_hdcp_shim *shim)
 {
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct hdcp_port_data *data = &hdcp->port_data;
+	struct intel_crtc *crtc;
+
+	if (INTEL_GEN(dev_priv) < 12) {
+		data->fw_ddi =
+			intel_get_mei_fw_ddi_index(connector->encoder->port);
+	} else {
+		crtc = to_intel_crtc(connector->base.state->crtc);
+		if (crtc) {
+			hdcp->cpu_transcoder = crtc->config->cpu_transcoder;
+			data->fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+		}
+		data->fw_ddi = intel_get_mei_fw_ddi_index(PORT_NONE);
+	}
 
-	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
 	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
 	data->protocol = (u8)shim->protocol;
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 59a2b40405cc..41c1053d9e38 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -16,10 +16,13 @@ struct drm_i915_private;
 struct intel_connector;
 struct intel_hdcp_shim;
 enum port;
+enum transcoder;
 
 void intel_hdcp_atomic_check(struct drm_connector *connector,
 			     struct drm_connector_state *old_state,
 			     struct drm_connector_state *new_state);
+void intel_hdcp_transcoder_config(struct intel_connector *connector,
+				  enum transcoder cpu_transcoder);
 int intel_hdcp_init(struct intel_connector *connector,
 		    const struct intel_hdcp_shim *hdcp_shim);
 int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index e02f0faecf02..6e9bb6bd1ee2 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2431,6 +2431,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 		return -EINVAL;
 	}
 
+	intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
+				     pipe_config->cpu_transcoder);
+
 	return 0;
 }
 
-- 
2.20.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH v9 6/6] drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+

[Ramalingam C]

From Gen12 onwards, HDCP HW block is implemented within transcoders.
Till Gen11 HDCP HW block was part of DDI.

Hence required changes in HW programming is handled here.

As ME FW needs the transcoder detail on which HDCP is enabled
on Gen12+ platform, we are populating the detail in hdcp_port_data.

v2:
  _MMIO_TRANS is used [Lucas and Daniel]
  platform check is moved into the caller [Lucas]
v3:
  platform check is moved into a macro [Shashank]
v4:
  Few optimizations in the coding [Shashank]
v5:
  Fixed alignment in macro definition in i915_reg.h [Shashank]
  unused variables "reg" is removed.
v6:
  Configuring the transcoder at compute_config.
  transcoder is used instead of pipe in macros.
  Rebased.
v7:
  transcoder is cached at intel_hdcp
  hdcp_port_data is configured with transcoder index asper ME FW.
v8:
  s/trans/cpu_transcoder
  s/tc/cpu_transcoder

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> [v5]
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 148 ++++++++++++++--------
 drivers/gpu/drm/i915/display/intel_hdmi.c |  10 +-
 drivers/gpu/drm/i915/i915_reg.h           | 124 ++++++++++++++++--
 3 files changed, 219 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 1e5548833e8f..e2084403db27 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -18,6 +18,7 @@
 #include "intel_display_types.h"
 #include "intel_hdcp.h"
 #include "intel_sideband.h"
+#include "intel_connector.h"
 
 #define KEY_LOAD_TRIES	5
 #define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
@@ -105,24 +106,20 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
 	return capable;
 }
 
-static inline bool intel_hdcp_in_use(struct intel_connector *connector)
+static inline
+bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
+		       enum transcoder cpu_transcoder, enum port port)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-	enum port port = connector->encoder->port;
-	u32 reg;
-
-	reg = I915_READ(PORT_HDCP_STATUS(port));
-	return reg & HDCP_STATUS_ENC;
+	return I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
+	       HDCP_STATUS_ENC;
 }
 
-static inline bool intel_hdcp2_in_use(struct intel_connector *connector)
+static inline
+bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
+			enum transcoder cpu_transcoder, enum port port)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-	enum port port = connector->encoder->port;
-	u32 reg;
-
-	reg = I915_READ(HDCP2_STATUS_DDI(port));
-	return reg & LINK_ENCRYPTION_STATUS;
+	return I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+	       LINK_ENCRYPTION_STATUS;
 }
 
 static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
@@ -253,9 +250,28 @@ static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text)
 }
 
 static
-u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
+u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
+				enum transcoder cpu_transcoder, enum port port)
 {
-	enum port port = intel_dig_port->base.port;
+	if (INTEL_GEN(dev_priv) >= 12) {
+		switch (cpu_transcoder) {
+		case TRANSCODER_A:
+			return HDCP_TRANSA_REP_PRESENT |
+			       HDCP_TRANSA_SHA1_M0;
+		case TRANSCODER_B:
+			return HDCP_TRANSB_REP_PRESENT |
+			       HDCP_TRANSB_SHA1_M0;
+		case TRANSCODER_C:
+			return HDCP_TRANSC_REP_PRESENT |
+			       HDCP_TRANSC_SHA1_M0;
+		/* FIXME: Add a case for PIPE_D */
+		default:
+			DRM_ERROR("Unknown transcoder %d\n", cpu_transcoder);
+			break;
+		}
+		return -EINVAL;
+	}
+
 	switch (port) {
 	case PORT_A:
 		return HDCP_DDIA_REP_PRESENT | HDCP_DDIA_SHA1_M0;
@@ -268,18 +284,21 @@ u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
 	case PORT_E:
 		return HDCP_DDIE_REP_PRESENT | HDCP_DDIE_SHA1_M0;
 	default:
+		DRM_ERROR("Unknown port %d\n", port);
 		break;
 	}
-	DRM_ERROR("Unknown port %d\n", port);
 	return -EINVAL;
 }
 
 static
-int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
+int intel_hdcp_validate_v_prime(struct intel_connector *connector,
 				const struct intel_hdcp_shim *shim,
 				u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
 {
+	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	struct drm_i915_private *dev_priv;
+	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+	enum port port = intel_dig_port->base.port;
 	u32 vprime, sha_text, sha_leftovers, rep_ctl;
 	int ret, i, j, sha_idx;
 
@@ -306,7 +325,7 @@ int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
 	sha_idx = 0;
 	sha_text = 0;
 	sha_leftovers = 0;
-	rep_ctl = intel_hdcp_get_repeater_ctl(intel_dig_port);
+	rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port);
 	I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 	for (i = 0; i < num_downstream; i++) {
 		unsigned int sha_empty;
@@ -548,7 +567,7 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector)
 	 * V prime atleast twice.
 	 */
 	for (i = 0; i < tries; i++) {
-		ret = intel_hdcp_validate_v_prime(intel_dig_port, shim,
+		ret = intel_hdcp_validate_v_prime(connector, shim,
 						  ksv_fifo, num_downstream,
 						  bstatus);
 		if (!ret)
@@ -576,6 +595,7 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 	struct drm_device *dev = connector->base.dev;
 	const struct intel_hdcp_shim *shim = hdcp->shim;
 	struct drm_i915_private *dev_priv;
+	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
 	enum port port;
 	unsigned long r0_prime_gen_start;
 	int ret, i, tries = 2;
@@ -615,18 +635,21 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 
 	/* Initialize An with 2 random values and acquire it */
 	for (i = 0; i < 2; i++)
-		I915_WRITE(PORT_HDCP_ANINIT(port), get_random_u32());
-	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_CAPTURE_AN);
+		I915_WRITE(HDCP_ANINIT(dev_priv, cpu_transcoder, port),
+			   get_random_u32());
+	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port),
+		   HDCP_CONF_CAPTURE_AN);
 
 	/* Wait for An to be acquired */
-	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
+	if (intel_de_wait_for_set(dev_priv,
+				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
 				  HDCP_STATUS_AN_READY, 1)) {
 		DRM_ERROR("Timed out waiting for An\n");
 		return -ETIMEDOUT;
 	}
 
-	an.reg[0] = I915_READ(PORT_HDCP_ANLO(port));
-	an.reg[1] = I915_READ(PORT_HDCP_ANHI(port));
+	an.reg[0] = I915_READ(HDCP_ANLO(dev_priv, cpu_transcoder, port));
+	an.reg[1] = I915_READ(HDCP_ANHI(dev_priv, cpu_transcoder, port));
 	ret = shim->write_an_aksv(intel_dig_port, an.shim);
 	if (ret)
 		return ret;
@@ -644,24 +667,26 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 		return -EPERM;
 	}
 
-	I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);
-	I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);
+	I915_WRITE(HDCP_BKSVLO(dev_priv, cpu_transcoder, port), bksv.reg[0]);
+	I915_WRITE(HDCP_BKSVHI(dev_priv, cpu_transcoder, port), bksv.reg[1]);
 
 	ret = shim->repeater_present(intel_dig_port, &repeater_present);
 	if (ret)
 		return ret;
 	if (repeater_present)
 		I915_WRITE(HDCP_REP_CTL,
-			   intel_hdcp_get_repeater_ctl(intel_dig_port));
+			   intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder,
+						       port));
 
 	ret = shim->toggle_signalling(intel_dig_port, true);
 	if (ret)
 		return ret;
 
-	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_AUTH_AND_ENC);
+	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port),
+		   HDCP_CONF_AUTH_AND_ENC);
 
 	/* Wait for R0 ready */
-	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
 		     (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
 		DRM_ERROR("Timed out waiting for R0 ready\n");
 		return -ETIMEDOUT;
@@ -689,22 +714,25 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 		ret = shim->read_ri_prime(intel_dig_port, ri.shim);
 		if (ret)
 			return ret;
-		I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
+		I915_WRITE(HDCP_RPRIME(dev_priv, cpu_transcoder, port), ri.reg);
 
 		/* Wait for Ri prime match */
-		if (!wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+		if (!wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
+						    port)) &
 		    (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
 			break;
 	}
 
 	if (i == tries) {
 		DRM_DEBUG_KMS("Timed out waiting for Ri prime match (%x)\n",
-			      I915_READ(PORT_HDCP_STATUS(port)));
+			      I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
+						    port)));
 		return -ETIMEDOUT;
 	}
 
 	/* Wait for encryption confirmation */
-	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
+	if (intel_de_wait_for_set(dev_priv,
+				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
 				  HDCP_STATUS_ENC,
 				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		DRM_ERROR("Timed out waiting for encryption\n");
@@ -729,15 +757,17 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
 	int ret;
 
 	DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n",
 		      connector->base.name, connector->base.base.id);
 
 	hdcp->hdcp_encrypted = false;
-	I915_WRITE(PORT_HDCP_CONF(port), 0);
-	if (intel_de_wait_for_clear(dev_priv, PORT_HDCP_STATUS(port), ~0,
-				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
+	if (intel_de_wait_for_clear(dev_priv,
+				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
+				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		DRM_ERROR("Failed to disable HDCP, timeout clearing status\n");
 		return -ETIMEDOUT;
 	}
@@ -808,9 +838,11 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
+	enum transcoder cpu_transcoder;
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	cpu_transcoder = hdcp->cpu_transcoder;
 
 	/* Check_link valid only when HDCP1.4 is enabled */
 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
@@ -819,10 +851,11 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
 		goto out;
 	}
 
-	if (WARN_ON(!intel_hdcp_in_use(connector))) {
+	if (WARN_ON(!intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) {
 		DRM_ERROR("%s:%d HDCP link stopped encryption,%x\n",
 			  connector->base.name, connector->base.base.id,
-			  I915_READ(PORT_HDCP_STATUS(port)));
+			  I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
+						port)));
 		ret = -ENXIO;
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 		schedule_work(&hdcp->prop_work);
@@ -1493,10 +1526,11 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
 	int ret;
 
-	WARN_ON(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS);
-
+	WARN_ON(I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+		LINK_ENCRYPTION_STATUS);
 	if (hdcp->shim->toggle_signalling) {
 		ret = hdcp->shim->toggle_signalling(intel_dig_port, true);
 		if (ret) {
@@ -1506,14 +1540,18 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 		}
 	}
 
-	if (I915_READ(HDCP2_STATUS_DDI(port)) & LINK_AUTH_STATUS) {
+	if (I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+	    LINK_AUTH_STATUS) {
 		/* Link is Authenticated. Now set for Encryption */
-		I915_WRITE(HDCP2_CTL_DDI(port),
-			   I915_READ(HDCP2_CTL_DDI(port)) |
+		I915_WRITE(HDCP2_CTL(dev_priv, cpu_transcoder, port),
+			   I915_READ(HDCP2_CTL(dev_priv, cpu_transcoder,
+					       port)) |
 			   CTL_LINK_ENCRYPTION_REQ);
 	}
 
-	ret = intel_de_wait_for_set(dev_priv, HDCP2_STATUS_DDI(port),
+	ret = intel_de_wait_for_set(dev_priv,
+				    HDCP2_STATUS(dev_priv, cpu_transcoder,
+						 port),
 				    LINK_ENCRYPTION_STATUS,
 				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 
@@ -1526,14 +1564,19 @@ static int hdcp2_disable_encryption(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
 	int ret;
 
-	WARN_ON(!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS));
+	WARN_ON(!(I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+			    LINK_ENCRYPTION_STATUS));
 
-	I915_WRITE(HDCP2_CTL_DDI(port),
-		   I915_READ(HDCP2_CTL_DDI(port)) & ~CTL_LINK_ENCRYPTION_REQ);
+	I915_WRITE(HDCP2_CTL(dev_priv, cpu_transcoder, port),
+		   I915_READ(HDCP2_CTL(dev_priv, cpu_transcoder, port)) &
+		   ~CTL_LINK_ENCRYPTION_REQ);
 
-	ret = intel_de_wait_for_clear(dev_priv, HDCP2_STATUS_DDI(port),
+	ret = intel_de_wait_for_clear(dev_priv,
+				      HDCP2_STATUS(dev_priv, cpu_transcoder,
+						   port),
 				      LINK_ENCRYPTION_STATUS,
 				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 	if (ret == -ETIMEDOUT)
@@ -1632,9 +1675,11 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder cpu_transcoder;
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	cpu_transcoder = hdcp->cpu_transcoder;
 
 	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
@@ -1643,9 +1688,10 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 		goto out;
 	}
 
-	if (WARN_ON(!intel_hdcp2_in_use(connector))) {
+	if (WARN_ON(!intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) {
 		DRM_ERROR("HDCP2.2 link stopped the encryption, %x\n",
-			  I915_READ(HDCP2_STATUS_DDI(port)));
+			  I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder,
+						 port)));
 		ret = -ENXIO;
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 		schedule_work(&hdcp->prop_work);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 6e9bb6bd1ee2..f6bb77fd0930 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1491,7 +1491,10 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
 {
 	struct drm_i915_private *dev_priv =
 		intel_dig_port->base.base.dev->dev_private;
+	struct intel_connector *connector =
+		intel_dig_port->hdmi.attached_connector;
 	enum port port = intel_dig_port->base.port;
+	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
 	int ret;
 	union {
 		u32 reg;
@@ -1502,13 +1505,14 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
 	if (ret)
 		return false;
 
-	I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
+	I915_WRITE(HDCP_RPRIME(dev_priv, cpu_transcoder, port), ri.reg);
 
 	/* Wait for Ri prime match */
-	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
 		     (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
 		DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
-			  I915_READ(PORT_HDCP_STATUS(port)));
+			  I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
+						port)));
 		return false;
 	}
 	return true;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2abd199093c5..572e4cba847a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9256,12 +9256,20 @@ enum skl_power_gate {
 
 /* HDCP Repeater Registers */
 #define HDCP_REP_CTL			_MMIO(0x66d00)
+#define  HDCP_TRANSA_REP_PRESENT	BIT(31)
+#define  HDCP_TRANSB_REP_PRESENT	BIT(30)
+#define  HDCP_TRANSC_REP_PRESENT	BIT(29)
+#define  HDCP_TRANSD_REP_PRESENT	BIT(28)
 #define  HDCP_DDIB_REP_PRESENT		BIT(30)
 #define  HDCP_DDIA_REP_PRESENT		BIT(29)
 #define  HDCP_DDIC_REP_PRESENT		BIT(28)
 #define  HDCP_DDID_REP_PRESENT		BIT(27)
 #define  HDCP_DDIF_REP_PRESENT		BIT(26)
 #define  HDCP_DDIE_REP_PRESENT		BIT(25)
+#define  HDCP_TRANSA_SHA1_M0		(1 << 20)
+#define  HDCP_TRANSB_SHA1_M0		(2 << 20)
+#define  HDCP_TRANSC_SHA1_M0		(3 << 20)
+#define  HDCP_TRANSD_SHA1_M0		(4 << 20)
 #define  HDCP_DDIB_SHA1_M0		(1 << 20)
 #define  HDCP_DDIA_SHA1_M0		(2 << 20)
 #define  HDCP_DDIC_SHA1_M0		(3 << 20)
@@ -9301,15 +9309,92 @@ enum skl_power_gate {
 					  _PORTE_HDCP_AUTHENC, \
 					  _PORTF_HDCP_AUTHENC) + (x))
 #define PORT_HDCP_CONF(port)		_PORT_HDCP_AUTHENC(port, 0x0)
+#define _TRANSA_HDCP_CONF		0x66400
+#define _TRANSB_HDCP_CONF		0x66500
+#define TRANS_HDCP_CONF(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
+						    _TRANSB_HDCP_CONF)
+#define HDCP_CONF(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_CONF(trans) : \
+					 PORT_HDCP_CONF(port))
+
 #define  HDCP_CONF_CAPTURE_AN		BIT(0)
 #define  HDCP_CONF_AUTH_AND_ENC		(BIT(1) | BIT(0))
 #define PORT_HDCP_ANINIT(port)		_PORT_HDCP_AUTHENC(port, 0x4)
+#define _TRANSA_HDCP_ANINIT		0x66404
+#define _TRANSB_HDCP_ANINIT		0x66504
+#define TRANS_HDCP_ANINIT(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_ANINIT, \
+						    _TRANSB_HDCP_ANINIT)
+#define HDCP_ANINIT(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANINIT(trans) : \
+					 PORT_HDCP_ANINIT(port))
+
 #define PORT_HDCP_ANLO(port)		_PORT_HDCP_AUTHENC(port, 0x8)
+#define _TRANSA_HDCP_ANLO		0x66408
+#define _TRANSB_HDCP_ANLO		0x66508
+#define TRANS_HDCP_ANLO(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
+						    _TRANSB_HDCP_ANLO)
+#define HDCP_ANLO(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANLO(trans) : \
+					 PORT_HDCP_ANLO(port))
+
 #define PORT_HDCP_ANHI(port)		_PORT_HDCP_AUTHENC(port, 0xC)
+#define _TRANSA_HDCP_ANHI		0x6640C
+#define _TRANSB_HDCP_ANHI		0x6650C
+#define TRANS_HDCP_ANHI(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
+						    _TRANSB_HDCP_ANHI)
+#define HDCP_ANHI(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANHI(trans) : \
+					 PORT_HDCP_ANHI(port))
+
 #define PORT_HDCP_BKSVLO(port)		_PORT_HDCP_AUTHENC(port, 0x10)
+#define _TRANSA_HDCP_BKSVLO		0x66410
+#define _TRANSB_HDCP_BKSVLO		0x66510
+#define TRANS_HDCP_BKSVLO(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_BKSVLO, \
+						    _TRANSB_HDCP_BKSVLO)
+#define HDCP_BKSVLO(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_BKSVLO(trans) : \
+					 PORT_HDCP_BKSVLO(port))
+
 #define PORT_HDCP_BKSVHI(port)		_PORT_HDCP_AUTHENC(port, 0x14)
+#define _TRANSA_HDCP_BKSVHI		0x66414
+#define _TRANSB_HDCP_BKSVHI		0x66514
+#define TRANS_HDCP_BKSVHI(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_BKSVHI, \
+						    _TRANSB_HDCP_BKSVHI)
+#define HDCP_BKSVHI(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_BKSVHI(trans) : \
+					 PORT_HDCP_BKSVHI(port))
+
 #define PORT_HDCP_RPRIME(port)		_PORT_HDCP_AUTHENC(port, 0x18)
+#define _TRANSA_HDCP_RPRIME		0x66418
+#define _TRANSB_HDCP_RPRIME		0x66518
+#define TRANS_HDCP_RPRIME(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_RPRIME, \
+						    _TRANSB_HDCP_RPRIME)
+#define HDCP_RPRIME(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_RPRIME(trans) : \
+					 PORT_HDCP_RPRIME(port))
+
 #define PORT_HDCP_STATUS(port)		_PORT_HDCP_AUTHENC(port, 0x1C)
+#define _TRANSA_HDCP_STATUS		0x6641C
+#define _TRANSB_HDCP_STATUS		0x6651C
+#define TRANS_HDCP_STATUS(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_STATUS, \
+						    _TRANSB_HDCP_STATUS)
+#define HDCP_STATUS(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_STATUS(trans) : \
+					 PORT_HDCP_STATUS(port))
+
 #define  HDCP_STATUS_STREAM_A_ENC	BIT(31)
 #define  HDCP_STATUS_STREAM_B_ENC	BIT(30)
 #define  HDCP_STATUS_STREAM_C_ENC	BIT(29)
@@ -9336,23 +9421,44 @@ enum skl_power_gate {
 					  _PORTD_HDCP2_BASE, \
 					  _PORTE_HDCP2_BASE, \
 					  _PORTF_HDCP2_BASE) + (x))
-
-#define HDCP2_AUTH_DDI(port)		_PORT_HDCP2_BASE(port, 0x98)
+#define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
+#define _TRANSA_HDCP2_AUTH		0x66498
+#define _TRANSB_HDCP2_AUTH		0x66598
+#define TRANS_HDCP2_AUTH(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_AUTH, \
+						    _TRANSB_HDCP2_AUTH)
 #define   AUTH_LINK_AUTHENTICATED	BIT(31)
 #define   AUTH_LINK_TYPE		BIT(30)
 #define   AUTH_FORCE_CLR_INPUTCTR	BIT(19)
 #define   AUTH_CLR_KEYS			BIT(18)
-
-#define HDCP2_CTL_DDI(port)		_PORT_HDCP2_BASE(port, 0xB0)
+#define HDCP2_AUTH(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_AUTH(trans) : \
+					 PORT_HDCP2_AUTH(port))
+
+#define PORT_HDCP2_CTL(port)		_PORT_HDCP2_BASE(port, 0xB0)
+#define _TRANSA_HDCP2_CTL		0x664B0
+#define _TRANSB_HDCP2_CTL		0x665B0
+#define TRANS_HDCP2_CTL(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_CTL, \
+						    _TRANSB_HDCP2_CTL)
 #define   CTL_LINK_ENCRYPTION_REQ	BIT(31)
-
-#define HDCP2_STATUS_DDI(port)		_PORT_HDCP2_BASE(port, 0xB4)
-#define   STREAM_ENCRYPTION_STATUS_A	BIT(31)
-#define   STREAM_ENCRYPTION_STATUS_B	BIT(30)
-#define   STREAM_ENCRYPTION_STATUS_C	BIT(29)
+#define HDCP2_CTL(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_CTL(trans) : \
+					 PORT_HDCP2_CTL(port))
+
+#define PORT_HDCP2_STATUS(port)		_PORT_HDCP2_BASE(port, 0xB4)
+#define _TRANSA_HDCP2_STATUS		0x664B4
+#define _TRANSB_HDCP2_STATUS		0x665B4
+#define TRANS_HDCP2_STATUS(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP2_STATUS, \
+						    _TRANSB_HDCP2_STATUS)
 #define   LINK_TYPE_STATUS		BIT(22)
 #define   LINK_AUTH_STATUS		BIT(21)
 #define   LINK_ENCRYPTION_STATUS	BIT(20)
+#define HDCP2_STATUS(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_STATUS(trans) : \
+					 PORT_HDCP2_STATUS(port))
 
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A		0x60400
-- 
2.20.1

_______________________________________________
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✓ Fi.CI.BAT: success for drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev7)
URL   : https://patchwork.freedesktop.org/series/63432/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6766 -> Patchwork_14144
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/

Known issues
------------

  Here are the changes found in Patchwork_14144 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_hangcheck:
    - fi-bsw-n3050:       [PASS][1] -> [INCOMPLETE][2] ([fdo#105876])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][3] -> [FAIL][4] ([fdo#103167])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_mmap_gtt@basic:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-icl-u3/igt@gem_mmap_gtt@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-icl-u3/igt@gem_mmap_gtt@basic.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cml-u2:          [FAIL][7] -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [DMESG-WARN][9] ([fdo#102614]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Warnings ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-kbl-guc:         [FAIL][11] ([fdo#110829]) -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][13] ([fdo#111407]) -> [FAIL][14] ([fdo#111096])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (56 -> 46)
------------------------------

  Missing    (10): fi-kbl-soraka fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6766 -> Patchwork_14144

  CI-20190529: 20190529
  CI_DRM_6766: 018886de47265bb3d5448bbd4e85b0c06947d972 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5148: 50390dd7adaccae21cafa85b866c17606cec94c3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14144: fb0b21ac489f39638ba5181c94f491e048b37924 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fb0b21ac489f drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+
7075f2569589 drm/i915/hdcp: update current transcoder into intel_hdcp
6776bef4e7fb misc/mei/hdcp: Fill transcoder index in port info
39d959b0bf07 drm: Extend I915 mei interface for transcoder info
cb3dc10f1ba6 drm: Move port definition back to i915 header
50be4e8b0bc1 drm/i915: mei_hdcp: I915 sends ddi index as per ME FW

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev7)
URL   : https://patchwork.freedesktop.org/series/63432/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6766_full -> Patchwork_14144_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14144_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14144_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14144_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-snb:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-snb5/igt@gem_eio@in-flight-contexts-10ms.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-snb1/igt@gem_eio@in-flight-contexts-10ms.html

  
Known issues
------------

  Here are the changes found in Patchwork_14144_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_shared@q-smoketest-bsd2:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276]) +15 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb2/igt@gem_ctx_shared@q-smoketest-bsd2.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb8/igt@gem_ctx_shared@q-smoketest-bsd2.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#111325]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb5/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb4/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html

  * igt@gem_pwrite@small-gtt-fbr:
    - shard-apl:          [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-apl7/igt@gem_pwrite@small-gtt-fbr.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-apl1/igt@gem_pwrite@small-gtt-fbr.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
    - shard-snb:          [PASS][11] -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-snb5/igt@kms_cursor_legacy@cursora-vs-flipa-toggle.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-snb4/igt@kms_cursor_legacy@cursora-vs-flipa-toggle.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([fdo#105363])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#100368])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl8/igt@kms_flip@plain-flip-fb-recreate.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl3/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([fdo#103167]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([fdo#104108])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][21] -> [FAIL][22] ([fdo#108145] / [fdo#110403])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb8/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-glk:          [PASS][25] -> [INCOMPLETE][26] ([fdo#103359] / [k.org#198133])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-glk8/igt@kms_rotation_crc@primary-rotation-90.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-glk3/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][27] -> [FAIL][28] ([fdo#99912])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-kbl1/igt@kms_setmode@basic.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-kbl2/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_schedule@preempt-queue-bsd2:
    - shard-iclb:         [SKIP][29] ([fdo#109276]) -> [PASS][30] +13 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb3/igt@gem_exec_schedule@preempt-queue-bsd2.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][31] ([fdo#111325]) -> [PASS][32] +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb3/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-apl5/igt@gem_softpin@noreloc-s3.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-apl5/igt@gem_softpin@noreloc-s3.html

  * igt@i915_suspend@forcewake:
    - shard-iclb:         [INCOMPLETE][35] ([fdo#107713]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb5/igt@i915_suspend@forcewake.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb3/igt@i915_suspend@forcewake.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-apl:          [INCOMPLETE][37] ([fdo#103927]) -> [PASS][38] +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-skl:          [DMESG-WARN][39] ([fdo#106107]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl8/igt@kms_fbcon_fbt@fbc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl4/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_frontbuffer_tracking@basic:
    - shard-iclb:         [FAIL][41] ([fdo#103167]) -> [PASS][42] +4 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb1/igt@kms_frontbuffer_tracking@basic.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb4/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
    - shard-skl:          [FAIL][43] ([fdo#103167]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][45] ([fdo#108145] / [fdo#110403]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [SKIP][47] ([fdo#109642] / [fdo#111068]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb4/igt@kms_psr2_su@page_flip.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb2/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_primary_render:
    - shard-iclb:         [SKIP][49] ([fdo#109441]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb6/igt@kms_psr@psr2_primary_render.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb2/igt@kms_psr@psr2_primary_render.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-skl:          [INCOMPLETE][51] ([fdo#104108]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl5/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl5/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [FAIL][53] ([fdo#111330]) -> [SKIP][54] ([fdo#109276])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb5/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][55] ([fdo#109276]) -> [FAIL][56] ([fdo#111330]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-iclb5/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-iclb4/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-skl:          [FAIL][57] ([fdo#108040]) -> [FAIL][58] ([fdo#103167] / [fdo#110378])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6766/shard-skl1/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/shard-skl7/igt@kms_frontbuffer_tracking@fbc-1p-rte.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111472]: https://bugs.freedesktop.org/show_bug.cgi?id=111472
  [fdo#111473 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111473 
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6766 -> Patchwork_14144

  CI-20190529: 20190529
  CI_DRM_6766: 018886de47265bb3d5448bbd4e85b0c06947d972 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5148: 50390dd7adaccae21cafa85b866c17606cec94c3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14144: fb0b21ac489f39638ba5181c94f491e048b37924 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14144/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v9 1/6] drm/i915: mei_hdcp: I915 sends ddi index as per ME FW

[Sharma, Shashank]

Hello Ram,

On 8/22/2019 8:48 PM, Ramalingam C wrote:
> I915 converts it's port value into ddi index defiend by ME FW
> and pass it as a member of hdcp_port_data structure.
>
> Hence expose the enum mei_fw_ddi to I915 through
> i915_mei_interface.h.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_hdcp.c | 15 +++++++++-
>   drivers/misc/mei/hdcp/mei_hdcp.c          | 34 ++++++++---------------
>   drivers/misc/mei/hdcp/mei_hdcp.h          | 12 --------
>   include/drm/i915_mei_hdcp_interface.h     | 16 +++++++++--
>   4 files changed, 39 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 6ec5ceeab601..534832f435dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1749,13 +1749,26 @@ static const struct component_ops i915_hdcp_component_ops = {
>   	.unbind = i915_hdcp_component_unbind,
>   };
>   
> +static inline
> +enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
> +{
> +	switch (port) {
> +	case PORT_A:
> +		return MEI_DDI_A;
> +	case PORT_B ... PORT_F:
> +		return (enum mei_fw_ddi)port;
> +	default:
> +		return MEI_DDI_INVALID_PORT;
> +	}
> +}
> +
>   static inline int initialize_hdcp_port_data(struct intel_connector *connector,
>   					    const struct intel_hdcp_shim *shim)
>   {
>   	struct intel_hdcp *hdcp = &connector->hdcp;
>   	struct hdcp_port_data *data = &hdcp->port_data;
>   
> -	data->port = connector->encoder->port;
> +	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
>   	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
>   	data->protocol = (u8)shim->protocol;
>   
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
> index c681f6fab342..3638c77eba26 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> @@ -27,18 +27,6 @@
>   
>   #include "mei_hdcp.h"
>   
> -static inline u8 mei_get_ddi_index(enum port port)
> -{
> -	switch (port) {
> -	case PORT_A:
> -		return MEI_DDI_A;
> -	case PORT_B ... PORT_F:
> -		return (u8)port;
> -	default:
> -		return MEI_DDI_INVALID_PORT;
> -	}
> -}
> -
>   /**
>    * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
>    * @dev: device corresponding to the mei_cl_device
> @@ -69,7 +57,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
>   				WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
>   
>   	session_init_in.port.integrated_port_type = data->port_type;
> -	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
> +	session_init_in.port.physical_port = (u8)data->fw_ddi;
>   	session_init_in.protocol = data->protocol;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
> @@ -138,7 +126,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
>   				WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
>   
>   	verify_rxcert_in.port.integrated_port_type = data->port_type;
> -	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
>   	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> @@ -208,7 +196,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
>   	send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
>   
>   	send_hprime_in.port.integrated_port_type = data->port_type;
> -	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
>   	       HDCP_2_2_H_PRIME_LEN);
> @@ -265,7 +253,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
>   					WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
>   
>   	pairing_info_in.port.integrated_port_type = data->port_type;
> -	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
> +	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
>   	       HDCP_2_2_E_KH_KM_LEN);
> @@ -323,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
>   	lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
>   
>   	lc_init_in.port.integrated_port_type = data->port_type;
> -	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
> +	lc_init_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
>   	if (byte < 0) {
> @@ -378,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
>   					WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
>   
>   	verify_lprime_in.port.integrated_port_type = data->port_type;
> -	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
>   	       HDCP_2_2_L_PRIME_LEN);
> @@ -435,7 +423,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
>   	get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
>   
>   	get_skey_in.port.integrated_port_type = data->port_type;
> -	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
> +	get_skey_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
>   	if (byte < 0) {
> @@ -499,7 +487,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
>   					WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
>   
>   	verify_repeater_in.port.integrated_port_type = data->port_type;
> -	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
>   	       HDCP_2_2_RXINFO_LEN);
> @@ -569,7 +557,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
>   			WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
>   
>   	verify_mprime_in.port.integrated_port_type = data->port_type;
> -	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
>   	       HDCP_2_2_MPRIME_LEN);
> @@ -630,7 +618,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
>   	enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
>   
>   	enable_auth_in.port.integrated_port_type = data->port_type;
> -	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
> +	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
>   	enable_auth_in.stream_type = data->streams[0].stream_type;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
> @@ -684,7 +672,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
>   				WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
>   
>   	session_close_in.port.integrated_port_type = data->port_type;
> -	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
> +	session_close_in.port.physical_port = (u8)data->fw_ddi;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
>   			      sizeof(session_close_in));
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
> index e4b1cd54c853..e60282eb2d48 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> @@ -362,16 +362,4 @@ struct wired_cmd_repeater_auth_stream_req_out {
>   	struct hdcp_cmd_header	header;
>   	struct hdcp_port_id	port;
>   } __packed;
> -
> -enum mei_fw_ddi {
> -	MEI_DDI_INVALID_PORT = 0x0,
> -
> -	MEI_DDI_B = 1,
> -	MEI_DDI_C,
> -	MEI_DDI_D,
> -	MEI_DDI_E,
> -	MEI_DDI_F,
> -	MEI_DDI_A = 7,
> -	MEI_DDI_RANGE_END = MEI_DDI_A,
> -};
>   #endif /* __MEI_HDCP_H__ */
> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> index 8c344255146a..a97acf1c9710 100644
> --- a/include/drm/i915_mei_hdcp_interface.h
> +++ b/include/drm/i915_mei_hdcp_interface.h
> @@ -42,9 +42,21 @@ enum hdcp_wired_protocol {
>   	HDCP_PROTOCOL_DP
>   };
>   
> +enum mei_fw_ddi {
> +	MEI_DDI_INVALID_PORT = 0x0,
> +
> +	MEI_DDI_B = 1,
> +	MEI_DDI_C,
> +	MEI_DDI_D,
> +	MEI_DDI_E,
> +	MEI_DDI_F,
> +	MEI_DDI_A = 7,
> +	MEI_DDI_RANGE_END = MEI_DDI_A,
> +};
> +

I am seeing that the definition of above enum is moved from mei_hdcp.h 
to i915_mei_hdcp_interface.h, but we have not added this header in any 
of the mei_ files. Does this mean no one was using the enum in mei 
interface ? Or that would be added in some upcoming patches of the series ?

- Shashank

>   /**
>    * struct hdcp_port_data - intel specific HDCP port data
> - * @port: port index as per I915
> + * @fw_ddi: ddi index as per ME FW
>    * @port_type: HDCP port type as per ME FW classification
>    * @protocol: HDCP adaptation as per ME FW
>    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> @@ -56,7 +68,7 @@ enum hdcp_wired_protocol {
>    *	     streams
>    */
>   struct hdcp_port_data {
> -	enum port port;
> +	enum mei_fw_ddi fw_ddi;
>   	u8 port_type;
>   	u8 protocol;
>   	u16 k;
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Re: [PATCH v9 1/6] drm/i915: mei_hdcp: I915 sends ddi index as per ME FW

[Ramalingam C]

On 2019-08-27 at 09:54:18 +0530, Sharma, Shashank wrote:
> Hello Ram,
> 
> On 8/22/2019 8:48 PM, Ramalingam C wrote:
> > I915 converts it's port value into ddi index defiend by ME FW
> > and pass it as a member of hdcp_port_data structure.
> > 
> > Hence expose the enum mei_fw_ddi to I915 through
> > i915_mei_interface.h.
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >   drivers/gpu/drm/i915/display/intel_hdcp.c | 15 +++++++++-
> >   drivers/misc/mei/hdcp/mei_hdcp.c          | 34 ++++++++---------------
> >   drivers/misc/mei/hdcp/mei_hdcp.h          | 12 --------
> >   include/drm/i915_mei_hdcp_interface.h     | 16 +++++++++--
> >   4 files changed, 39 insertions(+), 38 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 6ec5ceeab601..534832f435dc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -1749,13 +1749,26 @@ static const struct component_ops i915_hdcp_component_ops = {
> >   	.unbind = i915_hdcp_component_unbind,
> >   };
> > +static inline
> > +enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
> > +{
> > +	switch (port) {
> > +	case PORT_A:
> > +		return MEI_DDI_A;
> > +	case PORT_B ... PORT_F:
> > +		return (enum mei_fw_ddi)port;
> > +	default:
> > +		return MEI_DDI_INVALID_PORT;
> > +	}
> > +}
> > +
> >   static inline int initialize_hdcp_port_data(struct intel_connector *connector,
> >   					    const struct intel_hdcp_shim *shim)
> >   {
> >   	struct intel_hdcp *hdcp = &connector->hdcp;
> >   	struct hdcp_port_data *data = &hdcp->port_data;
> > -	data->port = connector->encoder->port;
> > +	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
> >   	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
> >   	data->protocol = (u8)shim->protocol;
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
> > index c681f6fab342..3638c77eba26 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> > @@ -27,18 +27,6 @@
> >   #include "mei_hdcp.h"
> > -static inline u8 mei_get_ddi_index(enum port port)
> > -{
> > -	switch (port) {
> > -	case PORT_A:
> > -		return MEI_DDI_A;
> > -	case PORT_B ... PORT_F:
> > -		return (u8)port;
> > -	default:
> > -		return MEI_DDI_INVALID_PORT;
> > -	}
> > -}
> > -
> >   /**
> >    * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
> >    * @dev: device corresponding to the mei_cl_device
> > @@ -69,7 +57,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
> >   				WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
> >   	session_init_in.port.integrated_port_type = data->port_type;
> > -	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	session_init_in.port.physical_port = (u8)data->fw_ddi;
> >   	session_init_in.protocol = data->protocol;
> >   	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
> > @@ -138,7 +126,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
> >   				WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
> >   	verify_rxcert_in.port.integrated_port_type = data->port_type;
> > -	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
> >   	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
> >   	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> > @@ -208,7 +196,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
> >   	send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
> >   	send_hprime_in.port.integrated_port_type = data->port_type;
> > -	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
> >   	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
> >   	       HDCP_2_2_H_PRIME_LEN);
> > @@ -265,7 +253,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
> >   					WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
> >   	pairing_info_in.port.integrated_port_type = data->port_type;
> > -	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
> >   	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
> >   	       HDCP_2_2_E_KH_KM_LEN);
> > @@ -323,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
> >   	lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
> >   	lc_init_in.port.integrated_port_type = data->port_type;
> > -	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	lc_init_in.port.physical_port = (u8)data->fw_ddi;
> >   	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
> >   	if (byte < 0) {
> > @@ -378,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
> >   					WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
> >   	verify_lprime_in.port.integrated_port_type = data->port_type;
> > -	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
> >   	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
> >   	       HDCP_2_2_L_PRIME_LEN);
> > @@ -435,7 +423,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
> >   	get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
> >   	get_skey_in.port.integrated_port_type = data->port_type;
> > -	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	get_skey_in.port.physical_port = (u8)data->fw_ddi;
> >   	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
> >   	if (byte < 0) {
> > @@ -499,7 +487,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
> >   					WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
> >   	verify_repeater_in.port.integrated_port_type = data->port_type;
> > -	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
> >   	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
> >   	       HDCP_2_2_RXINFO_LEN);
> > @@ -569,7 +557,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
> >   			WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
> >   	verify_mprime_in.port.integrated_port_type = data->port_type;
> > -	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
> >   	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
> >   	       HDCP_2_2_MPRIME_LEN);
> > @@ -630,7 +618,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
> >   	enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
> >   	enable_auth_in.port.integrated_port_type = data->port_type;
> > -	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
> >   	enable_auth_in.stream_type = data->streams[0].stream_type;
> >   	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
> > @@ -684,7 +672,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
> >   				WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
> >   	session_close_in.port.integrated_port_type = data->port_type;
> > -	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	session_close_in.port.physical_port = (u8)data->fw_ddi;
> >   	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
> >   			      sizeof(session_close_in));
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
> > index e4b1cd54c853..e60282eb2d48 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> > @@ -362,16 +362,4 @@ struct wired_cmd_repeater_auth_stream_req_out {
> >   	struct hdcp_cmd_header	header;
> >   	struct hdcp_port_id	port;
> >   } __packed;
> > -
> > -enum mei_fw_ddi {
> > -	MEI_DDI_INVALID_PORT = 0x0,
> > -
> > -	MEI_DDI_B = 1,
> > -	MEI_DDI_C,
> > -	MEI_DDI_D,
> > -	MEI_DDI_E,
> > -	MEI_DDI_F,
> > -	MEI_DDI_A = 7,
> > -	MEI_DDI_RANGE_END = MEI_DDI_A,
> > -};
> >   #endif /* __MEI_HDCP_H__ */
> > diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> > index 8c344255146a..a97acf1c9710 100644
> > --- a/include/drm/i915_mei_hdcp_interface.h
> > +++ b/include/drm/i915_mei_hdcp_interface.h
> > @@ -42,9 +42,21 @@ enum hdcp_wired_protocol {
> >   	HDCP_PROTOCOL_DP
> >   };
> > +enum mei_fw_ddi {
> > +	MEI_DDI_INVALID_PORT = 0x0,
> > +
> > +	MEI_DDI_B = 1,
> > +	MEI_DDI_C,
> > +	MEI_DDI_D,
> > +	MEI_DDI_E,
> > +	MEI_DDI_F,
> > +	MEI_DDI_A = 7,
> > +	MEI_DDI_RANGE_END = MEI_DDI_A,
> > +};
> > +
> 
> I am seeing that the definition of above enum is moved from mei_hdcp.h to
> i915_mei_hdcp_interface.h, but we have not added this header in any of the
> mei_ files. Does this mean no one was using the enum in mei interface ? Or
> that would be added in some upcoming patches of the series ?

This is used in intel_hdcp.c to convert the enum port to enum mei_fw_ddi
and assign the value to fw_ddi of the hdcp_port_data.

This I915 change also part of this patch.

-Ram
> 
> - Shashank
> 
> >   /**
> >    * struct hdcp_port_data - intel specific HDCP port data
> > - * @port: port index as per I915
> > + * @fw_ddi: ddi index as per ME FW
> >    * @port_type: HDCP port type as per ME FW classification
> >    * @protocol: HDCP adaptation as per ME FW
> >    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> > @@ -56,7 +68,7 @@ enum hdcp_wired_protocol {
> >    *	     streams
> >    */
> >   struct hdcp_port_data {
> > -	enum port port;
> > +	enum mei_fw_ddi fw_ddi;
> >   	u8 port_type;
> >   	u8 protocol;
> >   	u16 k;
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Re: [PATCH v9 2/6] drm: Move port definition back to i915 header

[Sharma, Shashank]

On 8/22/2019 8:49 PM, Ramalingam C wrote:
> Handled the need for exposing enum port to mei_hdcp driver, by
> converting the port into ddi index as per ME FW and sending to mei_hdcp.
>
> Hence move enum port definition into I915 driver itself.

This is a nitpick, but if we can re-arrange this commit message a bit, 
it would be easy to understand the changes and the reason behind that. 
How about something like:

We need to expose enum port to mei_hdcp driver, so that it can convert 
the port into MEI's respective DDI index.

So this patch moves definition of enum port from include/i915_drv.h, to 
intel_display.h, inside display driver.

> v2:
>    intel_display.h is included in intel_hdcp.h
> v3:
>    enum port is declared in headers.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.h    |  1 +
>   drivers/gpu/drm/i915/display/intel_display.h | 18 ++++++++++++++++++
>   drivers/gpu/drm/i915/display/intel_dp.h      |  1 +
>   drivers/gpu/drm/i915/display/intel_hdcp.h    |  1 +
>   drivers/gpu/drm/i915/display/intel_hdmi.h    |  1 +
>   drivers/gpu/drm/i915/display/intel_hotplug.h |  1 +
>   drivers/gpu/drm/i915/display/intel_sdvo.h    |  1 +
>   include/drm/i915_drm.h                       | 18 ------------------
>   8 files changed, 24 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
> index 4969189e620f..4c6e56a3940a 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -35,6 +35,7 @@
>   #include <drm/i915_drm.h>
>   
>   struct drm_i915_private;
> +enum port;
>   
>   enum intel_backlight_type {
>   	INTEL_BACKLIGHT_PMIC,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index e57e6969051d..40610d51327e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -182,6 +182,24 @@ enum plane_id {
>   	for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
>   		for_each_if((__crtc)->plane_ids_mask & BIT(__p))
>   
> +enum port {
> +	PORT_NONE = -1,
> +
> +	PORT_A = 0,
> +	PORT_B,
> +	PORT_C,
> +	PORT_D,
> +	PORT_E,
> +	PORT_F,
> +	PORT_G,
> +	PORT_H,
> +	PORT_I,
> +
> +	I915_MAX_PORTS
> +};
> +
> +#define port_name(p) ((p) + 'A')
> +
>   /*
>    * Ports identifier referenced from other drivers.
>    * Expected to remain stable over time
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 657bbb1f5ed0..e01d1f89409d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -13,6 +13,7 @@
>   #include "i915_reg.h"
>   
>   enum pipe;
> +enum port;
>   struct drm_connector_state;
>   struct drm_encoder;
>   struct drm_i915_private;
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 13555b054930..59a2b40405cc 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -15,6 +15,7 @@ struct drm_connector_state;
>   struct drm_i915_private;
>   struct intel_connector;
>   struct intel_hdcp_shim;
> +enum port;
>   
>   void intel_hdcp_atomic_check(struct drm_connector *connector,
>   			     struct drm_connector_state *old_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
> index 106c2e0bc3c9..cf1ea5427639 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
> @@ -23,6 +23,7 @@ struct intel_crtc_state;
>   struct intel_hdmi;
>   struct drm_connector_state;
>   union hdmi_infoframe;
> +enum port;
>   
>   void intel_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg,
>   		     enum port port);
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.h b/drivers/gpu/drm/i915/display/intel_hotplug.h
> index b0cd447b7fbc..087b5f57b321 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.h
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.h
> @@ -13,6 +13,7 @@
>   struct drm_i915_private;
>   struct intel_connector;
>   struct intel_encoder;
> +enum port;
>   
>   void intel_hpd_poll_init(struct drm_i915_private *dev_priv);
>   enum intel_hotplug_state intel_encoder_hotplug(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.h b/drivers/gpu/drm/i915/display/intel_sdvo.h
> index c9e05bcdd141..a66f224aa17d 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.h
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.h
> @@ -14,6 +14,7 @@
>   
>   struct drm_i915_private;
>   enum pipe;
> +enum port;
>   
>   bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
>   			     i915_reg_t sdvo_reg, enum pipe *pipe);
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index 23274cf92712..6722005884db 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -100,22 +100,4 @@ extern struct resource intel_graphics_stolen_res;
>   #define INTEL_GEN11_BSM_DW1	0xc4
>   #define   INTEL_BSM_MASK	(-(1u << 20))
>   
> -enum port {
> -	PORT_NONE = -1,
> -
> -	PORT_A = 0,
> -	PORT_B,
> -	PORT_C,
> -	PORT_D,
> -	PORT_E,
> -	PORT_F,
> -	PORT_G,
> -	PORT_H,
> -	PORT_I,
> -
> -	I915_MAX_PORTS
> -};
> -
> -#define port_name(p) ((p) + 'A')
> -
>   #endif				/* _I915_DRM_H_ */

Otherwise patch looks good to me.

With(or without) above mentioned suggestion, Feel free to use: 
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>

- Shashank

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Re: [PATCH v9 1/6] drm/i915: mei_hdcp: I915 sends ddi index as per ME FW

[Sharma, Shashank]

Regards

Shashank

On 8/27/2019 10:03 AM, Ramalingam C wrote:
> On 2019-08-27 at 09:54:18 +0530, Sharma, Shashank wrote:
>> Hello Ram,
>>
>> On 8/22/2019 8:48 PM, Ramalingam C wrote:
>>> I915 converts it's port value into ddi index defiend by ME FW
>>> and pass it as a member of hdcp_port_data structure.
>>>
>>> Hence expose the enum mei_fw_ddi to I915 through
>>> i915_mei_interface.h.
>>>
>>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/display/intel_hdcp.c | 15 +++++++++-
>>>    drivers/misc/mei/hdcp/mei_hdcp.c          | 34 ++++++++---------------
>>>    drivers/misc/mei/hdcp/mei_hdcp.h          | 12 --------
>>>    include/drm/i915_mei_hdcp_interface.h     | 16 +++++++++--
>>>    4 files changed, 39 insertions(+), 38 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> index 6ec5ceeab601..534832f435dc 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> @@ -1749,13 +1749,26 @@ static const struct component_ops i915_hdcp_component_ops = {
>>>    	.unbind = i915_hdcp_component_unbind,
>>>    };
>>> +static inline
>>> +enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
>>> +{
>>> +	switch (port) {
>>> +	case PORT_A:
>>> +		return MEI_DDI_A;
>>> +	case PORT_B ... PORT_F:
>>> +		return (enum mei_fw_ddi)port;
>>> +	default:
>>> +		return MEI_DDI_INVALID_PORT;
>>> +	}
>>> +}
>>> +
>>>    static inline int initialize_hdcp_port_data(struct intel_connector *connector,
>>>    					    const struct intel_hdcp_shim *shim)
>>>    {
>>>    	struct intel_hdcp *hdcp = &connector->hdcp;
>>>    	struct hdcp_port_data *data = &hdcp->port_data;
>>> -	data->port = connector->encoder->port;
>>> +	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
>>>    	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
>>>    	data->protocol = (u8)shim->protocol;
>>> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
>>> index c681f6fab342..3638c77eba26 100644
>>> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
>>> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
>>> @@ -27,18 +27,6 @@
>>>    #include "mei_hdcp.h"
>>> -static inline u8 mei_get_ddi_index(enum port port)
>>> -{
>>> -	switch (port) {
>>> -	case PORT_A:
>>> -		return MEI_DDI_A;
>>> -	case PORT_B ... PORT_F:
>>> -		return (u8)port;
>>> -	default:
>>> -		return MEI_DDI_INVALID_PORT;
>>> -	}
>>> -}
>>> -
>>>    /**
>>>     * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
>>>     * @dev: device corresponding to the mei_cl_device
>>> @@ -69,7 +57,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
>>>    				WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
>>>    	session_init_in.port.integrated_port_type = data->port_type;
>>> -	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	session_init_in.port.physical_port = (u8)data->fw_ddi;
>>>    	session_init_in.protocol = data->protocol;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
>>> @@ -138,7 +126,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
>>>    				WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
>>>    	verify_rxcert_in.port.integrated_port_type = data->port_type;
>>> -	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
>>>    	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
>>>    	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
>>> @@ -208,7 +196,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
>>>    	send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
>>>    	send_hprime_in.port.integrated_port_type = data->port_type;
>>> -	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
>>>    	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
>>>    	       HDCP_2_2_H_PRIME_LEN);
>>> @@ -265,7 +253,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
>>>    					WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
>>>    	pairing_info_in.port.integrated_port_type = data->port_type;
>>> -	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
>>>    	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
>>>    	       HDCP_2_2_E_KH_KM_LEN);
>>> @@ -323,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
>>>    	lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
>>>    	lc_init_in.port.integrated_port_type = data->port_type;
>>> -	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	lc_init_in.port.physical_port = (u8)data->fw_ddi;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
>>>    	if (byte < 0) {
>>> @@ -378,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
>>>    					WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
>>>    	verify_lprime_in.port.integrated_port_type = data->port_type;
>>> -	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
>>>    	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
>>>    	       HDCP_2_2_L_PRIME_LEN);
>>> @@ -435,7 +423,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
>>>    	get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
>>>    	get_skey_in.port.integrated_port_type = data->port_type;
>>> -	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	get_skey_in.port.physical_port = (u8)data->fw_ddi;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
>>>    	if (byte < 0) {
>>> @@ -499,7 +487,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
>>>    					WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
>>>    	verify_repeater_in.port.integrated_port_type = data->port_type;
>>> -	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
>>>    	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
>>>    	       HDCP_2_2_RXINFO_LEN);
>>> @@ -569,7 +557,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
>>>    			WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
>>>    	verify_mprime_in.port.integrated_port_type = data->port_type;
>>> -	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
>>>    	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
>>>    	       HDCP_2_2_MPRIME_LEN);
>>> @@ -630,7 +618,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
>>>    	enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
>>>    	enable_auth_in.port.integrated_port_type = data->port_type;
>>> -	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
>>>    	enable_auth_in.stream_type = data->streams[0].stream_type;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
>>> @@ -684,7 +672,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
>>>    				WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
>>>    	session_close_in.port.integrated_port_type = data->port_type;
>>> -	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
>>> +	session_close_in.port.physical_port = (u8)data->fw_ddi;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
>>>    			      sizeof(session_close_in));
>>> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
>>> index e4b1cd54c853..e60282eb2d48 100644
>>> --- a/drivers/misc/mei/hdcp/mei_hdcp.h
>>> +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
>>> @@ -362,16 +362,4 @@ struct wired_cmd_repeater_auth_stream_req_out {
>>>    	struct hdcp_cmd_header	header;
>>>    	struct hdcp_port_id	port;
>>>    } __packed;
>>> -
>>> -enum mei_fw_ddi {
>>> -	MEI_DDI_INVALID_PORT = 0x0,
>>> -
>>> -	MEI_DDI_B = 1,
>>> -	MEI_DDI_C,
>>> -	MEI_DDI_D,
>>> -	MEI_DDI_E,
>>> -	MEI_DDI_F,
>>> -	MEI_DDI_A = 7,
>>> -	MEI_DDI_RANGE_END = MEI_DDI_A,
>>> -};
>>>    #endif /* __MEI_HDCP_H__ */
>>> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
>>> index 8c344255146a..a97acf1c9710 100644
>>> --- a/include/drm/i915_mei_hdcp_interface.h
>>> +++ b/include/drm/i915_mei_hdcp_interface.h
>>> @@ -42,9 +42,21 @@ enum hdcp_wired_protocol {
>>>    	HDCP_PROTOCOL_DP
>>>    };
>>> +enum mei_fw_ddi {
>>> +	MEI_DDI_INVALID_PORT = 0x0,
>>> +
>>> +	MEI_DDI_B = 1,
>>> +	MEI_DDI_C,
>>> +	MEI_DDI_D,
>>> +	MEI_DDI_E,
>>> +	MEI_DDI_F,
>>> +	MEI_DDI_A = 7,
>>> +	MEI_DDI_RANGE_END = MEI_DDI_A,
>>> +};
>>> +
>> I am seeing that the definition of above enum is moved from mei_hdcp.h to
>> i915_mei_hdcp_interface.h, but we have not added this header in any of the
>> mei_ files. Does this mean no one was using the enum in mei interface ? Or
>> that would be added in some upcoming patches of the series ?
> This is used in intel_hdcp.c to convert the enum port to enum mei_fw_ddi
> and assign the value to fw_ddi of the hdcp_port_data.
>
> This I915 change also part of this patch.

I meant when we moved the definition to another header, we dint include 
the new header in mei_hdcp.c/h, which suggests, this enum was not 
directly being used by this. But as you mentioned I think its being used 
via the I915 HDCP interface.

Looks good to me otherwise.

Please feel free to use: Reviewed-by: Shashank Sharma 
<shashank.sharma@intel.com>

> -Ram
>> - Shashank
>>
>>>    /**
>>>     * struct hdcp_port_data - intel specific HDCP port data
>>> - * @port: port index as per I915
>>> + * @fw_ddi: ddi index as per ME FW
>>>     * @port_type: HDCP port type as per ME FW classification
>>>     * @protocol: HDCP adaptation as per ME FW
>>>     * @k: No of streams transmitted on a port. Only on DP MST this is != 1
>>> @@ -56,7 +68,7 @@ enum hdcp_wired_protocol {
>>>     *	     streams
>>>     */
>>>    struct hdcp_port_data {
>>> -	enum port port;
>>> +	enum mei_fw_ddi fw_ddi;
>>>    	u8 port_type;
>>>    	u8 protocol;
>>>    	u16 k;
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Re: [PATCH v9 3/6] drm: Extend I915 mei interface for transcoder info

[Sharma, Shashank]

On 8/22/2019 8:49 PM, Ramalingam C wrote:
> I915 needs to send the index of the transcoder as per ME FW.
> To support this, define enum mei_fw_ddi and add as a member into
> the struct hdcp_port_data.

The commit message says you are defining enum mei_fw_ddi, but you are 
actually defining enum mei_fw_tc;

- Shashank

> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   include/drm/i915_mei_hdcp_interface.h | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
>
> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> index a97acf1c9710..0de629bf2f62 100644
> --- a/include/drm/i915_mei_hdcp_interface.h
> +++ b/include/drm/i915_mei_hdcp_interface.h
> @@ -54,9 +54,21 @@ enum mei_fw_ddi {
>   	MEI_DDI_RANGE_END = MEI_DDI_A,
>   };
>   
> +enum mei_fw_tc {
> +	MEI_INVALID_TRANSCODER = 0x00,	/* Invalid transcoder type */
> +	MEI_TC_EDP,			/* Transcoder for eDP */
> +	MEI_TC_DSI0,			/* Transcoder for DSI0 */
> +	MEI_TC_DSI1,			/* Transcoder for DSI1 */
> +	MEI_TC_A = 0x10,		/* Transcoder TCA */
> +	MEI_TC_B,			/* Transcoder TCB */
> +	MEI_TC_C,			/* Transcoder TCC */
> +	MEI_TC_D			/* Transcoder TCD */
> +};
> +
>   /**
>    * struct hdcp_port_data - intel specific HDCP port data
>    * @fw_ddi: ddi index as per ME FW
> + * @fw_tc: transcoder index as per ME FW
>    * @port_type: HDCP port type as per ME FW classification
>    * @protocol: HDCP adaptation as per ME FW
>    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> @@ -69,6 +81,7 @@ enum mei_fw_ddi {
>    */
>   struct hdcp_port_data {
>   	enum mei_fw_ddi fw_ddi;
> +	enum mei_fw_tc fw_tc;
>   	u8 port_type;
>   	u8 protocol;
>   	u16 k;
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Re: [PATCH v9 3/6] drm: Extend I915 mei interface for transcoder info

[Sharma, Shashank]

[-- Attachment #1.1: Type: text/plain, Size: 1916 bytes --]


On 8/22/2019 8:49 PM, Ramalingam C wrote:
> I915 needs to send the index of the transcoder as per ME FW.
> To support this, define enum mei_fw_ddi and add as a member into
> the struct hdcp_port_data.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   include/drm/i915_mei_hdcp_interface.h | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
>
> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> index a97acf1c9710..0de629bf2f62 100644
> --- a/include/drm/i915_mei_hdcp_interface.h
> +++ b/include/drm/i915_mei_hdcp_interface.h
> @@ -54,9 +54,21 @@ enum mei_fw_ddi {
>   	MEI_DDI_RANGE_END = MEI_DDI_A,
>   };
>   
> +enum mei_fw_tc {
> +	MEI_INVALID_TRANSCODER = 0x00,	/* Invalid transcoder type */
> +	MEI_TC_EDP,			/* Transcoder for eDP */
> +	MEI_TC_DSI0,			/* Transcoder for DSI0 */
> +	MEI_TC_DSI1,			/* Transcoder for DSI1 */
Also, this is a bit odd, coz ports above can't do HDCP, so it doesn't 
make sense to have them here. But seems like we want to be in sync with 
MEI FW definitions, so we should change the function

intel_get_mei_fw_ddi_index to accept only from ports A to D, not above 
or below.

- Shashank

> +	MEI_TC_A = 0x10,		/* Transcoder TCA */
> +	MEI_TC_B,			/* Transcoder TCB */
> +	MEI_TC_C,			/* Transcoder TCC */
> +	MEI_TC_D			/* Transcoder TCD */
> +};
> +
>   /**
>    * struct hdcp_port_data - intel specific HDCP port data
>    * @fw_ddi: ddi index as per ME FW
> + * @fw_tc: transcoder index as per ME FW
>    * @port_type: HDCP port type as per ME FW classification
>    * @protocol: HDCP adaptation as per ME FW
>    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> @@ -69,6 +81,7 @@ enum mei_fw_ddi {
>    */
>   struct hdcp_port_data {
>   	enum mei_fw_ddi fw_ddi;
> +	enum mei_fw_tc fw_tc;
>   	u8 port_type;
>   	u8 protocol;
>   	u16 k;

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Re: [PATCH v9 4/6] misc/mei/hdcp: Fill transcoder index in port info

[Sharma, Shashank]

Regards

Shashank

On 8/22/2019 8:49 PM, Ramalingam C wrote:
> For gen12+ platform we need to pass the transcoder info
> as part of the port info into ME FW.
>
> This change fills the payload for ME FW from hdcp_port_data.
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/misc/mei/hdcp/mei_hdcp.c | 11 +++++++++++
>   drivers/misc/mei/hdcp/mei_hdcp.h |  4 +++-
>   2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
> index 3638c77eba26..93027fd96c71 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> @@ -58,6 +58,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
>   
>   	session_init_in.port.integrated_port_type = data->port_type;
>   	session_init_in.port.physical_port = (u8)data->fw_ddi;

As this entry is only valid till GEN11.5, don't we need GEN_CHECK here, 
say (INTEL_GEN() < 12). Is that possible in MEI_FW ?

If not, probably we have to add this gen_check while filling the fw_tc 
part in I915.

Applies for all the changes below too.

- Shashank

> +	session_init_in.port.attached_transcoder = (u8)data->fw_tc;
>   	session_init_in.protocol = data->protocol;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
> @@ -127,6 +128,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
>   
>   	verify_rxcert_in.port.integrated_port_type = data->port_type;
>   	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
> +	verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
>   	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> @@ -197,6 +199,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
>   
>   	send_hprime_in.port.integrated_port_type = data->port_type;
>   	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
> +	send_hprime_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
>   	       HDCP_2_2_H_PRIME_LEN);
> @@ -254,6 +257,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
>   
>   	pairing_info_in.port.integrated_port_type = data->port_type;
>   	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
> +	pairing_info_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
>   	       HDCP_2_2_E_KH_KM_LEN);
> @@ -312,6 +316,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
>   
>   	lc_init_in.port.integrated_port_type = data->port_type;
>   	lc_init_in.port.physical_port = (u8)data->fw_ddi;
> +	lc_init_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
>   	if (byte < 0) {
> @@ -367,6 +372,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
>   
>   	verify_lprime_in.port.integrated_port_type = data->port_type;
>   	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
> +	verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
>   	       HDCP_2_2_L_PRIME_LEN);
> @@ -424,6 +430,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
>   
>   	get_skey_in.port.integrated_port_type = data->port_type;
>   	get_skey_in.port.physical_port = (u8)data->fw_ddi;
> +	get_skey_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
>   	if (byte < 0) {
> @@ -488,6 +495,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
>   
>   	verify_repeater_in.port.integrated_port_type = data->port_type;
>   	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
> +	verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
>   	       HDCP_2_2_RXINFO_LEN);
> @@ -558,6 +566,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
>   
>   	verify_mprime_in.port.integrated_port_type = data->port_type;
>   	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
> +	verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
>   	       HDCP_2_2_MPRIME_LEN);
> @@ -619,6 +628,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
>   
>   	enable_auth_in.port.integrated_port_type = data->port_type;
>   	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
> +	enable_auth_in.port.attached_transcoder = (u8)data->fw_tc;
>   	enable_auth_in.stream_type = data->streams[0].stream_type;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
> @@ -673,6 +683,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
>   
>   	session_close_in.port.integrated_port_type = data->port_type;
>   	session_close_in.port.physical_port = (u8)data->fw_ddi;
> +	session_close_in.port.attached_transcoder = (u8)data->fw_tc;
>   
>   	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
>   			      sizeof(session_close_in));
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
> index e60282eb2d48..58e439d2fc1a 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> @@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
>   /* Uniquely identifies the hdcp port being addressed for a given command. */
>   struct hdcp_port_id {
>   	u8	integrated_port_type;
> +	/* Used until Gen11.5. Must be zero for Gen11.5+ */
>   	u8	physical_port;
> -	u16	reserved;
> +	u8	attached_transcoder;
> +	u8	reserved;
>   } __packed;
>   
>   /*
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Re: [PATCH v9 4/6] misc/mei/hdcp: Fill transcoder index in port info

[Ramalingam C]

On 2019-08-27 at 10:42:33 +0530, Sharma, Shashank wrote:
> Regards
> 
> Shashank
> 
> On 8/22/2019 8:49 PM, Ramalingam C wrote:
> > For gen12+ platform we need to pass the transcoder info
> > as part of the port info into ME FW.
> > 
> > This change fills the payload for ME FW from hdcp_port_data.
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >   drivers/misc/mei/hdcp/mei_hdcp.c | 11 +++++++++++
> >   drivers/misc/mei/hdcp/mei_hdcp.h |  4 +++-
> >   2 files changed, 14 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
> > index 3638c77eba26..93027fd96c71 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> > @@ -58,6 +58,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
> >   	session_init_in.port.integrated_port_type = data->port_type;
> >   	session_init_in.port.physical_port = (u8)data->fw_ddi;
> 
> As this entry is only valid till GEN11.5, don't we need GEN_CHECK here, say
> (INTEL_GEN() < 12). Is that possible in MEI_FW ?
Shashank,

Not needed, as I915 checks the GEN# while loading the transcoder detail
into hdcp_port_data. So here we can assign whatever passed as part of
hdcp_port_data.

-Ram
> 
> If not, probably we have to add this gen_check while filling the fw_tc part
> in I915.
> 
> Applies for all the changes below too.
> 
> - Shashank
> 
> > +	session_init_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	session_init_in.protocol = data->protocol;
> >   	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
> > @@ -127,6 +128,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
> >   	verify_rxcert_in.port.integrated_port_type = data->port_type;
> >   	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
> > +	verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
> >   	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> > @@ -197,6 +199,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
> >   	send_hprime_in.port.integrated_port_type = data->port_type;
> >   	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
> > +	send_hprime_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
> >   	       HDCP_2_2_H_PRIME_LEN);
> > @@ -254,6 +257,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
> >   	pairing_info_in.port.integrated_port_type = data->port_type;
> >   	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
> > +	pairing_info_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
> >   	       HDCP_2_2_E_KH_KM_LEN);
> > @@ -312,6 +316,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
> >   	lc_init_in.port.integrated_port_type = data->port_type;
> >   	lc_init_in.port.physical_port = (u8)data->fw_ddi;
> > +	lc_init_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
> >   	if (byte < 0) {
> > @@ -367,6 +372,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
> >   	verify_lprime_in.port.integrated_port_type = data->port_type;
> >   	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
> > +	verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
> >   	       HDCP_2_2_L_PRIME_LEN);
> > @@ -424,6 +430,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
> >   	get_skey_in.port.integrated_port_type = data->port_type;
> >   	get_skey_in.port.physical_port = (u8)data->fw_ddi;
> > +	get_skey_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
> >   	if (byte < 0) {
> > @@ -488,6 +495,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
> >   	verify_repeater_in.port.integrated_port_type = data->port_type;
> >   	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
> > +	verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
> >   	       HDCP_2_2_RXINFO_LEN);
> > @@ -558,6 +566,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
> >   	verify_mprime_in.port.integrated_port_type = data->port_type;
> >   	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
> > +	verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
> >   	       HDCP_2_2_MPRIME_LEN);
> > @@ -619,6 +628,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
> >   	enable_auth_in.port.integrated_port_type = data->port_type;
> >   	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
> > +	enable_auth_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	enable_auth_in.stream_type = data->streams[0].stream_type;
> >   	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
> > @@ -673,6 +683,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
> >   	session_close_in.port.integrated_port_type = data->port_type;
> >   	session_close_in.port.physical_port = (u8)data->fw_ddi;
> > +	session_close_in.port.attached_transcoder = (u8)data->fw_tc;
> >   	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
> >   			      sizeof(session_close_in));
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
> > index e60282eb2d48..58e439d2fc1a 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> > @@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
> >   /* Uniquely identifies the hdcp port being addressed for a given command. */
> >   struct hdcp_port_id {
> >   	u8	integrated_port_type;
> > +	/* Used until Gen11.5. Must be zero for Gen11.5+ */
> >   	u8	physical_port;
> > -	u16	reserved;
> > +	u8	attached_transcoder;
> > +	u8	reserved;
> >   } __packed;
> >   /*
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Re: [PATCH v9 3/6] drm: Extend I915 mei interface for transcoder info

[Ramalingam C]

On 2019-08-27 at 10:18:07 +0530, Sharma, Shashank wrote:
> 
> On 8/22/2019 8:49 PM, Ramalingam C wrote:
> > I915 needs to send the index of the transcoder as per ME FW.
> > To support this, define enum mei_fw_ddi and add as a member into
> > the struct hdcp_port_data.
> 
> The commit message says you are defining enum mei_fw_ddi, but you are
> actually defining enum mei_fw_tc;
dangerous typo :) I will fix it. Thanks

-Ram
> 
> - Shashank
> 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >   include/drm/i915_mei_hdcp_interface.h | 13 +++++++++++++
> >   1 file changed, 13 insertions(+)
> > 
> > diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> > index a97acf1c9710..0de629bf2f62 100644
> > --- a/include/drm/i915_mei_hdcp_interface.h
> > +++ b/include/drm/i915_mei_hdcp_interface.h
> > @@ -54,9 +54,21 @@ enum mei_fw_ddi {
> >   	MEI_DDI_RANGE_END = MEI_DDI_A,
> >   };
> > +enum mei_fw_tc {
> > +	MEI_INVALID_TRANSCODER = 0x00,	/* Invalid transcoder type */
> > +	MEI_TC_EDP,			/* Transcoder for eDP */
> > +	MEI_TC_DSI0,			/* Transcoder for DSI0 */
> > +	MEI_TC_DSI1,			/* Transcoder for DSI1 */
> > +	MEI_TC_A = 0x10,		/* Transcoder TCA */
> > +	MEI_TC_B,			/* Transcoder TCB */
> > +	MEI_TC_C,			/* Transcoder TCC */
> > +	MEI_TC_D			/* Transcoder TCD */
> > +};
> > +
> >   /**
> >    * struct hdcp_port_data - intel specific HDCP port data
> >    * @fw_ddi: ddi index as per ME FW
> > + * @fw_tc: transcoder index as per ME FW
> >    * @port_type: HDCP port type as per ME FW classification
> >    * @protocol: HDCP adaptation as per ME FW
> >    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> > @@ -69,6 +81,7 @@ enum mei_fw_ddi {
> >    */
> >   struct hdcp_port_data {
> >   	enum mei_fw_ddi fw_ddi;
> > +	enum mei_fw_tc fw_tc;
> >   	u8 port_type;
> >   	u8 protocol;
> >   	u16 k;
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Re: [PATCH v9 5/6] drm/i915/hdcp: update current transcoder into intel_hdcp

[Sharma, Shashank]

Regards

Shashank

On 8/22/2019 8:49 PM, Ramalingam C wrote:
> On gen12+ platforms, HDCP HW is associated to the transcoder.
> Hence on every modeset update associated transcoder into the
> intel_hdcp of the port.
>
> v2:
>    s/trans/cpu_transcoder [Jani]
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   .../drm/i915/display/intel_display_types.h    |  7 +++
>   drivers/gpu/drm/i915/display/intel_dp.c       |  3 ++
>   drivers/gpu/drm/i915/display/intel_hdcp.c     | 49 ++++++++++++++++++-
>   drivers/gpu/drm/i915/display/intel_hdcp.h     |  3 ++
>   drivers/gpu/drm/i915/display/intel_hdmi.c     |  3 ++
>   5 files changed, 64 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 449abaea619f..fc85b3e284d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -388,6 +388,13 @@ struct intel_hdcp {
>   	wait_queue_head_t cp_irq_queue;
>   	atomic_t cp_irq_count;
>   	int cp_irq_count_cached;
> +
> +	/*
> +	 * HDCP register access for gen12+ need the transcoder associated.
> +	 * Transcoder attached to the connector could be changed at modeset.
> +	 * Hence caching the transcoder here.
> +	 */
> +	enum transcoder cpu_transcoder;
attached_transcoder to be inline with MEI counterpart of the code ?
>   };
>   
>   struct intel_connector {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 921ad0a2f7ba..ba5317d56da7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2244,6 +2244,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>   
>   	intel_psr_compute_config(intel_dp, pipe_config);
>   
> +	intel_hdcp_transcoder_config(intel_connector,
> +				     pipe_config->cpu_transcoder);
> +
>   	return 0;
>   }
>   
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 534832f435dc..1e5548833e8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1762,13 +1762,60 @@ enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
>   	}
>   }
>   
> +static inline
> +enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
> +{
> +	switch (cpu_transcoder) {
> +	case TRANSCODER_A ... TRANSCODER_D:
> +		return (enum mei_fw_tc)(cpu_transcoder | 0x10);
Again, as this is in context of HDCP, we should not entertain 
transcoders below. Or we should move this function in a more generic 
file like intel_display.c or intel_ddi.c
> +	case TRANSCODER_EDP:
> +		return MEI_TC_EDP;
> +	case TRANSCODER_DSI_0:
> +		return MEI_TC_DSI0;
> +	case TRANSCODER_DSI_1:
> +		return MEI_TC_DSI1;
> +	default:
> +		return MEI_INVALID_TRANSCODER;
> +	}
> +}
> +
> +void intel_hdcp_transcoder_config(struct intel_connector *connector,
> +				  enum transcoder cpu_transcoder)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	struct intel_hdcp *hdcp = &connector->hdcp;
> +
> +	if (!hdcp->shim)
> +		return;
> +
> +	if (INTEL_GEN(dev_priv) >= 12) {
Ah, so this is the gen_check which I was talking about in previous patch :-)
> +		mutex_lock(&hdcp->mutex);
> +		hdcp->cpu_transcoder = cpu_transcoder;
> +		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
> +		mutex_unlock(&hdcp->mutex);
> +	}
> +}
> +
>   static inline int initialize_hdcp_port_data(struct intel_connector *connector,
>   					    const struct intel_hdcp_shim *shim)
>   {
> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>   	struct intel_hdcp *hdcp = &connector->hdcp;
>   	struct hdcp_port_data *data = &hdcp->port_data;
> +	struct intel_crtc *crtc;
> +
> +	if (INTEL_GEN(dev_priv) < 12) {
> +		data->fw_ddi =
> +			intel_get_mei_fw_ddi_index(connector->encoder->port);
> +	} else {
> +		crtc = to_intel_crtc(connector->base.state->crtc);
> +		if (crtc) {
> +			hdcp->cpu_transcoder = crtc->config->cpu_transcoder;
> +			data->fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
> +		}
> +		data->fw_ddi = intel_get_mei_fw_ddi_index(PORT_NONE);

I dint understand this, why PORT_NONE ?

- Shashank

> +	}
>   
> -	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
>   	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
>   	data->protocol = (u8)shim->protocol;
>   
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 59a2b40405cc..41c1053d9e38 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -16,10 +16,13 @@ struct drm_i915_private;
>   struct intel_connector;
>   struct intel_hdcp_shim;
>   enum port;
> +enum transcoder;
>   
>   void intel_hdcp_atomic_check(struct drm_connector *connector,
>   			     struct drm_connector_state *old_state,
>   			     struct drm_connector_state *new_state);
> +void intel_hdcp_transcoder_config(struct intel_connector *connector,
> +				  enum transcoder cpu_transcoder);
>   int intel_hdcp_init(struct intel_connector *connector,
>   		    const struct intel_hdcp_shim *hdcp_shim);
>   int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index e02f0faecf02..6e9bb6bd1ee2 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2431,6 +2431,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>   		return -EINVAL;
>   	}
>   
> +	intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
> +				     pipe_config->cpu_transcoder);
> +
>   	return 0;
>   }
>   
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Re: [PATCH v9 4/6] misc/mei/hdcp: Fill transcoder index in port info

[Sharma, Shashank]

On 8/27/2019 10:47 AM, Ramalingam C wrote:
> On 2019-08-27 at 10:42:33 +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>> On 8/22/2019 8:49 PM, Ramalingam C wrote:
>>> For gen12+ platform we need to pass the transcoder info
>>> as part of the port info into ME FW.
>>>
>>> This change fills the payload for ME FW from hdcp_port_data.
>>>
>>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>> ---
>>>    drivers/misc/mei/hdcp/mei_hdcp.c | 11 +++++++++++
>>>    drivers/misc/mei/hdcp/mei_hdcp.h |  4 +++-
>>>    2 files changed, 14 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
>>> index 3638c77eba26..93027fd96c71 100644
>>> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
>>> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
>>> @@ -58,6 +58,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
>>>    	session_init_in.port.integrated_port_type = data->port_type;
>>>    	session_init_in.port.physical_port = (u8)data->fw_ddi;
>> As this entry is only valid till GEN11.5, don't we need GEN_CHECK here, say
>> (INTEL_GEN() < 12). Is that possible in MEI_FW ?
> Shashank,
>
> Not needed, as I915 checks the GEN# while loading the transcoder detail
> into hdcp_port_data. So here we can assign whatever passed as part of
> hdcp_port_data.
>
> -Ram

Yep, just saw this in the next patch,

Please feel free to use: Reviewed-by: Shashank Sharma 
<shashank.sharma@intel.com>

>> If not, probably we have to add this gen_check while filling the fw_tc part
>> in I915.
>>
>> Applies for all the changes below too.
>>
>> - Shashank
>>
>>> +	session_init_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	session_init_in.protocol = data->protocol;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
>>> @@ -127,6 +128,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
>>>    	verify_rxcert_in.port.integrated_port_type = data->port_type;
>>>    	verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
>>> +	verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
>>>    	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
>>> @@ -197,6 +199,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
>>>    	send_hprime_in.port.integrated_port_type = data->port_type;
>>>    	send_hprime_in.port.physical_port = (u8)data->fw_ddi;
>>> +	send_hprime_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
>>>    	       HDCP_2_2_H_PRIME_LEN);
>>> @@ -254,6 +257,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
>>>    	pairing_info_in.port.integrated_port_type = data->port_type;
>>>    	pairing_info_in.port.physical_port = (u8)data->fw_ddi;
>>> +	pairing_info_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
>>>    	       HDCP_2_2_E_KH_KM_LEN);
>>> @@ -312,6 +316,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
>>>    	lc_init_in.port.integrated_port_type = data->port_type;
>>>    	lc_init_in.port.physical_port = (u8)data->fw_ddi;
>>> +	lc_init_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
>>>    	if (byte < 0) {
>>> @@ -367,6 +372,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
>>>    	verify_lprime_in.port.integrated_port_type = data->port_type;
>>>    	verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
>>> +	verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
>>>    	       HDCP_2_2_L_PRIME_LEN);
>>> @@ -424,6 +430,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
>>>    	get_skey_in.port.integrated_port_type = data->port_type;
>>>    	get_skey_in.port.physical_port = (u8)data->fw_ddi;
>>> +	get_skey_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
>>>    	if (byte < 0) {
>>> @@ -488,6 +495,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
>>>    	verify_repeater_in.port.integrated_port_type = data->port_type;
>>>    	verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
>>> +	verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
>>>    	       HDCP_2_2_RXINFO_LEN);
>>> @@ -558,6 +566,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
>>>    	verify_mprime_in.port.integrated_port_type = data->port_type;
>>>    	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
>>> +	verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
>>>    	       HDCP_2_2_MPRIME_LEN);
>>> @@ -619,6 +628,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
>>>    	enable_auth_in.port.integrated_port_type = data->port_type;
>>>    	enable_auth_in.port.physical_port = (u8)data->fw_ddi;
>>> +	enable_auth_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	enable_auth_in.stream_type = data->streams[0].stream_type;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
>>> @@ -673,6 +683,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
>>>    	session_close_in.port.integrated_port_type = data->port_type;
>>>    	session_close_in.port.physical_port = (u8)data->fw_ddi;
>>> +	session_close_in.port.attached_transcoder = (u8)data->fw_tc;
>>>    	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
>>>    			      sizeof(session_close_in));
>>> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
>>> index e60282eb2d48..58e439d2fc1a 100644
>>> --- a/drivers/misc/mei/hdcp/mei_hdcp.h
>>> +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
>>> @@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
>>>    /* Uniquely identifies the hdcp port being addressed for a given command. */
>>>    struct hdcp_port_id {
>>>    	u8	integrated_port_type;
>>> +	/* Used until Gen11.5. Must be zero for Gen11.5+ */
>>>    	u8	physical_port;
>>> -	u16	reserved;
>>> +	u8	attached_transcoder;
>>> +	u8	reserved;
>>>    } __packed;
>>>    /*
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Re: [PATCH v9 3/6] drm: Extend I915 mei interface for transcoder info

[Ramalingam C]

On 2019-08-27 at 10:36:11 +0530, Sharma, Shashank wrote:
> 
> On 8/22/2019 8:49 PM, Ramalingam C wrote:
> > I915 needs to send the index of the transcoder as per ME FW.
> > To support this, define enum mei_fw_ddi and add as a member into
> > the struct hdcp_port_data.
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >   include/drm/i915_mei_hdcp_interface.h | 13 +++++++++++++
> >   1 file changed, 13 insertions(+)
> > 
> > diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> > index a97acf1c9710..0de629bf2f62 100644
> > --- a/include/drm/i915_mei_hdcp_interface.h
> > +++ b/include/drm/i915_mei_hdcp_interface.h
> > @@ -54,9 +54,21 @@ enum mei_fw_ddi {
> >   	MEI_DDI_RANGE_END = MEI_DDI_A,
> >   };
> > +enum mei_fw_tc {
> > +	MEI_INVALID_TRANSCODER = 0x00,	/* Invalid transcoder type */
> > +	MEI_TC_EDP,			/* Transcoder for eDP */
> > +	MEI_TC_DSI0,			/* Transcoder for DSI0 */
> > +	MEI_TC_DSI1,			/* Transcoder for DSI1 */
> Also, this is a bit odd, coz ports above can't do HDCP, so it doesn't make
> sense to have them here. But seems like we want to be in sync with MEI FW
> definitions, so we should change the function
> 
> intel_get_mei_fw_ddi_index to accept only from ports A to D, not above or
> below.
As we(I915) support HDCP on HDMI and DP only we will have TCA to TCD
only. Sure we can fix the intel_get_mei_fw_ddi_index to fill invalid TC
on other transcoders.

-Ram
> 
> - Shashank
> 
> > +	MEI_TC_A = 0x10,		/* Transcoder TCA */
> > +	MEI_TC_B,			/* Transcoder TCB */
> > +	MEI_TC_C,			/* Transcoder TCC */
> > +	MEI_TC_D			/* Transcoder TCD */
> > +};
> > +
> >   /**
> >    * struct hdcp_port_data - intel specific HDCP port data
> >    * @fw_ddi: ddi index as per ME FW
> > + * @fw_tc: transcoder index as per ME FW
> >    * @port_type: HDCP port type as per ME FW classification
> >    * @protocol: HDCP adaptation as per ME FW
> >    * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> > @@ -69,6 +81,7 @@ enum mei_fw_ddi {
> >    */
> >   struct hdcp_port_data {
> >   	enum mei_fw_ddi fw_ddi;
> > +	enum mei_fw_tc fw_tc;
> >   	u8 port_type;
> >   	u8 protocol;
> >   	u16 k;
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Re: [PATCH v9 5/6] drm/i915/hdcp: update current transcoder into intel_hdcp

[Ramalingam C]

On 2019-08-27 at 10:49:25 +0530, Sharma, Shashank wrote:
> Regards
> 
> Shashank
> 
> On 8/22/2019 8:49 PM, Ramalingam C wrote:
> > On gen12+ platforms, HDCP HW is associated to the transcoder.
> > Hence on every modeset update associated transcoder into the
> > intel_hdcp of the port.
> > 
> > v2:
> >    s/trans/cpu_transcoder [Jani]
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > Acked-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >   .../drm/i915/display/intel_display_types.h    |  7 +++
> >   drivers/gpu/drm/i915/display/intel_dp.c       |  3 ++
> >   drivers/gpu/drm/i915/display/intel_hdcp.c     | 49 ++++++++++++++++++-
> >   drivers/gpu/drm/i915/display/intel_hdcp.h     |  3 ++
> >   drivers/gpu/drm/i915/display/intel_hdmi.c     |  3 ++
> >   5 files changed, 64 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 449abaea619f..fc85b3e284d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -388,6 +388,13 @@ struct intel_hdcp {
> >   	wait_queue_head_t cp_irq_queue;
> >   	atomic_t cp_irq_count;
> >   	int cp_irq_count_cached;
> > +
> > +	/*
> > +	 * HDCP register access for gen12+ need the transcoder associated.
> > +	 * Transcoder attached to the connector could be changed at modeset.
> > +	 * Hence caching the transcoder here.
> > +	 */
> > +	enum transcoder cpu_transcoder;
> attached_transcoder to be inline with MEI counterpart of the code ?
This is needed so that we can use this to get the offset of register.
Need not be inline with MEI.
> >   };
> >   struct intel_connector {
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 921ad0a2f7ba..ba5317d56da7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2244,6 +2244,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >   	intel_psr_compute_config(intel_dp, pipe_config);
> > +	intel_hdcp_transcoder_config(intel_connector,
> > +				     pipe_config->cpu_transcoder);
> > +
> >   	return 0;
> >   }
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index 534832f435dc..1e5548833e8f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -1762,13 +1762,60 @@ enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
> >   	}
> >   }
> > +static inline
> > +enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
> > +{
> > +	switch (cpu_transcoder) {
> > +	case TRANSCODER_A ... TRANSCODER_D:
> > +		return (enum mei_fw_tc)(cpu_transcoder | 0x10);
> Again, as this is in context of HDCP, we should not entertain transcoders
> below. Or we should move this function in a more generic file like
> intel_display.c or intel_ddi.c
This is specific to hdcp. So let it be here. We will fill invalid
TRANSCODER for all non HDCO capable transcoders. Hope that works for
you.

> > +	case TRANSCODER_EDP:
> > +		return MEI_TC_EDP;
> > +	case TRANSCODER_DSI_0:
> > +		return MEI_TC_DSI0;
> > +	case TRANSCODER_DSI_1:
> > +		return MEI_TC_DSI1;
> > +	default:
> > +		return MEI_INVALID_TRANSCODER;
> > +	}
> > +}
> > +
> > +void intel_hdcp_transcoder_config(struct intel_connector *connector,
> > +				  enum transcoder cpu_transcoder)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> > +	struct intel_hdcp *hdcp = &connector->hdcp;
> > +
> > +	if (!hdcp->shim)
> > +		return;
> > +
> > +	if (INTEL_GEN(dev_priv) >= 12) {
> Ah, so this is the gen_check which I was talking about in previous patch :-)
> > +		mutex_lock(&hdcp->mutex);
> > +		hdcp->cpu_transcoder = cpu_transcoder;
> > +		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
> > +		mutex_unlock(&hdcp->mutex);
> > +	}
> > +}
> > +
> >   static inline int initialize_hdcp_port_data(struct intel_connector *connector,
> >   					    const struct intel_hdcp_shim *shim)
> >   {
> > +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> >   	struct intel_hdcp *hdcp = &connector->hdcp;
> >   	struct hdcp_port_data *data = &hdcp->port_data;
> > +	struct intel_crtc *crtc;
> > +
> > +	if (INTEL_GEN(dev_priv) < 12) {
> > +		data->fw_ddi =
> > +			intel_get_mei_fw_ddi_index(connector->encoder->port);
> > +	} else {
> > +		crtc = to_intel_crtc(connector->base.state->crtc);
> > +		if (crtc) {
> > +			hdcp->cpu_transcoder = crtc->config->cpu_transcoder;
> > +			data->fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
> > +		}
> > +		data->fw_ddi = intel_get_mei_fw_ddi_index(PORT_NONE);
> 
> I dint understand this, why PORT_NONE ?
ME FW API expects invalid PORT for GEN12+. Hence we assign the required
value here. May be I will add that info as doc here.

-Ram
> 
> - Shashank
> 
> > +	}
> > -	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
> >   	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
> >   	data->protocol = (u8)shim->protocol;
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
> > index 59a2b40405cc..41c1053d9e38 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> > @@ -16,10 +16,13 @@ struct drm_i915_private;
> >   struct intel_connector;
> >   struct intel_hdcp_shim;
> >   enum port;
> > +enum transcoder;
> >   void intel_hdcp_atomic_check(struct drm_connector *connector,
> >   			     struct drm_connector_state *old_state,
> >   			     struct drm_connector_state *new_state);
> > +void intel_hdcp_transcoder_config(struct intel_connector *connector,
> > +				  enum transcoder cpu_transcoder);
> >   int intel_hdcp_init(struct intel_connector *connector,
> >   		    const struct intel_hdcp_shim *hdcp_shim);
> >   int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index e02f0faecf02..6e9bb6bd1ee2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -2431,6 +2431,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
> >   		return -EINVAL;
> >   	}
> > +	intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
> > +				     pipe_config->cpu_transcoder);
> > +
> >   	return 0;
> >   }
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Re: [PATCH v9 5/6] drm/i915/hdcp: update current transcoder into intel_hdcp

[Sharma, Shashank]

Regards

Shashank

On 8/27/2019 10:57 AM, Ramalingam C wrote:
> On 2019-08-27 at 10:49:25 +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>> On 8/22/2019 8:49 PM, Ramalingam C wrote:
>>> On gen12+ platforms, HDCP HW is associated to the transcoder.
>>> Hence on every modeset update associated transcoder into the
>>> intel_hdcp of the port.
>>>
>>> v2:
>>>     s/trans/cpu_transcoder [Jani]
>>>
>>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>> ---
>>>    .../drm/i915/display/intel_display_types.h    |  7 +++
>>>    drivers/gpu/drm/i915/display/intel_dp.c       |  3 ++
>>>    drivers/gpu/drm/i915/display/intel_hdcp.c     | 49 ++++++++++++++++++-
>>>    drivers/gpu/drm/i915/display/intel_hdcp.h     |  3 ++
>>>    drivers/gpu/drm/i915/display/intel_hdmi.c     |  3 ++
>>>    5 files changed, 64 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> index 449abaea619f..fc85b3e284d4 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> @@ -388,6 +388,13 @@ struct intel_hdcp {
>>>    	wait_queue_head_t cp_irq_queue;
>>>    	atomic_t cp_irq_count;
>>>    	int cp_irq_count_cached;
>>> +
>>> +	/*
>>> +	 * HDCP register access for gen12+ need the transcoder associated.
>>> +	 * Transcoder attached to the connector could be changed at modeset.
>>> +	 * Hence caching the transcoder here.
>>> +	 */
>>> +	enum transcoder cpu_transcoder;
>> attached_transcoder to be inline with MEI counterpart of the code ?
> This is needed so that we can use this to get the offset of register.
> Need not be inline with MEI.
:) I meant in the MEI side we are using name "attached_transcoder" so 
using the same in I915 also would be easy to understand. But this is not 
important, I will leave it to you.
>>>    };
>>>    struct intel_connector {
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index 921ad0a2f7ba..ba5317d56da7 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -2244,6 +2244,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>>>    	intel_psr_compute_config(intel_dp, pipe_config);
>>> +	intel_hdcp_transcoder_config(intel_connector,
>>> +				     pipe_config->cpu_transcoder);
>>> +
>>>    	return 0;
>>>    }
>>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> index 534832f435dc..1e5548833e8f 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
>>> @@ -1762,13 +1762,60 @@ enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
>>>    	}
>>>    }
>>> +static inline
>>> +enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
>>> +{
>>> +	switch (cpu_transcoder) {
>>> +	case TRANSCODER_A ... TRANSCODER_D:
>>> +		return (enum mei_fw_tc)(cpu_transcoder | 0x10);
>> Again, as this is in context of HDCP, we should not entertain transcoders
>> below. Or we should move this function in a more generic file like
>> intel_display.c or intel_ddi.c
> This is specific to hdcp. So let it be here. We will fill invalid
> TRANSCODER for all non HDCO capable transcoders. Hope that works for
> you.
Sure.
>>> +	case TRANSCODER_EDP:
>>> +		return MEI_TC_EDP;
>>> +	case TRANSCODER_DSI_0:
>>> +		return MEI_TC_DSI0;
>>> +	case TRANSCODER_DSI_1:
>>> +		return MEI_TC_DSI1;
>>> +	default:
>>> +		return MEI_INVALID_TRANSCODER;
>>> +	}
>>> +}
>>> +
>>> +void intel_hdcp_transcoder_config(struct intel_connector *connector,
>>> +				  enum transcoder cpu_transcoder)
>>> +{
>>> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>>> +	struct intel_hdcp *hdcp = &connector->hdcp;
>>> +
>>> +	if (!hdcp->shim)
>>> +		return;
>>> +
>>> +	if (INTEL_GEN(dev_priv) >= 12) {
>> Ah, so this is the gen_check which I was talking about in previous patch :-)
>>> +		mutex_lock(&hdcp->mutex);
>>> +		hdcp->cpu_transcoder = cpu_transcoder;
>>> +		hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
>>> +		mutex_unlock(&hdcp->mutex);
>>> +	}
>>> +}
>>> +
>>>    static inline int initialize_hdcp_port_data(struct intel_connector *connector,
>>>    					    const struct intel_hdcp_shim *shim)
>>>    {
>>> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>>>    	struct intel_hdcp *hdcp = &connector->hdcp;
>>>    	struct hdcp_port_data *data = &hdcp->port_data;
>>> +	struct intel_crtc *crtc;
>>> +
>>> +	if (INTEL_GEN(dev_priv) < 12) {
>>> +		data->fw_ddi =
>>> +			intel_get_mei_fw_ddi_index(connector->encoder->port);
>>> +	} else {
>>> +		crtc = to_intel_crtc(connector->base.state->crtc);
>>> +		if (crtc) {
>>> +			hdcp->cpu_transcoder = crtc->config->cpu_transcoder;
>>> +			data->fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
>>> +		}
>>> +		data->fw_ddi = intel_get_mei_fw_ddi_index(PORT_NONE);
>> I dint understand this, why PORT_NONE ?
> ME FW API expects invalid PORT for GEN12+. Hence we assign the required
> value here. May be I will add that info as doc here.
>
> -Ram

Yes, please add a comment.

- Shashank

>> - Shashank
>>
>>> +	}
>>> -	data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
>>>    	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
>>>    	data->protocol = (u8)shim->protocol;
>>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
>>> index 59a2b40405cc..41c1053d9e38 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
>>> @@ -16,10 +16,13 @@ struct drm_i915_private;
>>>    struct intel_connector;
>>>    struct intel_hdcp_shim;
>>>    enum port;
>>> +enum transcoder;
>>>    void intel_hdcp_atomic_check(struct drm_connector *connector,
>>>    			     struct drm_connector_state *old_state,
>>>    			     struct drm_connector_state *new_state);
>>> +void intel_hdcp_transcoder_config(struct intel_connector *connector,
>>> +				  enum transcoder cpu_transcoder);
>>>    int intel_hdcp_init(struct intel_connector *connector,
>>>    		    const struct intel_hdcp_shim *hdcp_shim);
>>>    int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
>>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
>>> index e02f0faecf02..6e9bb6bd1ee2 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>>> @@ -2431,6 +2431,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>>>    		return -EINVAL;
>>>    	}
>>> +	intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
>>> +				     pipe_config->cpu_transcoder);
>>> +
>>>    	return 0;
>>>    }
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Re: [PATCH v9 6/6] drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+

[Sharma, Shashank]

Regards

Shashank

On 8/22/2019 8:49 PM, Ramalingam C wrote:
>  From Gen12 onwards, HDCP HW block is implemented within transcoders.
> Till Gen11 HDCP HW block was part of DDI.
>
> Hence required changes in HW programming is handled here.
>
> As ME FW needs the transcoder detail on which HDCP is enabled
> on Gen12+ platform, we are populating the detail in hdcp_port_data.
>
> v2:
>    _MMIO_TRANS is used [Lucas and Daniel]
>    platform check is moved into the caller [Lucas]
> v3:
>    platform check is moved into a macro [Shashank]
> v4:
>    Few optimizations in the coding [Shashank]
> v5:
>    Fixed alignment in macro definition in i915_reg.h [Shashank]
>    unused variables "reg" is removed.
> v6:
>    Configuring the transcoder at compute_config.
>    transcoder is used instead of pipe in macros.
>    Rebased.
> v7:
>    transcoder is cached at intel_hdcp
>    hdcp_port_data is configured with transcoder index asper ME FW.
> v8:
>    s/trans/cpu_transcoder
>    s/tc/cpu_transcoder
>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> [v5]
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_hdcp.c | 148 ++++++++++++++--------
>   drivers/gpu/drm/i915/display/intel_hdmi.c |  10 +-
>   drivers/gpu/drm/i915/i915_reg.h           | 124 ++++++++++++++++--
>   3 files changed, 219 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 1e5548833e8f..e2084403db27 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -18,6 +18,7 @@
>   #include "intel_display_types.h"
>   #include "intel_hdcp.h"
>   #include "intel_sideband.h"
> +#include "intel_connector.h"
>   
>   #define KEY_LOAD_TRIES	5
>   #define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
> @@ -105,24 +106,20 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
>   	return capable;
>   }
>   
> -static inline bool intel_hdcp_in_use(struct intel_connector *connector)
> +static inline
> +bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
> +		       enum transcoder cpu_transcoder, enum port port)
>   {
> -	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> -	enum port port = connector->encoder->port;
> -	u32 reg;
> -
> -	reg = I915_READ(PORT_HDCP_STATUS(port));
> -	return reg & HDCP_STATUS_ENC;
> +	return I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
> +	       HDCP_STATUS_ENC;
>   }
>   
> -static inline bool intel_hdcp2_in_use(struct intel_connector *connector)
> +static inline
> +bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
> +			enum transcoder cpu_transcoder, enum port port)
>   {
> -	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> -	enum port port = connector->encoder->port;
> -	u32 reg;
> -
> -	reg = I915_READ(HDCP2_STATUS_DDI(port));
> -	return reg & LINK_ENCRYPTION_STATUS;
> +	return I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
> +	       LINK_ENCRYPTION_STATUS;
>   }
>   
>   static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
> @@ -253,9 +250,28 @@ static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text)
>   }
>   
>   static
> -u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
> +u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
> +				enum transcoder cpu_transcoder, enum port port)
>   {
> -	enum port port = intel_dig_port->base.port;
> +	if (INTEL_GEN(dev_priv) >= 12) {
> +		switch (cpu_transcoder) {
> +		case TRANSCODER_A:
> +			return HDCP_TRANSA_REP_PRESENT |
> +			       HDCP_TRANSA_SHA1_M0;
> +		case TRANSCODER_B:
> +			return HDCP_TRANSB_REP_PRESENT |
> +			       HDCP_TRANSB_SHA1_M0;
> +		case TRANSCODER_C:
> +			return HDCP_TRANSC_REP_PRESENT |
> +			       HDCP_TRANSC_SHA1_M0;
> +		/* FIXME: Add a case for PIPE_D */
> +		default:
> +			DRM_ERROR("Unknown transcoder %d\n", cpu_transcoder);
> +			break;
> +		}
> +		return -EINVAL;
It doesn't make sense to have this return statement along sitting here, 
it should be up in with the default case; in place of break.
> +	}
> +
>   	switch (port) {
>   	case PORT_A:
>   		return HDCP_DDIA_REP_PRESENT | HDCP_DDIA_SHA1_M0;
> @@ -268,18 +284,21 @@ u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
>   	case PORT_E:
>   		return HDCP_DDIE_REP_PRESENT | HDCP_DDIE_SHA1_M0;
>   	default:
> +		DRM_ERROR("Unknown port %d\n", port);
>   		break;
>   	}
> -	DRM_ERROR("Unknown port %d\n", port);
>   	return -EINVAL;
>   }
>   
>   static
> -int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
> +int intel_hdcp_validate_v_prime(struct intel_connector *connector,
>   				const struct intel_hdcp_shim *shim,
>   				u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
>   {
> +	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
>   	struct drm_i915_private *dev_priv;
> +	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
> +	enum port port = intel_dig_port->base.port;
>   	u32 vprime, sha_text, sha_leftovers, rep_ctl;
>   	int ret, i, j, sha_idx;
>   
> @@ -306,7 +325,7 @@ int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
>   	sha_idx = 0;
>   	sha_text = 0;
>   	sha_leftovers = 0;
> -	rep_ctl = intel_hdcp_get_repeater_ctl(intel_dig_port);
> +	rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port);
>   	I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
>   	for (i = 0; i < num_downstream; i++) {
>   		unsigned int sha_empty;
> @@ -548,7 +567,7 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector)
>   	 * V prime atleast twice.
>   	 */
>   	for (i = 0; i < tries; i++) {
> -		ret = intel_hdcp_validate_v_prime(intel_dig_port, shim,
> +		ret = intel_hdcp_validate_v_prime(connector, shim,
>   						  ksv_fifo, num_downstream,
>   						  bstatus);
>   		if (!ret)
> @@ -576,6 +595,7 @@ static int intel_hdcp_auth(struct intel_connector *connector)
>   	struct drm_device *dev = connector->base.dev;
>   	const struct intel_hdcp_shim *shim = hdcp->shim;
>   	struct drm_i915_private *dev_priv;
> +	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
>   	enum port port;
>   	unsigned long r0_prime_gen_start;
>   	int ret, i, tries = 2;
> @@ -615,18 +635,21 @@ static int intel_hdcp_auth(struct intel_connector *connector)
>   
>   	/* Initialize An with 2 random values and acquire it */
>   	for (i = 0; i < 2; i++)
> -		I915_WRITE(PORT_HDCP_ANINIT(port), get_random_u32());
> -	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_CAPTURE_AN);
> +		I915_WRITE(HDCP_ANINIT(dev_priv, cpu_transcoder, port),
> +			   get_random_u32());
> +	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port),
> +		   HDCP_CONF_CAPTURE_AN);
>   
>   	/* Wait for An to be acquired */
> -	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
> +	if (intel_de_wait_for_set(dev_priv,
> +				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
>   				  HDCP_STATUS_AN_READY, 1)) {
>   		DRM_ERROR("Timed out waiting for An\n");
>   		return -ETIMEDOUT;
>   	}
>   
> -	an.reg[0] = I915_READ(PORT_HDCP_ANLO(port));
> -	an.reg[1] = I915_READ(PORT_HDCP_ANHI(port));
> +	an.reg[0] = I915_READ(HDCP_ANLO(dev_priv, cpu_transcoder, port));
> +	an.reg[1] = I915_READ(HDCP_ANHI(dev_priv, cpu_transcoder, port));
>   	ret = shim->write_an_aksv(intel_dig_port, an.shim);
>   	if (ret)
>   		return ret;
> @@ -644,24 +667,26 @@ static int intel_hdcp_auth(struct intel_connector *connector)
>   		return -EPERM;
>   	}
>   
> -	I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);
> -	I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);
> +	I915_WRITE(HDCP_BKSVLO(dev_priv, cpu_transcoder, port), bksv.reg[0]);
> +	I915_WRITE(HDCP_BKSVHI(dev_priv, cpu_transcoder, port), bksv.reg[1]);
>   
>   	ret = shim->repeater_present(intel_dig_port, &repeater_present);
>   	if (ret)
>   		return ret;
>   	if (repeater_present)
>   		I915_WRITE(HDCP_REP_CTL,
> -			   intel_hdcp_get_repeater_ctl(intel_dig_port));
> +			   intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder,
> +						       port));
>   
>   	ret = shim->toggle_signalling(intel_dig_port, true);
>   	if (ret)
>   		return ret;
>   
> -	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_AUTH_AND_ENC);
> +	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port),
> +		   HDCP_CONF_AUTH_AND_ENC);
>   
>   	/* Wait for R0 ready */
> -	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
> +	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
>   		     (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
>   		DRM_ERROR("Timed out waiting for R0 ready\n");
>   		return -ETIMEDOUT;
> @@ -689,22 +714,25 @@ static int intel_hdcp_auth(struct intel_connector *connector)
>   		ret = shim->read_ri_prime(intel_dig_port, ri.shim);
>   		if (ret)
>   			return ret;
> -		I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
> +		I915_WRITE(HDCP_RPRIME(dev_priv, cpu_transcoder, port), ri.reg);
>   
>   		/* Wait for Ri prime match */
> -		if (!wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
> +		if (!wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
> +						    port)) &
>   		    (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
>   			break;
>   	}
>   
>   	if (i == tries) {
>   		DRM_DEBUG_KMS("Timed out waiting for Ri prime match (%x)\n",
> -			      I915_READ(PORT_HDCP_STATUS(port)));
> +			      I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
> +						    port)));
>   		return -ETIMEDOUT;
>   	}
>   
>   	/* Wait for encryption confirmation */
> -	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
> +	if (intel_de_wait_for_set(dev_priv,
> +				  HDCP_STATUS(dev_priv, cpu_transcoder, port),
>   				  HDCP_STATUS_ENC,
>   				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>   		DRM_ERROR("Timed out waiting for encryption\n");
> @@ -729,15 +757,17 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
>   	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
>   	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
>   	enum port port = intel_dig_port->base.port;
> +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
>   	int ret;
>   
>   	DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n",
>   		      connector->base.name, connector->base.base.id);
>   
>   	hdcp->hdcp_encrypted = false;
> -	I915_WRITE(PORT_HDCP_CONF(port), 0);
> -	if (intel_de_wait_for_clear(dev_priv, PORT_HDCP_STATUS(port), ~0,
> -				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
> +	I915_WRITE(HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
> +	if (intel_de_wait_for_clear(dev_priv,
> +				    HDCP_STATUS(dev_priv, cpu_transcoder, port),
> +				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
>   		DRM_ERROR("Failed to disable HDCP, timeout clearing status\n");
>   		return -ETIMEDOUT;
>   	}
> @@ -808,9 +838,11 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
>   	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
>   	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
>   	enum port port = intel_dig_port->base.port;
> +	enum transcoder cpu_transcoder;
>   	int ret = 0;
>   
>   	mutex_lock(&hdcp->mutex);
> +	cpu_transcoder = hdcp->cpu_transcoder;
>   
>   	/* Check_link valid only when HDCP1.4 is enabled */
>   	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
> @@ -819,10 +851,11 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
>   		goto out;
>   	}
>   
> -	if (WARN_ON(!intel_hdcp_in_use(connector))) {
> +	if (WARN_ON(!intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) {
>   		DRM_ERROR("%s:%d HDCP link stopped encryption,%x\n",
>   			  connector->base.name, connector->base.base.id,
> -			  I915_READ(PORT_HDCP_STATUS(port)));
> +			  I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
> +						port)));
>   		ret = -ENXIO;
>   		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
>   		schedule_work(&hdcp->prop_work);
> @@ -1493,10 +1526,11 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
>   	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>   	struct intel_hdcp *hdcp = &connector->hdcp;
>   	enum port port = connector->encoder->port;
> +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
>   	int ret;
>   
> -	WARN_ON(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS);
> -
> +	WARN_ON(I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
> +		LINK_ENCRYPTION_STATUS);
>   	if (hdcp->shim->toggle_signalling) {
>   		ret = hdcp->shim->toggle_signalling(intel_dig_port, true);
>   		if (ret) {
> @@ -1506,14 +1540,18 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
>   		}
>   	}
>   
> -	if (I915_READ(HDCP2_STATUS_DDI(port)) & LINK_AUTH_STATUS) {
> +	if (I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
> +	    LINK_AUTH_STATUS) {
>   		/* Link is Authenticated. Now set for Encryption */
> -		I915_WRITE(HDCP2_CTL_DDI(port),
> -			   I915_READ(HDCP2_CTL_DDI(port)) |
> +		I915_WRITE(HDCP2_CTL(dev_priv, cpu_transcoder, port),
> +			   I915_READ(HDCP2_CTL(dev_priv, cpu_transcoder,
> +					       port)) |
>   			   CTL_LINK_ENCRYPTION_REQ);
>   	}
>   
> -	ret = intel_de_wait_for_set(dev_priv, HDCP2_STATUS_DDI(port),
> +	ret = intel_de_wait_for_set(dev_priv,
> +				    HDCP2_STATUS(dev_priv, cpu_transcoder,
> +						 port),
>   				    LINK_ENCRYPTION_STATUS,
>   				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
>   
> @@ -1526,14 +1564,19 @@ static int hdcp2_disable_encryption(struct intel_connector *connector)
>   	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>   	struct intel_hdcp *hdcp = &connector->hdcp;
>   	enum port port = connector->encoder->port;
> +	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
>   	int ret;
>   
> -	WARN_ON(!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS));
> +	WARN_ON(!(I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
> +			    LINK_ENCRYPTION_STATUS));
>   
> -	I915_WRITE(HDCP2_CTL_DDI(port),
> -		   I915_READ(HDCP2_CTL_DDI(port)) & ~CTL_LINK_ENCRYPTION_REQ);
> +	I915_WRITE(HDCP2_CTL(dev_priv, cpu_transcoder, port),
> +		   I915_READ(HDCP2_CTL(dev_priv, cpu_transcoder, port)) &
> +		   ~CTL_LINK_ENCRYPTION_REQ);
>   
> -	ret = intel_de_wait_for_clear(dev_priv, HDCP2_STATUS_DDI(port),
> +	ret = intel_de_wait_for_clear(dev_priv,
> +				      HDCP2_STATUS(dev_priv, cpu_transcoder,
> +						   port),
>   				      LINK_ENCRYPTION_STATUS,
>   				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
>   	if (ret == -ETIMEDOUT)
> @@ -1632,9 +1675,11 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
>   	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>   	struct intel_hdcp *hdcp = &connector->hdcp;
>   	enum port port = connector->encoder->port;
> +	enum transcoder cpu_transcoder;
>   	int ret = 0;
>   
>   	mutex_lock(&hdcp->mutex);
> +	cpu_transcoder = hdcp->cpu_transcoder;
>   
>   	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
>   	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
> @@ -1643,9 +1688,10 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
>   		goto out;
>   	}
>   
> -	if (WARN_ON(!intel_hdcp2_in_use(connector))) {
> +	if (WARN_ON(!intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) {
>   		DRM_ERROR("HDCP2.2 link stopped the encryption, %x\n",
> -			  I915_READ(HDCP2_STATUS_DDI(port)));
> +			  I915_READ(HDCP2_STATUS(dev_priv, cpu_transcoder,
> +						 port)));
>   		ret = -ENXIO;
>   		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
>   		schedule_work(&hdcp->prop_work);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 6e9bb6bd1ee2..f6bb77fd0930 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1491,7 +1491,10 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
>   {
>   	struct drm_i915_private *dev_priv =
>   		intel_dig_port->base.base.dev->dev_private;
> +	struct intel_connector *connector =
> +		intel_dig_port->hdmi.attached_connector;
>   	enum port port = intel_dig_port->base.port;
> +	enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
>   	int ret;
>   	union {
>   		u32 reg;
> @@ -1502,13 +1505,14 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
>   	if (ret)
>   		return false;
>   
> -	I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
> +	I915_WRITE(HDCP_RPRIME(dev_priv, cpu_transcoder, port), ri.reg);
>   
>   	/* Wait for Ri prime match */
> -	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
> +	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
>   		     (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
>   		DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
> -			  I915_READ(PORT_HDCP_STATUS(port)));
> +			  I915_READ(HDCP_STATUS(dev_priv, cpu_transcoder,
> +						port)));
>   		return false;
>   	}
>   	return true;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2abd199093c5..572e4cba847a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9256,12 +9256,20 @@ enum skl_power_gate {
>   
>   /* HDCP Repeater Registers */
>   #define HDCP_REP_CTL			_MMIO(0x66d00)
> +#define  HDCP_TRANSA_REP_PRESENT	BIT(31)
> +#define  HDCP_TRANSB_REP_PRESENT	BIT(30)
> +#define  HDCP_TRANSC_REP_PRESENT	BIT(29)
> +#define  HDCP_TRANSD_REP_PRESENT	BIT(28)
>   #define  HDCP_DDIB_REP_PRESENT		BIT(30)
>   #define  HDCP_DDIA_REP_PRESENT		BIT(29)
>   #define  HDCP_DDIC_REP_PRESENT		BIT(28)
>   #define  HDCP_DDID_REP_PRESENT		BIT(27)
>   #define  HDCP_DDIF_REP_PRESENT		BIT(26)
>   #define  HDCP_DDIE_REP_PRESENT		BIT(25)
> +#define  HDCP_TRANSA_SHA1_M0		(1 << 20)
> +#define  HDCP_TRANSB_SHA1_M0		(2 << 20)
> +#define  HDCP_TRANSC_SHA1_M0		(3 << 20)
> +#define  HDCP_TRANSD_SHA1_M0		(4 << 20)
>   #define  HDCP_DDIB_SHA1_M0		(1 << 20)
>   #define  HDCP_DDIA_SHA1_M0		(2 << 20)
>   #define  HDCP_DDIC_SHA1_M0		(3 << 20)
> @@ -9301,15 +9309,92 @@ enum skl_power_gate {
>   					  _PORTE_HDCP_AUTHENC, \
>   					  _PORTF_HDCP_AUTHENC) + (x))
>   #define PORT_HDCP_CONF(port)		_PORT_HDCP_AUTHENC(port, 0x0)
> +#define _TRANSA_HDCP_CONF		0x66400
> +#define _TRANSB_HDCP_CONF		0x66500
> +#define TRANS_HDCP_CONF(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
> +						    _TRANSB_HDCP_CONF)
> +#define HDCP_CONF(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_CONF(trans) : \
> +					 PORT_HDCP_CONF(port))
> +
>   #define  HDCP_CONF_CAPTURE_AN		BIT(0)
>   #define  HDCP_CONF_AUTH_AND_ENC		(BIT(1) | BIT(0))
>   #define PORT_HDCP_ANINIT(port)		_PORT_HDCP_AUTHENC(port, 0x4)
> +#define _TRANSA_HDCP_ANINIT		0x66404
> +#define _TRANSB_HDCP_ANINIT		0x66504
> +#define TRANS_HDCP_ANINIT(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP_ANINIT, \
> +						    _TRANSB_HDCP_ANINIT)
> +#define HDCP_ANINIT(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_ANINIT(trans) : \
> +					 PORT_HDCP_ANINIT(port))
> +
>   #define PORT_HDCP_ANLO(port)		_PORT_HDCP_AUTHENC(port, 0x8)
> +#define _TRANSA_HDCP_ANLO		0x66408
> +#define _TRANSB_HDCP_ANLO		0x66508
> +#define TRANS_HDCP_ANLO(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
> +						    _TRANSB_HDCP_ANLO)
> +#define HDCP_ANLO(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_ANLO(trans) : \
> +					 PORT_HDCP_ANLO(port))
> +
>   #define PORT_HDCP_ANHI(port)		_PORT_HDCP_AUTHENC(port, 0xC)
> +#define _TRANSA_HDCP_ANHI		0x6640C
> +#define _TRANSB_HDCP_ANHI		0x6650C
> +#define TRANS_HDCP_ANHI(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
> +						    _TRANSB_HDCP_ANHI)
> +#define HDCP_ANHI(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_ANHI(trans) : \
> +					 PORT_HDCP_ANHI(port))
> +
>   #define PORT_HDCP_BKSVLO(port)		_PORT_HDCP_AUTHENC(port, 0x10)
> +#define _TRANSA_HDCP_BKSVLO		0x66410
> +#define _TRANSB_HDCP_BKSVLO		0x66510
> +#define TRANS_HDCP_BKSVLO(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP_BKSVLO, \
> +						    _TRANSB_HDCP_BKSVLO)
> +#define HDCP_BKSVLO(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_BKSVLO(trans) : \
> +					 PORT_HDCP_BKSVLO(port))
> +
>   #define PORT_HDCP_BKSVHI(port)		_PORT_HDCP_AUTHENC(port, 0x14)
> +#define _TRANSA_HDCP_BKSVHI		0x66414
> +#define _TRANSB_HDCP_BKSVHI		0x66514
> +#define TRANS_HDCP_BKSVHI(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP_BKSVHI, \
> +						    _TRANSB_HDCP_BKSVHI)
> +#define HDCP_BKSVHI(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_BKSVHI(trans) : \
> +					 PORT_HDCP_BKSVHI(port))
> +
>   #define PORT_HDCP_RPRIME(port)		_PORT_HDCP_AUTHENC(port, 0x18)
> +#define _TRANSA_HDCP_RPRIME		0x66418
> +#define _TRANSB_HDCP_RPRIME		0x66518
> +#define TRANS_HDCP_RPRIME(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP_RPRIME, \
> +						    _TRANSB_HDCP_RPRIME)
> +#define HDCP_RPRIME(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_RPRIME(trans) : \
> +					 PORT_HDCP_RPRIME(port))
> +
>   #define PORT_HDCP_STATUS(port)		_PORT_HDCP_AUTHENC(port, 0x1C)
> +#define _TRANSA_HDCP_STATUS		0x6641C
> +#define _TRANSB_HDCP_STATUS		0x6651C
> +#define TRANS_HDCP_STATUS(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP_STATUS, \
> +						    _TRANSB_HDCP_STATUS)
> +#define HDCP_STATUS(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP_STATUS(trans) : \
> +					 PORT_HDCP_STATUS(port))
> +
>   #define  HDCP_STATUS_STREAM_A_ENC	BIT(31)
>   #define  HDCP_STATUS_STREAM_B_ENC	BIT(30)
>   #define  HDCP_STATUS_STREAM_C_ENC	BIT(29)
> @@ -9336,23 +9421,44 @@ enum skl_power_gate {
>   					  _PORTD_HDCP2_BASE, \
>   					  _PORTE_HDCP2_BASE, \
>   					  _PORTF_HDCP2_BASE) + (x))
> -
> -#define HDCP2_AUTH_DDI(port)		_PORT_HDCP2_BASE(port, 0x98)
> +#define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
> +#define _TRANSA_HDCP2_AUTH		0x66498
> +#define _TRANSB_HDCP2_AUTH		0x66598
> +#define TRANS_HDCP2_AUTH(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_AUTH, \
> +						    _TRANSB_HDCP2_AUTH)
>   #define   AUTH_LINK_AUTHENTICATED	BIT(31)
>   #define   AUTH_LINK_TYPE		BIT(30)
>   #define   AUTH_FORCE_CLR_INPUTCTR	BIT(19)
>   #define   AUTH_CLR_KEYS			BIT(18)
> -
> -#define HDCP2_CTL_DDI(port)		_PORT_HDCP2_BASE(port, 0xB0)
> +#define HDCP2_AUTH(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP2_AUTH(trans) : \
> +					 PORT_HDCP2_AUTH(port))
> +
> +#define PORT_HDCP2_CTL(port)		_PORT_HDCP2_BASE(port, 0xB0)
> +#define _TRANSA_HDCP2_CTL		0x664B0
> +#define _TRANSB_HDCP2_CTL		0x665B0
> +#define TRANS_HDCP2_CTL(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_CTL, \
> +						    _TRANSB_HDCP2_CTL)
>   #define   CTL_LINK_ENCRYPTION_REQ	BIT(31)
> -
> -#define HDCP2_STATUS_DDI(port)		_PORT_HDCP2_BASE(port, 0xB4)
> -#define   STREAM_ENCRYPTION_STATUS_A	BIT(31)
> -#define   STREAM_ENCRYPTION_STATUS_B	BIT(30)
> -#define   STREAM_ENCRYPTION_STATUS_C	BIT(29)
> +#define HDCP2_CTL(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP2_CTL(trans) : \
> +					 PORT_HDCP2_CTL(port))
> +
> +#define PORT_HDCP2_STATUS(port)		_PORT_HDCP2_BASE(port, 0xB4)
> +#define _TRANSA_HDCP2_STATUS		0x664B4
> +#define _TRANSB_HDCP2_STATUS		0x665B4
> +#define TRANS_HDCP2_STATUS(trans)	_MMIO_TRANS(trans, \
> +						    _TRANSA_HDCP2_STATUS, \
> +						    _TRANSB_HDCP2_STATUS)
>   #define   LINK_TYPE_STATUS		BIT(22)
>   #define   LINK_AUTH_STATUS		BIT(21)
>   #define   LINK_ENCRYPTION_STATUS	BIT(20)
> +#define HDCP2_STATUS(dev_priv, trans, port) \
> +					(INTEL_GEN(dev_priv) >= 12 ? \
> +					 TRANS_HDCP2_STATUS(trans) : \
> +					 PORT_HDCP2_STATUS(port))
>   
>   /* Per-pipe DDI Function Control */
>   #define _TRANS_DDI_FUNC_CTL_A		0x60400

I cross checked the deltas between V5 to V9, they seem ok,

You can carry forward my R-B from V5.

- Shashank


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