From: Manasi Navare <manasi.d.navare@intel.com>
To: Madhumitha Tolakanahalli Pradeep
<madhumitha.tolakanahalli.pradeep@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/tgl: Enabling DSC on Pipe A for TGL
Date: Thu, 22 Aug 2019 17:59:44 -0700 [thread overview]
Message-ID: <20190823005943.GE701@intel.com> (raw)
In-Reply-To: <20190823004655.28905-1-madhumitha.tolakanahalli.pradeep@intel.com>
On Thu, Aug 22, 2019 at 05:46:55PM -0700, Madhumitha Tolakanahalli Pradeep wrote:
> DSC was not supported on Pipe A for previous platforms. Tigerlake onwards,
> all the pipes support DSC. Hence, the DSC and FEC restriction on
> Pipe A needs to be removed.
>
> v2: Changes in the logic around removing the restriction around
> Pipe A (Manasi, Lucas)
>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Looks good to me
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4884c87c8ed7..e2c8fe274c84 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1739,8 +1739,14 @@ static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - return INTEL_GEN(dev_priv) >= 11 &&
> - pipe_config->cpu_transcoder != TRANSCODER_A;
> + /* On TGL, FEC is supported on all Pipes */
> + if (INTEL_GEN(dev_priv) >= 12)
> + return true;
> +
> + if (IS_GEN(dev_priv, 11) && pipe_config->cpu_transcoder != TRANSCODER_A)
> + return true;
> +
> + return false;
> }
>
> static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> @@ -1755,8 +1761,15 @@ static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - return INTEL_GEN(dev_priv) >= 10 &&
> - pipe_config->cpu_transcoder != TRANSCODER_A;
> + /* On TGL, DSC is supported on all Pipes */
> + if (INTEL_GEN(dev_priv) >= 12)
> + return true;
> +
> + if (INTEL_GEN(dev_priv) >= 10 &&
> + pipe_config->cpu_transcoder != TRANSCODER_A)
> + return true;
> +
> + return false;
> }
>
> static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
> --
> 2.17.1
>
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next prev parent reply other threads:[~2019-08-23 7:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 0:46 [PATCH] drm/i915/tgl: Enabling DSC on Pipe A for TGL Madhumitha Tolakanahalli Pradeep
2019-08-23 0:59 ` Manasi Navare [this message]
2019-08-23 1:56 ` ✓ Fi.CI.BAT: success for drm/i915/tgl: Enabling DSC on Pipe A for TGL (rev2) Patchwork
2019-08-23 8:50 ` [PATCH] drm/i915/tgl: Enabling DSC on Pipe A for TGL Lucas De Marchi
2019-08-23 19:59 ` ✗ Fi.CI.IGT: failure for drm/i915/tgl: Enabling DSC on Pipe A for TGL (rev2) Patchwork
2019-08-28 20:12 ` [PATCH] drm/i915/tgl: Enabling DSC on Pipe A for TGL Manasi Navare
-- strict thread matches above, loose matches on Subject: below --
2019-08-14 23:51 Madhumitha Tolakanahalli Pradeep
2019-08-15 18:24 ` Manasi Navare
2019-08-15 18:39 ` Tolakanahalli Pradeep, Madhumitha
2019-08-15 18:53 ` Manasi Navare
2019-08-15 19:07 ` Tolakanahalli Pradeep, Madhumitha
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