From: Manasi Navare <manasi.d.navare@intel.com>
To: Animesh Manna <animesh.manna@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC 2/6] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation
Date: Tue, 22 Oct 2019 10:40:55 -0700 [thread overview]
Message-ID: <20191022174055.GC2533@intel.com> (raw)
In-Reply-To: <bd7b9c22-7a51-7dfc-e86c-039aa5d47ab4@intel.com>
On Tue, Oct 22, 2019 at 07:34:13PM +0530, Animesh Manna wrote:
>
> On 10/22/2019 4:27 AM, Manasi Navare wrote:
> >On Thu, Oct 03, 2019 at 08:36:49PM +0530, Animesh Manna wrote:
> >>vswing/pre-emphasis adjustment calculation is needed in processing
> >>of auto phy compliance request other than link training, so moved
> >>the same function in intel_dp.c.
> >>
> >>No functional change.
> >You could just make it a non static function instead of moving to intel_dp.c
>
> Initially I did the same ... :)
> Later I thought intel_dp_link_training.c file is mainly focused only on link
> training process, start_link_train() and stop_link_train() are only exposed.
> I thought I may not be allowed to expose intel_get_adjust_train() as it is
> not exclusive for link training.
> Please let me know your view.
Infact now that I look at this, i think the prepare_phy_test function should only
probably get the drm_get_phy_test_pattern and populate in the intel_dp_compliance
structure and then adjust train and all that can happen right before pattern update
which will need to happen in atomic_commit_tail.
How do you handle the regular link training sequence in the case of PHY test?
What happens to the adjust train the the regular link training clock recovery and
channel eq stages?
Manasi
>
> Regards,
> Animesh
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next prev parent reply other threads:[~2019-10-22 17:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-03 15:06 [RFC 0/6] DP Phy compliace auto test Animesh Manna
2019-10-03 15:06 ` [RFC 1/6] drm/dp: get/set phy compliance pattern Animesh Manna
2019-10-21 23:27 ` Manasi Navare
2019-10-22 13:29 ` Animesh Manna
2019-11-05 23:12 ` Manasi Navare
2019-11-05 23:12 ` [Intel-gfx] " Manasi Navare
2019-10-03 15:06 ` [RFC 2/6] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation Animesh Manna
2019-10-21 22:57 ` Manasi Navare
2019-10-22 14:04 ` Animesh Manna
2019-10-22 17:40 ` Manasi Navare [this message]
2019-10-24 11:45 ` Animesh Manna
2019-10-24 11:45 ` [Intel-gfx] " Animesh Manna
2019-10-03 15:06 ` [RFC 3/6] drm/i915/dp: Preparation for DP phy compliance auto test Animesh Manna
2019-10-21 23:29 ` Manasi Navare
2019-10-22 14:12 ` Animesh Manna
2019-10-03 15:06 ` [RFC 4/6] drm/i915/dp: Register definition for DP compliance register Animesh Manna
2019-10-03 15:06 ` [RFC 5/6] drm/i915/dp: Update the pattern as per request Animesh Manna
2019-10-03 15:06 ` [RFC 6/6] drm/i915/dp: Program vswing, pre-emphasis, test-pattern Animesh Manna
2019-10-21 23:47 ` Manasi Navare
2019-10-22 15:07 ` Animesh Manna
2019-10-22 18:41 ` Manasi Navare
2019-10-03 17:36 ` ✓ Fi.CI.BAT: success for DP Phy compliace auto test Patchwork
2019-10-04 3:07 ` ✗ Fi.CI.IGT: failure " Patchwork
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