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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture
Date: Tue, 29 Oct 2019 10:28:47 +0000	[thread overview]
Message-ID: <20191029102851.7497-3-matthew.auld@intel.com> (raw)
In-Reply-To: <20191029102851.7497-1-matthew.auld@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We can't fence anything without aperture.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 321189e1b0f2..71efccfde122 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
 
 	detect_bit_6_swizzle(ggtt);
 
-	if (INTEL_GEN(i915) >= 7 &&
-	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
+	if (!i915_ggtt_has_aperture(ggtt))
+		num_fences = 0;
+	else if (INTEL_GEN(i915) >= 7 &&
+		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
 		num_fences = 32;
 	else if (INTEL_GEN(i915) >= 4 ||
 		 IS_I945G(i915) || IS_I945GM(i915) ||
-- 
2.20.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture
Date: Tue, 29 Oct 2019 10:28:47 +0000	[thread overview]
Message-ID: <20191029102851.7497-3-matthew.auld@intel.com> (raw)
Message-ID: <20191029102847.HenukPwUpIPfROiyHgLfVjQdGg5mtzjWc0bdgmLWd4E@z> (raw)
In-Reply-To: <20191029102851.7497-1-matthew.auld@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

We can't fence anything without aperture.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 321189e1b0f2..71efccfde122 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -846,8 +846,10 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
 
 	detect_bit_6_swizzle(ggtt);
 
-	if (INTEL_GEN(i915) >= 7 &&
-	    !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
+	if (!i915_ggtt_has_aperture(ggtt))
+		num_fences = 0;
+	else if (INTEL_GEN(i915) >= 7 &&
+		 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)))
 		num_fences = 32;
 	else if (INTEL_GEN(i915) >= 4 ||
 		 IS_I945G(i915) || IS_I945GM(i915) ||
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-29 10:28 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-29 10:28 [PATCH v2 1/7] drm/i915: define i915_ggtt_has_aperture Matthew Auld
2019-10-29 10:28 ` [Intel-gfx] " Matthew Auld
2019-10-29 10:28 ` [PATCH v2 2/7] drm/i915: do not map aperture if it is not available Matthew Auld
2019-10-29 10:28   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:28 ` Matthew Auld [this message]
2019-10-29 10:28   ` [Intel-gfx] [PATCH v2 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture Matthew Auld
2019-10-29 10:28 ` [PATCH v2 4/7] drm/i915: error capture with no ggtt slot Matthew Auld
2019-10-29 10:28   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:28 ` [PATCH v2 5/7] drm/i915: Don't try to place HWS in non-existing mappable region Matthew Auld
2019-10-29 10:28   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:28 ` [PATCH v2 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture Matthew Auld
2019-10-29 10:28   ` [Intel-gfx] " Matthew Auld
2019-10-29 10:28 ` [PATCH v2 7/7] drm/i915/selftests: check for missing aperture Matthew Auld
2019-10-29 10:28   ` [Intel-gfx] " Matthew Auld
2019-10-29 12:12 ` ✗ Fi.CI.BUILD: failure for series starting with [v2,1/7] drm/i915: define i915_ggtt_has_aperture Patchwork
2019-10-29 12:12   ` [Intel-gfx] " Patchwork

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