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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 0/5] tgl: MST support
Date: Tue, 29 Oct 2019 18:24:43 -0700	[thread overview]
Message-ID: <20191030012448.14937-1-lucas.demarchi@intel.com> (raw)

Additional code to support more than one display when using MST with
TGL. It's still WIP! From what I could check on my tests we are correctly
tracking the master transcoder and setting it accordingly on
TRANS_DDI_FUNC_CTL and DP_TP_CTL.

I tried also setting MST mode on the slave's DP_TP_CTL. I could get the
second display to show up some times and we don't get stuck on "timeout
waiting for ACT" error message.  This is not according to the spec
though, and it still doesn't work most of the time. So... I didn't add
it here.

I guess now I need another pair of eyes to check what I'm doing wrong
since continuing to stare at the spec and code isn't helping. José,
Imre?

José Roberto de Souza (2):
  drm/i915: Add for_each_new_intel_connector_in_state()
  drm/i915/tgl: Select master transcoder in DP MST

Lucas De Marchi (3):
  drm/i915: add wrappers to get intel connector state
  drm/i915/tgl: do not enable transcoder clock twice on MST
  drm/i915: avoid reading DP_TP_CTL twice

 drivers/gpu/drm/i915/display/intel_ddi.c      |  54 +++---
 drivers/gpu/drm/i915/display/intel_display.c  |  16 ++
 drivers/gpu/drm/i915/display/intel_display.h  |   8 +
 .../drm/i915/display/intel_display_types.h    |  21 +++
 drivers/gpu/drm/i915/display/intel_dp_mst.c   | 159 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.h   |   2 +
 6 files changed, 236 insertions(+), 24 deletions(-)

-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 0/5] tgl: MST support
Date: Tue, 29 Oct 2019 18:24:43 -0700	[thread overview]
Message-ID: <20191030012448.14937-1-lucas.demarchi@intel.com> (raw)
Message-ID: <20191030012443.8-4WD-etgUS1B21q-lNjTxbxgSbbqTtHTpEHZY53k1Y@z> (raw)

Additional code to support more than one display when using MST with
TGL. It's still WIP! From what I could check on my tests we are correctly
tracking the master transcoder and setting it accordingly on
TRANS_DDI_FUNC_CTL and DP_TP_CTL.

I tried also setting MST mode on the slave's DP_TP_CTL. I could get the
second display to show up some times and we don't get stuck on "timeout
waiting for ACT" error message.  This is not according to the spec
though, and it still doesn't work most of the time. So... I didn't add
it here.

I guess now I need another pair of eyes to check what I'm doing wrong
since continuing to stare at the spec and code isn't helping. José,
Imre?

José Roberto de Souza (2):
  drm/i915: Add for_each_new_intel_connector_in_state()
  drm/i915/tgl: Select master transcoder in DP MST

Lucas De Marchi (3):
  drm/i915: add wrappers to get intel connector state
  drm/i915/tgl: do not enable transcoder clock twice on MST
  drm/i915: avoid reading DP_TP_CTL twice

 drivers/gpu/drm/i915/display/intel_ddi.c      |  54 +++---
 drivers/gpu/drm/i915/display/intel_display.c  |  16 ++
 drivers/gpu/drm/i915/display/intel_display.h  |   8 +
 .../drm/i915/display/intel_display_types.h    |  21 +++
 drivers/gpu/drm/i915/display/intel_dp_mst.c   | 159 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp_mst.h   |   2 +
 6 files changed, 236 insertions(+), 24 deletions(-)

-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-10-30  1:25 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-30  1:24 Lucas De Marchi [this message]
2019-10-30  1:24 ` [Intel-gfx] [PATCH 0/5] tgl: MST support Lucas De Marchi
2019-10-30  1:24 ` [PATCH 1/5] drm/i915: Add for_each_new_intel_connector_in_state() Lucas De Marchi
2019-10-30  1:24   ` [Intel-gfx] " Lucas De Marchi
2019-10-30  1:24 ` [PATCH 2/5] drm/i915: add wrappers to get intel connector state Lucas De Marchi
2019-10-30  1:24   ` [Intel-gfx] " Lucas De Marchi
2019-11-01  0:26   ` Souza, Jose
2019-11-01  0:26     ` [Intel-gfx] " Souza, Jose
2019-10-30  1:24 ` [PATCH 3/5] drm/i915/tgl: do not enable transcoder clock twice on MST Lucas De Marchi
2019-10-30  1:24   ` [Intel-gfx] " Lucas De Marchi
2019-11-01  0:37   ` Souza, Jose
2019-11-01  0:37     ` [Intel-gfx] " Souza, Jose
2019-10-30  1:24 ` [PATCH 4/5] drm/i915: avoid reading DP_TP_CTL twice Lucas De Marchi
2019-10-30  1:24   ` [Intel-gfx] " Lucas De Marchi
2019-11-01  0:39   ` Souza, Jose
2019-11-01  0:39     ` [Intel-gfx] " Souza, Jose
2019-10-30  1:24 ` [PATCH 5/5] drm/i915/tgl: Select master transcoder in DP MST Lucas De Marchi
2019-10-30  1:24   ` [Intel-gfx] " Lucas De Marchi
2019-10-30  3:24 ` ✗ Fi.CI.CHECKPATCH: warning for tgl: MST support Patchwork
2019-10-30  3:24   ` [Intel-gfx] " Patchwork
2019-10-30  3:27 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-10-30  3:27   ` [Intel-gfx] " Patchwork
2019-10-30  3:51 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-30  3:51   ` [Intel-gfx] " Patchwork
2019-10-31  8:00 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-31  8:00   ` [Intel-gfx] " Patchwork
2019-11-01  0:43 ` [PATCH 0/5] " Souza, Jose
2019-11-01  0:43   ` [Intel-gfx] " Souza, Jose

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