From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, nanley.g.chery@intel.com,
dhinakaran.pandiyan@intel.com
Subject: Re: [Intel-gfx] [PATCH v7 5/7] drm/i915: Extract framebufer CCS offset checks into a function
Date: Thu, 12 Dec 2019 08:00:58 -0800 [thread overview]
Message-ID: <20191212160058.GE21507@InViCtUs> (raw)
In-Reply-To: <20191126002635.5779-6-radhakrishna.sripada@intel.com>
On Mon, Nov 25, 2019 at 04:26:33PM -0800, Radhakrishna Sripada wrote:
> From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>
> intel_fill_fb_info() has grown quite large and wrapping the offset checks
> into a separate function makes the loop a bit easier to follow.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 69 ++++++++++++--------
> 1 file changed, 40 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1ef1988b9e12..6c4274c1564d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2742,6 +2742,43 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
> return stride > max_stride;
> }
>
> +static int
> +intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int x, int y)
> +{
> + struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> + int hsub = fb->format->hsub;
> + int vsub = fb->format->vsub;
> + int tile_width, tile_height;
> + int ccs_x, ccs_y;
> + int main_x, main_y;
> +
> + intel_tile_dims(fb, 1, &tile_width, &tile_height);
> +
> + tile_width *= hsub;
> + tile_height *= vsub;
> +
> + ccs_x = (x * hsub) % tile_width;
> + ccs_y = (y * vsub) % tile_height;
> + main_x = intel_fb->normal[0].x % tile_width;
> + main_y = intel_fb->normal[0].y % tile_height;
> +
> + /*
> + * CCS doesn't have its own x/y offset register, so the intra CCS tile
> + * x/y offsets must match between CCS and the main surface.
> + */
> + if (main_x != ccs_x || main_y != ccs_y) {
> + DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> + main_x, main_y,
> + ccs_x, ccs_y,
> + intel_fb->normal[0].x,
> + intel_fb->normal[0].y,
> + x, y);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static int
> intel_fill_fb_info(struct drm_i915_private *dev_priv,
> struct drm_framebuffer *fb)
> @@ -2773,35 +2810,9 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv,
> }
>
> if (is_ccs_modifier(fb->modifier) && i == 1) {
> - int hsub = fb->format->hsub;
> - int vsub = fb->format->vsub;
> - int tile_width, tile_height;
> - int main_x, main_y;
> - int ccs_x, ccs_y;
> -
> - intel_tile_dims(fb, i, &tile_width, &tile_height);
> -
> - tile_width *= hsub;
> - tile_height *= vsub;
> -
> - ccs_x = (x * hsub) % tile_width;
> - ccs_y = (y * vsub) % tile_height;
> - main_x = intel_fb->normal[0].x % tile_width;
> - main_y = intel_fb->normal[0].y % tile_height;
> -
> - /*
> - * CCS doesn't have its own x/y offset register, so the intra CCS tile
> - * x/y offsets must match between CCS and the main surface.
> - */
> - if (main_x != ccs_x || main_y != ccs_y) {
> - DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> - main_x, main_y,
> - ccs_x, ccs_y,
> - intel_fb->normal[0].x,
> - intel_fb->normal[0].y,
> - x, y);
> - return -EINVAL;
> - }
> + ret = intel_fb_check_ccs_xy(fb, x, y);
> + if (ret)
> + return ret;
> }
>
> /*
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2019-12-12 16:00 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-26 0:26 [PATCH v7 0/7] Clear Color Support for TGL Render Decompression Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 1/7] drm/framebuffer: Format modifier for Intel Gen-12 render compression Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-12-12 15:49 ` Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 2/7] drm/i915: Use intel_tile_height() instead of re-implementing Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-12-12 15:51 ` Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 3/7] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-12-12 15:53 ` Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 4/7] drm/i915/tgl: Gen-12 render decompression Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-12-12 15:59 ` Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 5/7] drm/i915: Extract framebufer CCS offset checks into a function Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-12-12 16:00 ` Radhakrishna Sripada [this message]
2019-11-26 0:26 ` [PATCH v7 6/7] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-11-26 0:26 ` [PATCH v7 7/7] drm/i915/tgl: Add Clear Color support for TGL Render Decompression Radhakrishna Sripada
2019-11-26 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-11-26 20:48 ` Matt Roper
2019-11-26 20:48 ` [Intel-gfx] " Matt Roper
2019-11-26 21:52 ` Sripada, Radhakrishna
2019-11-26 21:52 ` [Intel-gfx] " Sripada, Radhakrishna
2019-11-26 22:00 ` Matt Roper
2019-11-26 22:00 ` [Intel-gfx] " Matt Roper
2019-11-26 22:29 ` Sripada, Radhakrishna
2019-11-26 22:29 ` [Intel-gfx] " Sripada, Radhakrishna
2019-11-27 6:49 ` Saarinen, Jani
2019-11-27 6:49 ` [Intel-gfx] " Saarinen, Jani
2019-11-27 0:26 ` [PATCH v8 " Radhakrishna Sripada
2019-11-27 0:26 ` [Intel-gfx] " Radhakrishna Sripada
2019-11-26 0:34 ` ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev10) Patchwork
2019-11-26 0:34 ` [Intel-gfx] " Patchwork
2019-11-26 0:57 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-26 0:57 ` [Intel-gfx] " Patchwork
2019-11-27 2:39 ` ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev11) Patchwork
2019-11-27 2:39 ` [Intel-gfx] " Patchwork
2019-11-27 3:03 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-27 3:03 ` [Intel-gfx] " Patchwork
2019-11-27 13:55 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-11-27 13:55 ` [Intel-gfx] " Patchwork
2019-12-03 21:35 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev12) Patchwork
2019-12-03 21:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
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