From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC 6/6] drm/i915: Enable 3 display pipes support
Date: Thu, 23 Jan 2020 15:53:27 +0200 [thread overview]
Message-ID: <20200123135327.GP13686@intel.com> (raw)
In-Reply-To: <20200123132659.725-7-anshuman.gupta@intel.com>
On Thu, Jan 23, 2020 at 06:56:59PM +0530, Anshuman Gupta wrote:
> Allow 3-display pipes SKU system with any combination
> in INTEL_INFO pipe mask.
> B.Spec:50075
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/intel_device_info.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index fcdacd6d4aa5..459047c98e82 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -997,10 +997,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>
> /*
> * At least one pipe should be enabled and if there are
> - * disabled pipes, they should be the last ones, with no holes
> - * in the mask.
> + * disabled pipes, up to Display Gen<=12, they should be the
> + * last ones, with no holses in the mask.
> */
> - if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
> + if (enabled_mask == 0 || (!is_power_of_2(enabled_mask + 1) &&
> + (INTEL_GEN(dev_priv) <= 11 || IS_TIGERLAKE(dev_priv))))
intel_pipe_mask_is_valid() or something to avoid this horror show
in the if condition.
> drm_err(&dev_priv->drm,
> "invalid pipe fuse configuration: enabled_mask=0x%x\n",
> enabled_mask);
> --
> 2.24.0
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-01-23 13:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-23 13:26 [Intel-gfx] [RFC 0/6] 3 display pipes combination system support Anshuman Gupta
2020-01-23 13:26 ` [Intel-gfx] [RFC 1/6] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta
2020-01-23 13:48 ` Jani Nikula
2020-01-24 11:59 ` Anshuman Gupta
2020-01-24 12:15 ` Jani Nikula
2020-01-24 12:19 ` Anshuman Gupta
2020-01-24 13:34 ` Jani Nikula
2020-01-23 13:26 ` [Intel-gfx] [RFC 2/6] drm/i915: Remove (pipe == crtc->index) asummption Anshuman Gupta
2020-01-23 13:40 ` Ville Syrjälä
2020-01-30 12:02 ` Anshuman Gupta
2020-01-30 13:35 ` Ville Syrjälä
2020-01-30 15:27 ` Ville Syrjälä
2020-01-23 13:49 ` Jani Nikula
2020-01-23 13:26 ` [Intel-gfx] [RFC 3/6] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
2020-01-23 13:47 ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 4/6] drm/i915: Get right max plane stride Anshuman Gupta
2020-01-23 13:50 ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 5/6] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
2020-01-23 13:52 ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 6/6] drm/i915: Enable 3 display pipes support Anshuman Gupta
2020-01-23 13:53 ` Ville Syrjälä [this message]
2020-01-23 21:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support Patchwork
2020-01-23 22:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-25 13:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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