Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC 1/6] drm/i915: Iterate over pipe and skip the disabled one
Date: Fri, 24 Jan 2020 14:15:30 +0200	[thread overview]
Message-ID: <87pnf9gie5.fsf@intel.com> (raw)
In-Reply-To: <20200124115951.GC24118@intel.com>

On Fri, 24 Jan 2020, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> On 2020-01-23 at 15:48:05 +0200, Jani Nikula wrote:
>> On Thu, 23 Jan 2020, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
>> > It should not be assumed that a disabled display pipe will be
>> > always last the pipe.
>> > for_each_pipe() should iterate over I915_MAX_PIPES and check
>> > for the disabled pipe and skip that pipe so that it should not
>> > initialize the intel crtc for any disabled pipes.
>> >
>> > Few compilation error needed to handle accordingly due to
>> > change in for_each_pipe() macro.
>> 
>> Really? Please paste.
> It is dangling-else warning at couple of places.
> drivers/gpu/drm/i915/i915_irq.c:1861:5: error: suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]
>  1861 |  if (pch_iir & SDE_FDI_MASK)
> drivers/gpu/drm/i915/i915_irq.c:1944:5: error: suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]
> 1944 |  if (pch_iir & SDE_FDI_MASK_CPT)

Right, I suppose this is caused by the nesting of the for loops with
if-else.

Perhaps the right course of action is to *not* reuse for_each_pipe() in
for_each_pipe_masked(). Just combine the conditions into one.

BR,
Jani.



>> 
>> >
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_display.h | 5 +++--
>> >  drivers/gpu/drm/i915/i915_irq.c              | 6 ++++--
>> >  2 files changed, 7 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
>> > index 028aab728514..47813a50add4 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_display.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> > @@ -312,10 +312,11 @@ enum phy_fia {
>> >  };
>> >  
>> >  #define for_each_pipe(__dev_priv, __p) \
>> > -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
>> > +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
>> 
>> Originally I was envisioning using for_each_set_bit() from bitops.h for
>> this. It's probably more efficient, however I'm not sure if efficiency
>> matters much here. The ugly part is that for_each_set_bit() requires an
>> explicit cast to unsigned long *.
>> 
>> Perhaps this is just as well, it's not wrong, and can always be updated
>> later.
>> 
>> > +		for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p))
>> >  
>> >  #define for_each_pipe_masked(__dev_priv, __p, __mask) \
>> > -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
>> > +	for_each_pipe(__dev_priv, __p) \
>> >  		for_each_if((__mask) & BIT(__p))
>> >  
>> >  #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
>> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> > index 94cb25ac504d..22ecd5bc407e 100644
>> > --- a/drivers/gpu/drm/i915/i915_irq.c
>> > +++ b/drivers/gpu/drm/i915/i915_irq.c
>> > @@ -1735,11 +1735,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>> >  	if (pch_iir & SDE_POISON)
>> >  		DRM_ERROR("PCH poison interrupt\n");
>> >  
>> > -	if (pch_iir & SDE_FDI_MASK)
>> > +	if (pch_iir & SDE_FDI_MASK) {
>> >  		for_each_pipe(dev_priv, pipe)
>> >  			DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",
>> >  					 pipe_name(pipe),
>> >  					 I915_READ(FDI_RX_IIR(pipe)));
>> > +	}
>> 
>> Are the brace changes really needed? This is what the for_each_if hack
>> is supposed to tackle.
> IMHO it was dangling-else compilation, warning that requires braces.
> please correct me if i am wrong.
> Thanks,
> Anshuman
>> 
>> >  
>> >  	if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE))
>> >  		DRM_DEBUG_DRIVER("PCH transcoder CRC done interrupt\n");
>> > @@ -1818,11 +1819,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>> >  	if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
>> >  		DRM_DEBUG_DRIVER("Audio CP change interrupt\n");
>> >  
>> > -	if (pch_iir & SDE_FDI_MASK_CPT)
>> > +	if (pch_iir & SDE_FDI_MASK_CPT) {
>> >  		for_each_pipe(dev_priv, pipe)
>> >  			DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",
>> >  					 pipe_name(pipe),
>> >  					 I915_READ(FDI_RX_IIR(pipe)));
>> > +	}
>> >  
>> >  	if (pch_iir & SDE_ERROR_CPT)
>> >  		cpt_serr_int_handler(dev_priv);
>> 
>> -- 
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-01-24 12:14 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-23 13:26 [Intel-gfx] [RFC 0/6] 3 display pipes combination system support Anshuman Gupta
2020-01-23 13:26 ` [Intel-gfx] [RFC 1/6] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta
2020-01-23 13:48   ` Jani Nikula
2020-01-24 11:59     ` Anshuman Gupta
2020-01-24 12:15       ` Jani Nikula [this message]
2020-01-24 12:19         ` Anshuman Gupta
2020-01-24 13:34           ` Jani Nikula
2020-01-23 13:26 ` [Intel-gfx] [RFC 2/6] drm/i915: Remove (pipe == crtc->index) asummption Anshuman Gupta
2020-01-23 13:40   ` Ville Syrjälä
2020-01-30 12:02     ` Anshuman Gupta
2020-01-30 13:35       ` Ville Syrjälä
2020-01-30 15:27         ` Ville Syrjälä
2020-01-23 13:49   ` Jani Nikula
2020-01-23 13:26 ` [Intel-gfx] [RFC 3/6] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
2020-01-23 13:47   ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 4/6] drm/i915: Get right max plane stride Anshuman Gupta
2020-01-23 13:50   ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 5/6] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
2020-01-23 13:52   ` Ville Syrjälä
2020-01-23 13:26 ` [Intel-gfx] [RFC 6/6] drm/i915: Enable 3 display pipes support Anshuman Gupta
2020-01-23 13:53   ` Ville Syrjälä
2020-01-23 21:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support Patchwork
2020-01-23 22:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-25 13:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87pnf9gie5.fsf@intel.com \
    --to=jani.nikula@intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox