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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/4] drm/i915: Nuke the magic FBC_CONTROL save/restore
Date: Tue,  8 Sep 2020 17:02:08 +0300	[thread overview]
Message-ID: <20200908140210.31048-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200908140210.31048-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The FBC_CONTROL save restore is there just to preserve the
compression interval setting. Since commit a68ce21ba0c4
("drm/i915/fbc: Store the fbc1 compression interval in the params")
we've been explicitly setting the interval to a specific
value, so the sace/restore is now entirely pointless.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h     | 1 -
 drivers/gpu/drm/i915/i915_suspend.c | 8 --------
 2 files changed, 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2e4438e8e3eb..3917bb1a6157 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -537,7 +537,6 @@ struct intel_gmbus {
 
 struct i915_suspend_saved_registers {
 	u32 saveDSPARB;
-	u32 saveFBC_CONTROL;
 	u32 saveCACHE_MODE_0;
 	u32 saveMI_ARB_STATE;
 	u32 saveSWF0[16];
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index ed2be3489f8e..592c230e6914 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -37,10 +37,6 @@ static void i915_save_display(struct drm_i915_private *dev_priv)
 	/* Display arbitration control */
 	if (INTEL_GEN(dev_priv) <= 4)
 		dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
-
-	/* save FBC interval */
-	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
-		dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
 }
 
 static void i915_restore_display(struct drm_i915_private *dev_priv)
@@ -52,10 +48,6 @@ static void i915_restore_display(struct drm_i915_private *dev_priv)
 	/* only restore FBC info on the platform that supports FBC*/
 	intel_fbc_global_disable(dev_priv);
 
-	/* restore FBC interval */
-	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
-		I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
-
 	intel_vga_redisable(dev_priv);
 }
 
-- 
2.26.2

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  reply	other threads:[~2020-09-08 14:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-08 14:02 [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Ville Syrjala
2020-09-08 14:02 ` Ville Syrjala [this message]
2020-09-11 16:47   ` [Intel-gfx] [PATCH 2/4] drm/i915: Nuke the magic FBC_CONTROL save/restore Jani Nikula
2020-09-08 14:02 ` [Intel-gfx] [PATCH 3/4] drm/i915: Nuke MI_ARB_STATE save/restore Ville Syrjala
2020-09-11 16:48   ` Jani Nikula
2020-09-08 14:02 ` [Intel-gfx] [PATCH 4/4] drm/i915: Nuke CACHE_MODE_0 save/restore Ville Syrjala
2020-09-11 16:50   ` Jani Nikula
2020-09-08 14:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Patchwork
2020-09-10 12:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2) Patchwork
2020-09-10 14:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-11 16:41 ` [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Jani Nikula

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