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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Nuke CACHE_MODE_0 save/restore
Date: Tue,  8 Sep 2020 17:02:10 +0300	[thread overview]
Message-ID: <20200908140210.31048-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200908140210.31048-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The CACHE_MODE_0 save/restore was added without explanation in
commit 1f84e550a870 ("drm/i915 more registers for S3 (DSPCLK_GATE_D,
CACHE_MODE_0, MI_ARB_STATE)"). If there are any bits we care about
those should be set explicitly during some appropriate init function.
Let's assume it's all good and just nuke this magic save/restore.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h     | 1 -
 drivers/gpu/drm/i915/i915_suspend.c | 9 ---------
 2 files changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cf51246b5402..537c780af858 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -537,7 +537,6 @@ struct intel_gmbus {
 
 struct i915_suspend_saved_registers {
 	u32 saveDSPARB;
-	u32 saveCACHE_MODE_0;
 	u32 saveSWF0[16];
 	u32 saveSWF1[16];
 	u32 saveSWF3[3];
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 34c7d7bccec5..932c7df64dd3 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -62,10 +62,6 @@ int i915_save_state(struct drm_i915_private *dev_priv)
 		pci_read_config_word(pdev, GCDGMBUS,
 				     &dev_priv->regfile.saveGCDGMBUS);
 
-	/* Cache mode state */
-	if (INTEL_GEN(dev_priv) < 7)
-		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
-
 	/* Scratch space */
 	if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
 		for (i = 0; i < 7; i++) {
@@ -99,11 +95,6 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
 				      dev_priv->regfile.saveGCDGMBUS);
 	i915_restore_display(dev_priv);
 
-	/* Cache mode state */
-	if (INTEL_GEN(dev_priv) < 7)
-		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
-			   0xffff0000);
-
 	/* Scratch space */
 	if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {
 		for (i = 0; i < 7; i++) {
-- 
2.26.2

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  parent reply	other threads:[~2020-09-08 14:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-08 14:02 [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Ville Syrjala
2020-09-08 14:02 ` [Intel-gfx] [PATCH 2/4] drm/i915: Nuke the magic FBC_CONTROL save/restore Ville Syrjala
2020-09-11 16:47   ` Jani Nikula
2020-09-08 14:02 ` [Intel-gfx] [PATCH 3/4] drm/i915: Nuke MI_ARB_STATE save/restore Ville Syrjala
2020-09-11 16:48   ` Jani Nikula
2020-09-08 14:02 ` Ville Syrjala [this message]
2020-09-11 16:50   ` [Intel-gfx] [PATCH 4/4] drm/i915: Nuke CACHE_MODE_0 save/restore Jani Nikula
2020-09-08 14:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Patchwork
2020-09-10 12:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2) Patchwork
2020-09-10 14:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-11 16:41 ` [Intel-gfx] [PATCH 1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG Jani Nikula

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