Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
Date: Thu, 24 Sep 2020 13:50:32 +0300	[thread overview]
Message-ID: <20200924105032.GH6112@intel.com> (raw)
In-Reply-To: <e05b558822374fb782e5cfa4601974d4@intel.com>

On Thu, Sep 24, 2020 at 12:49:13AM +0000, Srivatsa, Anusha wrote:
> 
> 
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, July 16, 2020 10:21 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Sort the SKL PCI IDs numerically. Some order seems better than
> > randomness.
> 
> There are 2 patches - patch 2 and 3 in the series that are reclassifying some PCI IDs  and there is patch 4 that adds a missing ID. All of those with this patch can be combined to a single patch OR patch 2, 3 and 4 can be squashed as one solitary patch.

The original patch from Alexei was a single patch. I split it up for
a reason; easier to revert things if/when necessary, and it's also
easier to review.

If your commit message is of the form "do A and B" it's generally
a good indication that it should be split into two patches.

> 
> Anusha 
> > Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  include/drm/i915_pciids.h | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> > 4870c3c9f9b2..5185ac789038 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -340,8 +340,8 @@
> >  	INTEL_SKL_ULT_GT1_IDS(info), \
> >  	INTEL_SKL_ULX_GT1_IDS(info), \
> >  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> > -	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> >  	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> > +	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> >  	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> > 
> >  #define INTEL_SKL_ULT_GT2_IDS(info) \
> > @@ -355,8 +355,8 @@
> >  	INTEL_SKL_ULT_GT2_IDS(info), \
> >  	INTEL_SKL_ULX_GT2_IDS(info), \
> >  	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
> > -	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
> > +	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
> > 
> >  #define INTEL_SKL_ULT_GT3_IDS(info) \
> > @@ -372,9 +372,9 @@
> > 
> >  #define INTEL_SKL_GT4_IDS(info) \
> >  	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
> > +	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
> >  	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
> > -	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
> > -	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
> > +	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
> > 
> >  #define INTEL_SKL_IDS(info)	 \
> >  	INTEL_SKL_GT1_IDS(info), \
> > --
> > 2.26.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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