From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v7 09/10] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks
Date: Tue, 6 Oct 2020 18:36:53 +0530 [thread overview]
Message-ID: <20201006130654.331-10-uma.shankar@intel.com> (raw)
In-Reply-To: <20201006130654.331-1-uma.shankar@intel.com>
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes.
Check for that when using LSPCON.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index cd7030e05a70..867685e72d25 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3943,6 +3943,7 @@ static void intel_enable_ddi_dp(struct intel_atomic_state *state,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
enum port port = encoder->port;
if (port == PORT_A && INTEL_GEN(dev_priv) < 9)
@@ -3950,7 +3951,14 @@ static void intel_enable_ddi_dp(struct intel_atomic_state *state,
intel_edp_backlight_on(crtc_state, conn_state);
intel_psr_enable(intel_dp, crtc_state, conn_state);
- intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
+
+ if (dig_port->lspcon.active) {
+ if (dig_port->dp.has_hdmi_sink)
+ intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
+ } else {
+ intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
+ }
+
intel_edp_drrs_enable(intel_dp, crtc_state);
if (crtc_state->has_audio)
--
2.26.2
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next prev parent reply other threads:[~2020-10-06 12:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-06 13:06 [Intel-gfx] [v7 00/10] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-10-08 10:54 ` Ville Syrjälä
2020-10-08 11:29 ` Shankar, Uma
2020-10-06 13:06 ` [Intel-gfx] [v7 02/10] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 03/10] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 04/10] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-10-08 11:18 ` Ville Syrjälä
2020-10-06 13:06 ` [Intel-gfx] [v7 05/10] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 06/10] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 07/10] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 08/10] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-10-06 13:06 ` Uma Shankar [this message]
2020-10-06 13:06 ` [Intel-gfx] [v7 10/10] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-10-06 15:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev7) Patchwork
2020-10-06 15:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-06 19:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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