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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v7 03/10] drm/i915/display: Attach HDR property for capable Gen9 devices
Date: Tue,  6 Oct 2020 18:36:47 +0530	[thread overview]
Message-ID: <20201006130654.331-4-uma.shankar@intel.com> (raw)
In-Reply-To: <20201006130654.331-1-uma.shankar@intel.com>

Attach HDR property for Gen9 devices with MCA LSPCON
chips.

v2: Cleaned HDR property attachment logic based on capability
as per Jani Nikula's suggestion.

v3: Fixed the HDR property attachment logic as per the new changes
by Kai-Feng to align with lspcon detection failure on some devices.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c    | 20 +++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_lspcon.c |  6 +++++-
 drivers/gpu/drm/i915/display/intel_lspcon.h |  1 +
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index b4c520348b3b..5ad92e9861af 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5111,7 +5111,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 {
 	struct intel_digital_port *dig_port;
 	struct intel_encoder *encoder;
-	bool init_hdmi, init_dp;
+	bool init_hdmi, init_dp, init_lspcon = false;
 	enum phy phy = intel_port_to_phy(dev_priv, port);
 
 	/*
@@ -5137,6 +5137,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 		 * is initialized before lspcon.
 		 */
 		init_dp = true;
+		init_lspcon = true;
 		init_hdmi = false;
 		drm_dbg_kms(&dev_priv->drm, "VBT says port %c has lspcon\n",
 			    port_name(port));
@@ -5256,6 +5257,23 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 
 	intel_infoframe_init(dig_port);
 
+	if (init_lspcon) {
+		if (lspcon_init(dig_port))
+			/* TODO: handle hdmi info frame part */
+			drm_dbg_kms(&dev_priv->drm,
+				    "LSPCON init success on port %c\n",
+				    port_name(port));
+		else
+			/*
+			 * LSPCON init failed at driver load, this will be re-attempted
+			 * after hotplug.
+			 * Note: There is an issue on some LSPCON configurations which
+			 * triggered the need for this WA.
+			 */
+			drm_dbg_kms(&dev_priv->drm, "LSPCON init failed at driver load on port %c\n",
+				    port_name(port));
+	}
+
 	return;
 
 err:
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 04951cec9625..440d2b3c2212 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -563,7 +563,7 @@ void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
 }
 
-static bool lspcon_init(struct intel_digital_port *dig_port)
+bool lspcon_init(struct intel_digital_port *dig_port)
 {
 	struct intel_dp *dp = &dig_port->dp;
 	struct intel_lspcon *lspcon = &dig_port->lspcon;
@@ -588,6 +588,10 @@ static bool lspcon_init(struct intel_digital_port *dig_port)
 	}
 
 	lspcon_detect_hdr_capability(lspcon);
+	if (lspcon->hdr_supported)
+		drm_object_attach_property(&connector->base,
+					   connector->dev->mode_config.hdr_output_metadata_property,
+					   0);
 
 	connector->ycbcr_420_allowed = true;
 	lspcon->active = true;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 00722f8aec1a..9505e234e2fd 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -15,6 +15,7 @@ struct intel_digital_port;
 struct intel_encoder;
 struct intel_lspcon;
 
+bool lspcon_init(struct intel_digital_port *dig_port);
 void lspcon_resume(struct intel_digital_port *dig_port);
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
 void lspcon_write_infoframe(struct intel_encoder *encoder,
-- 
2.26.2

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  parent reply	other threads:[~2020-10-06 12:33 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-06 13:06 [Intel-gfx] [v7 00/10] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 01/10] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-10-08 10:54   ` Ville Syrjälä
2020-10-08 11:29     ` Shankar, Uma
2020-10-06 13:06 ` [Intel-gfx] [v7 02/10] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-10-06 13:06 ` Uma Shankar [this message]
2020-10-06 13:06 ` [Intel-gfx] [v7 04/10] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-10-08 11:18   ` Ville Syrjälä
2020-10-06 13:06 ` [Intel-gfx] [v7 05/10] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 06/10] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 07/10] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 08/10] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 09/10] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-10-06 13:06 ` [Intel-gfx] [v7 10/10] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-10-06 15:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev7) Patchwork
2020-10-06 15:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-06 19:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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