[Intel-gfx] [PATCH 1/7] drm/i915: Drop one more usless master_transcoder assignment

[Intel-gfx] [PATCH 1/7] drm/i915: Drop one more usless master_transcoder assignment

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We dropped the other redundant master_transcoder assignments
earlier, but this one slipped through. Get rid of it as well.
The crtc state gets fully reset before readout so there is
no point in doing this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 24d85b2689d5..30303088a344 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11250,8 +11250,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
 	bool active;
 	u32 tmp;
 
-	pipe_config->master_transcoder = INVALID_TRANSCODER;
-
 	power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
 	wf = intel_display_power_get_if_enabled(dev_priv, power_domain);
 	if (!wf)
-- 
2.26.2

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[Intel-gfx] [PATCH 2/7] drm/i915: Introduce with_intel_display_power_if_enabled()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add the _if_enabled() counterpart to with_intel_display_power().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 4aa0a09cf14f..4f48855a7c42 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -327,6 +327,10 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
 	for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
 	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
 
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
+
 void chv_phy_powergate_lanes(struct intel_encoder *encoder,
 			     bool override, unsigned int mask);
 bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
-- 
2.26.2

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[Intel-gfx] [PATCH 3/7] drm/i915: Adjust intel_dsc_power_domain() calling convention

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pass the crtc+cpu_transcoder rather than the crtc state to
intel_dsc_power_domain(). This should allow us to reuse it
during readout as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c    |  3 +-
 drivers/gpu/drm/i915/display/intel_ddi.c  |  3 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c | 54 +++++++++++------------
 drivers/gpu/drm/i915/display/intel_vdsc.h |  6 ++-
 4 files changed, 34 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 096652921453..462321ba5133 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1613,6 +1613,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
 					struct intel_crtc_state *crtc_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 
 	get_dsi_io_power_domains(i915,
@@ -1620,7 +1621,7 @@ static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
 
 	if (crtc_state->dsc.compression_enable)
 		intel_display_power_get(i915,
-					intel_dsc_power_domain(crtc_state));
+					intel_dsc_power_domain(crtc, crtc_state->cpu_transcoder));
 }
 
 static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bb0b9930958f..4407ddbca1ff 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2188,6 +2188,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
 static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
 					struct intel_crtc_state *crtc_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port;
 	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
@@ -2222,7 +2223,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
 	 */
 	if (crtc_state->dsc.compression_enable)
 		intel_display_power_get(dev_priv,
-					intel_dsc_power_domain(crtc_state));
+					intel_dsc_power_domain(crtc, crtc_state->cpu_transcoder));
 }
 
 void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index c5735c365659..156e1689066b 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -357,11 +357,10 @@ bool intel_dsc_source_support(struct intel_encoder *encoder,
 	return false;
 }
 
-static bool is_pipe_dsc(const struct intel_crtc_state *crtc_state)
+static bool is_pipe_dsc(struct intel_crtc *crtc,
+			enum transcoder cpu_transcoder)
 {
-	const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	const struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 
 	if (INTEL_GEN(i915) >= 12)
 		return true;
@@ -465,9 +464,8 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 }
 
 enum intel_display_power_domain
-intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
+intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 
@@ -484,7 +482,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
 	 */
 	if (INTEL_GEN(i915) >= 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A)
 		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
-	else if (is_pipe_dsc(crtc_state))
+	else if (is_pipe_dsc(crtc, cpu_transcoder))
 		return POWER_DOMAIN_PIPE(pipe);
 	else
 		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
@@ -517,7 +515,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	if (vdsc_cfg->vbr_enable)
 		pps_val |= DSC_VBR_ENABLE;
 	drm_info(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_0,
 			       pps_val);
 		/*
@@ -541,7 +539,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val = 0;
 	pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel);
 	drm_info(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_1,
 			       pps_val);
 		/*
@@ -566,7 +564,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
 		DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
 	drm_info(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_2,
 			       pps_val);
 		/*
@@ -591,7 +589,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |
 		DSC_SLICE_WIDTH(vdsc_cfg->slice_width);
 	drm_info(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_3,
 			       pps_val);
 		/*
@@ -616,7 +614,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |
 		DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay);
 	drm_info(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_4,
 			       pps_val);
 		/*
@@ -641,7 +639,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |
 		DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval);
 	drm_info(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_5,
 			       pps_val);
 		/*
@@ -668,7 +666,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 		DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) |
 		DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp);
 	drm_info(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_6,
 			       pps_val);
 		/*
@@ -693,7 +691,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |
 		DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset);
 	drm_info(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_7,
 			       pps_val);
 		/*
@@ -718,7 +716,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |
 		DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset);
 	drm_info(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_8,
 			       pps_val);
 		/*
@@ -743,7 +741,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	pps_val |= DSC_RC_MODEL_SIZE(DSC_RC_MODEL_SIZE_CONST) |
 		DSC_RC_EDGE_FACTOR(DSC_RC_EDGE_FACTOR_CONST);
 	drm_info(&dev_priv->drm, "PPS9 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_9,
 			       pps_val);
 		/*
@@ -770,7 +768,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 		DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) |
 		DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CONST);
 	drm_info(&dev_priv->drm, "PPS10 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_10,
 			       pps_val);
 		/*
@@ -798,7 +796,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 		DSC_SLICE_ROW_PER_FRAME(vdsc_cfg->pic_height /
 					vdsc_cfg->slice_height);
 	drm_info(&dev_priv->drm, "PPS16 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_16,
 			       pps_val);
 		/*
@@ -827,7 +825,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 		drm_info(&dev_priv->drm, " RC_BUF_THRESH%d = 0x%08x\n", i,
 			 rc_buf_thresh_dword[i / 4]);
 	}
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0,
 			       rc_buf_thresh_dword[0]);
 		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0_UDW,
@@ -884,7 +882,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 		drm_info(&dev_priv->drm, " RC_RANGE_PARAM_%d = 0x%08x\n", i,
 			 rc_range_params_dword[i / 2]);
 	}
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0,
 			       rc_range_params_dword[0]);
 		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0_UDW,
@@ -987,13 +985,13 @@ void intel_dsc_get_config(struct intel_encoder *encoder,
 	if (!intel_dsc_source_support(encoder, crtc_state))
 		return;
 
-	power_domain = intel_dsc_power_domain(crtc_state);
+	power_domain = intel_dsc_power_domain(crtc, crtc_state->cpu_transcoder);
 
 	wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
 	if (!wakeref)
 		return;
 
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		dss_ctl1 = intel_de_read(dev_priv, DSS_CTL1);
 		dss_ctl2 = intel_de_read(dev_priv, DSS_CTL2);
 	} else {
@@ -1011,7 +1009,7 @@ void intel_dsc_get_config(struct intel_encoder *encoder,
 	/* FIXME: add more state readout as needed */
 
 	/* PPS1 */
-	if (!is_pipe_dsc(crtc_state))
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder))
 		val = intel_de_read(dev_priv, DSCA_PICTURE_PARAMETER_SET_1);
 	else
 		val = intel_de_read(dev_priv,
@@ -1075,7 +1073,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 
 	/* Enable Power wells for VDSC/joining */
 	intel_display_power_get(dev_priv,
-				intel_dsc_power_domain(crtc_state));
+				intel_dsc_power_domain(crtc, crtc_state->cpu_transcoder));
 
 	intel_dsc_pps_configure(encoder, crtc_state);
 
@@ -1084,7 +1082,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 	else
 		intel_dsc_dp_pps_write(encoder, crtc_state);
 
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, crtc_state->cpu_transcoder)) {
 		dss_ctl1_reg = DSS_CTL1;
 		dss_ctl2_reg = DSS_CTL2;
 	} else {
@@ -1111,7 +1109,7 @@ void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
 	if (!old_crtc_state->dsc.compression_enable)
 		return;
 
-	if (!is_pipe_dsc(old_crtc_state)) {
+	if (!is_pipe_dsc(crtc, old_crtc_state->cpu_transcoder)) {
 		dss_ctl1_reg = DSS_CTL1;
 		dss_ctl2_reg = DSS_CTL2;
 	} else {
@@ -1132,5 +1130,5 @@ void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
 
 	/* Disable Power wells for VDSC/joining */
 	intel_display_power_put_unchecked(dev_priv,
-					  intel_dsc_power_domain(old_crtc_state));
+					  intel_dsc_power_domain(crtc, old_crtc_state->cpu_transcoder));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index e56a3254c214..acf1ce9c4a6e 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -8,8 +8,10 @@
 
 #include <linux/types.h>
 
-struct intel_encoder;
+enum transcoder;
+struct intel_crtc;
 struct intel_crtc_state;
+struct intel_encoder;
 
 bool intel_dsc_source_support(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *crtc_state);
@@ -21,6 +23,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 void intel_dsc_get_config(struct intel_encoder *encoder,
 			  struct intel_crtc_state *crtc_state);
 enum intel_display_power_domain
-intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
+intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
 
 #endif /* __INTEL_VDSC_H__ */
-- 
2.26.2

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[Intel-gfx] [PATCH 4/7] drm/i915: Extract hsw_panel_transcoders()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the "panel transcoder" bitmask into a helper. We'll
have a couple of uses for this later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 30303088a344..2426a452b3bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11032,6 +11032,16 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 	pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
 }
 
+static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
+{
+	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
+
+	if (INTEL_GEN(i915) >= 11)
+		panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+
+	return panel_transcoder_mask;
+}
+
 static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 				     struct intel_crtc_state *pipe_config,
 				     u64 *power_domain_mask,
@@ -11040,16 +11050,12 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum intel_display_power_domain power_domain;
-	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
+	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
 	unsigned long enabled_panel_transcoders = 0;
 	enum transcoder panel_transcoder;
 	intel_wakeref_t wf;
 	u32 tmp;
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		panel_transcoder_mask |=
-			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
-
 	/*
 	 * The pipe->transcoder mapping is fixed with the exception of the eDP
 	 * and DSI transcoders handled below.
-- 
2.26.2

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[Intel-gfx] [PATCH 5/7] drm/i915: Pimp HSW+ transcoder state readout

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Adjust the HSW+ transcoder state readout to just read through
all the possible transcoders for the pipe, and stuff the results
in a bitmask.

We can conveniently cross check the bitmask for invalid
combinations of enabled transcoders, and later we can easily
extend the bitmask readout to handle the bigjoiner case.

One slight change in behaviour is that we no longer read out
the AONOFF->force_pfit.pfit bit for all the enabled "panel
transcoders". But having more than one enabled would anyway
be illegal so no big loss. Also the AONOFF selection should
only ever be used on HSW, which only has the EDP transcoder
an no DSI transcoders.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 138 ++++++++++++++-----
 1 file changed, 100 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2426a452b3bb..56fd5e8ca551 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11032,6 +11032,21 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 	pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
 }
 
+static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
+					   enum transcoder cpu_transcoder)
+{
+	enum intel_display_power_domain power_domain;
+	intel_wakeref_t wakeref;
+	u32 tmp = 0;
+
+	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
+
+	with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+
+	return tmp & TRANS_DDI_FUNC_ENABLE;
+}
+
 static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 {
 	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
@@ -11042,58 +11057,39 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 	return panel_transcoder_mask;
 }
 
-static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
-				     struct intel_crtc_state *pipe_config,
-				     u64 *power_domain_mask,
-				     intel_wakeref_t *wakerefs)
+static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 {
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	enum intel_display_power_domain power_domain;
 	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
-	unsigned long enabled_panel_transcoders = 0;
-	enum transcoder panel_transcoder;
-	intel_wakeref_t wf;
-	u32 tmp;
-
-	/*
-	 * The pipe->transcoder mapping is fixed with the exception of the eDP
-	 * and DSI transcoders handled below.
-	 */
-	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
+	enum transcoder cpu_transcoder;
+	u8 enabled_transcoders = 0;
 
 	/*
 	 * XXX: Do intel_display_power_get_if_enabled before reading this (for
 	 * consistency and less surprising code; it's in always on power).
 	 */
-	for_each_cpu_transcoder_masked(dev_priv, panel_transcoder,
+	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder,
 				       panel_transcoder_mask) {
-		bool force_thru = false;
+		enum intel_display_power_domain power_domain;
+		intel_wakeref_t wakeref;
 		enum pipe trans_pipe;
+		u32 tmp = 0;
+
+		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
+		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+			tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
 
-		tmp = intel_de_read(dev_priv,
-				    TRANS_DDI_FUNC_CTL(panel_transcoder));
 		if (!(tmp & TRANS_DDI_FUNC_ENABLE))
 			continue;
 
-		/*
-		 * Log all enabled ones, only use the first one.
-		 *
-		 * FIXME: This won't work for two separate DSI displays.
-		 */
-		enabled_panel_transcoders |= BIT(panel_transcoder);
-		if (enabled_panel_transcoders != BIT(panel_transcoder))
-			continue;
-
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
 			drm_WARN(dev, 1,
 				 "unknown pipe linked to transcoder %s\n",
-				 transcoder_name(panel_transcoder));
+				 transcoder_name(cpu_transcoder));
 			fallthrough;
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
-			force_thru = true;
-			fallthrough;
 		case TRANS_DDI_EDP_INPUT_A_ON:
 			trans_pipe = PIPE_A;
 			break;
@@ -11108,17 +11104,76 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 			break;
 		}
 
-		if (trans_pipe == crtc->pipe) {
-			pipe_config->cpu_transcoder = panel_transcoder;
-			pipe_config->pch_pfit.force_thru = force_thru;
-		}
+		if (trans_pipe == crtc->pipe)
+			enabled_transcoders |= BIT(cpu_transcoder);
 	}
 
+	cpu_transcoder = (enum transcoder) crtc->pipe;
+	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
+		enabled_transcoders |= BIT(cpu_transcoder);
+
+	return enabled_transcoders;
+}
+
+static bool has_edp_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & BIT(TRANSCODER_EDP);
+}
+
+static bool has_dsi_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & (BIT(TRANSCODER_DSI_0) |
+				      BIT(TRANSCODER_DSI_1));
+}
+
+static bool has_pipe_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & ~(BIT(TRANSCODER_EDP) |
+				       BIT(TRANSCODER_DSI_0) |
+				       BIT(TRANSCODER_DSI_1));
+}
+
+static void assert_enabled_transcoders(struct drm_i915_private *i915,
+				       u8 enabled_transcoders)
+{
+	/* Only one type of transcoder please */
+	drm_WARN_ON(&i915->drm,
+		    has_edp_transcoders(enabled_transcoders) +
+		    has_dsi_transcoders(enabled_transcoders) +
+		    has_pipe_transcoders(enabled_transcoders) > 1);
+
+	/* Only DSI transcoders can be ganged */
+	drm_WARN_ON(&i915->drm,
+		    !has_dsi_transcoders(enabled_transcoders) &&
+		    !is_power_of_2(enabled_transcoders));
+}
+
+static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
+				     struct intel_crtc_state *pipe_config,
+				     u64 *power_domain_mask,
+				     intel_wakeref_t *wakerefs)
+{
+	struct drm_device *dev = crtc->base.dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	enum intel_display_power_domain power_domain;
+	unsigned long enabled_transcoders;
+	intel_wakeref_t wf;
+	u32 tmp;
+
+	enabled_transcoders = hsw_enabled_transcoders(crtc);
+	if (!enabled_transcoders)
+		return false;
+
+	assert_enabled_transcoders(dev_priv, enabled_transcoders);
+
 	/*
-	 * Valid combos: none, eDP, DSI0, DSI1, DSI0+DSI1
+	 * With the exception of DSI we should only ever have
+	 * a single enabled transcoder. With DSI let's just
+	 * pick the first one.
+	 *
+	 * FIXME: This won't work for two separate DSI displays.
 	 */
-	drm_WARN_ON(dev, (enabled_panel_transcoders & BIT(TRANSCODER_EDP)) &&
-		    enabled_panel_transcoders != BIT(TRANSCODER_EDP));
+	pipe_config->cpu_transcoder = ffs(enabled_transcoders) - 1;
 
 	power_domain = POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder);
 	drm_WARN_ON(dev, *power_domain_mask & BIT_ULL(power_domain));
@@ -11127,6 +11182,13 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	if (!wf)
 		return false;
 
+	if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) {
+		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
+
+		if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == TRANS_DDI_EDP_INPUT_A_ONOFF)
+			pipe_config->pch_pfit.force_thru = true;
+	}
+
 	wakerefs[power_domain] = wf;
 	*power_domain_mask |= BIT_ULL(power_domain);
 
-- 
2.26.2

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[Intel-gfx] [PATCH 6/7] drm/i915: cpu_transcoder readout for bigjoiner

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Read out cpu_transcoder correctly for the bigjoiner slave pipes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 53 ++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 56fd5e8ca551..d39725453876 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11032,6 +11032,16 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 	pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
 }
 
+static u8 bigjoiner_pipes(struct drm_i915_private *i915)
+{
+	if (INTEL_GEN(i915) >= 12)
+		return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
+	else if (INTEL_GEN(i915) >= 11)
+		return BIT(PIPE_B) | BIT(PIPE_C);
+	else
+		return 0;
+}
+
 static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
 					   enum transcoder cpu_transcoder)
 {
@@ -11047,6 +11057,41 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
 	return tmp & TRANS_DDI_FUNC_ENABLE;
 }
 
+static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
+{
+	u8 master_pipes = 0, slave_pipes = 0;
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc(&dev_priv->drm, crtc) {
+		enum intel_display_power_domain power_domain;
+		enum pipe pipe = crtc->pipe;
+		intel_wakeref_t wakeref;
+
+		if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
+			continue;
+
+		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
+		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
+			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
+
+			if (!(tmp & BIG_JOINER_ENABLE))
+				break;
+
+			if (tmp & MASTER_BIG_JOINER_ENABLE)
+				master_pipes |= BIT(pipe);
+			else
+				slave_pipes |= BIT(pipe);
+		}
+	}
+
+	/* Bigjoiner pipes should always be consecutive master and slave */
+	drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
+		 "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
+		 master_pipes, slave_pipes);
+
+	return slave_pipes;
+}
+
 static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 {
 	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
@@ -11108,10 +11153,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 			enabled_transcoders |= BIT(cpu_transcoder);
 	}
 
+	/* single pipe or bigjoiner master */
 	cpu_transcoder = (enum transcoder) crtc->pipe;
 	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
 		enabled_transcoders |= BIT(cpu_transcoder);
 
+	/* bigjoiner slave -> consider the master pipe's transcoder as well */
+	if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
+		cpu_transcoder = (enum transcoder) crtc->pipe - 1;
+		if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
+			enabled_transcoders |= BIT(cpu_transcoder);
+	}
+
 	return enabled_transcoders;
 }
 
-- 
2.26.2

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[Intel-gfx] [PATCH 7/7] drm/i915: FIXMEs for bigjoiner readout

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     |  7 +++++++
 drivers/gpu/drm/i915/display/intel_display.c | 14 ++++++++++++++
 2 files changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4407ddbca1ff..8540f10477b2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4602,6 +4602,13 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 	enum port port = encoder->port;
 	int ret;
 
+	/*
+	 * FIXME setup cpu_transcoder correctly for bigjoiner.
+	 * Not 100% sure we want to call this for both pipes, if
+	 * not we need to do the cpu_transcoder assignment properly
+	 * where we do the master->slave state copy. Which then has
+	 * be done after this guy has been called for the master.
+	 */
 	if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
 		pipe_config->cpu_transcoder = TRANSCODER_EDP;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d39725453876..c0114afa80d3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5855,6 +5855,12 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
 	int num_encoders = 0;
 	int i;
 
+	/* FIXME handle bigjoiner for hsw_crtc_compute_clock() */
+#if 0
+	if (bigjoiner_slave)
+		crtc = master;
+#endif
+
 	for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
 		if (connector_state->crtc != &crtc->base)
 			continue;
@@ -14516,6 +14522,7 @@ verify_crtc_state(struct intel_crtc *crtc,
 			"(expected %i, found %i)\n",
 			new_crtc_state->hw.active, crtc->active);
 
+	/* FIXME handle bigjoiner */
 	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
 		enum pipe pipe;
 		bool active;
@@ -18843,6 +18850,13 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 			encoder->get_config(encoder, crtc_state);
 			if (encoder->sync_state)
 				encoder->sync_state(encoder, crtc_state);
+
+			/* FIXME handle bigjoiner */
+			crtc = NULL;//bigjoiner_slave;
+			if (crtc) {
+				crtc_state = to_intel_crtc_state(crtc->base.state);
+				encoder->get_config(encoder, crtc_state);
+			}
 		} else {
 			encoder->base.crtc = NULL;
 		}
-- 
2.26.2

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment
URL   : https://patchwork.freedesktop.org/series/82848/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5e9c0a3f80bf drm/i915: Drop one more usless master_transcoder assignment
40e3f078c22a drm/i915: Introduce with_intel_display_power_if_enabled()
-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:330:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:330:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:330:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

total: 0 errors, 0 warnings, 3 checks, 10 lines checked
ba8826254488 drm/i915: Adjust intel_dsc_power_domain() calling convention
-:279: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#279: FILE: drivers/gpu/drm/i915/display/intel_vdsc.c:1133:
+					  intel_dsc_power_domain(crtc, old_crtc_state->cpu_transcoder));

total: 0 errors, 1 warnings, 0 checks, 245 lines checked
23aaa8770260 drm/i915: Extract hsw_panel_transcoders()
0de1b95e83f6 drm/i915: Pimp HSW+ transcoder state readout
-:135: CHECK:SPACING: No space is necessary after a cast
#135: FILE: drivers/gpu/drm/i915/display/intel_display.c:11111:
+	cpu_transcoder = (enum transcoder) crtc->pipe;

total: 0 errors, 0 warnings, 1 checks, 187 lines checked
d1ffd8987bbb drm/i915: cpu_transcoder readout for bigjoiner
-:51: CHECK:SPACING: No space is necessary after a cast
#51: FILE: drivers/gpu/drm/i915/display/intel_display.c:11073:
+		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);

-:87: CHECK:SPACING: No space is necessary after a cast
#87: FILE: drivers/gpu/drm/i915/display/intel_display.c:11163:
+		cpu_transcoder = (enum transcoder) crtc->pipe - 1;

total: 0 errors, 0 warnings, 2 checks, 75 lines checked
d1051eed84f3 drm/i915: FIXMEs for bigjoiner readout
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

-:38: WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#38: FILE: drivers/gpu/drm/i915/display/intel_display.c:5859:
+#if 0

total: 0 errors, 2 warnings, 0 checks, 45 lines checked


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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment

[Patchwork]

== Series Details ==

Series: series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment
URL   : https://patchwork.freedesktop.org/series/82848/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1312:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gvt/mmio.c:290:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1440:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1494:15: warning: memset with byte count of 16777216
+./include/linux/seqlock.h:752:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:778:16: warning: trying to copy expression type 31
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block


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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 6051 bytes --]

== Series Details ==

Series: series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment
URL   : https://patchwork.freedesktop.org/series/82848/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9165 -> Patchwork_18737
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18737:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s0:
    - {fi-ehl-1}:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-ehl-1/igt@gem_exec_suspend@basic-s0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-ehl-1/igt@gem_exec_suspend@basic-s0.html

  
Known issues
------------

  Here are the changes found in Patchwork_18737 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-icl-u2:          [PASS][3] -> [INCOMPLETE][4] ([i915#1090] / [i915#1185])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-icl-u2/igt@gem_exec_suspend@basic-s0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-icl-u2/igt@gem_exec_suspend@basic-s0.html
    - fi-icl-y:           [PASS][5] -> [INCOMPLETE][6] ([i915#1090] / [i915#1185])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-icl-y/igt@gem_exec_suspend@basic-s0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-icl-y/igt@gem_exec_suspend@basic-s0.html
    - fi-tgl-u2:          [PASS][7] -> [INCOMPLETE][8] ([i915#456])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-n3050:       [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - fi-bsw-kefka:       [PASS][11] -> [DMESG-WARN][12] ([i915#1982])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@vgem_basic@unload:
    - fi-skl-guc:         [PASS][13] -> [DMESG-WARN][14] ([i915#2203])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-skl-guc/igt@vgem_basic@unload.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-skl-guc/igt@vgem_basic@unload.html

  
#### Possible fixes ####

  * igt@gem_wait@wait@all:
    - fi-apl-guc:         [INCOMPLETE][15] ([i915#1635] / [i915#337]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-apl-guc/igt@gem_wait@wait@all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-apl-guc/igt@gem_wait@wait@all.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [DMESG-WARN][17] ([i915#1982]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_selftest@live@execlists:
    - fi-bxt-dsi:         [INCOMPLETE][19] ([i915#1635]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/fi-bxt-dsi/igt@i915_selftest@live@execlists.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1090]: https://gitlab.freedesktop.org/drm/intel/issues/1090
  [i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#337]: https://gitlab.freedesktop.org/drm/intel/issues/337
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456


Participating hosts (46 -> 40)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9165 -> Patchwork_18737

  CI-20190529: 20190529
  CI_DRM_9165: a0d0192328e9c2a8fb118a17caffd1cec6b44e9b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5822: b4bcf05cb9839037128905deda7146434155cc41 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18737: d1051eed84f35b52f81ed91dc8d69e1f07507ba1 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d1051eed84f3 drm/i915: FIXMEs for bigjoiner readout
d1ffd8987bbb drm/i915: cpu_transcoder readout for bigjoiner
0de1b95e83f6 drm/i915: Pimp HSW+ transcoder state readout
23aaa8770260 drm/i915: Extract hsw_panel_transcoders()
ba8826254488 drm/i915: Adjust intel_dsc_power_domain() calling convention
40e3f078c22a drm/i915: Introduce with_intel_display_power_if_enabled()
5e9c0a3f80bf drm/i915: Drop one more usless master_transcoder assignment

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/index.html

[-- Attachment #1.2: Type: text/html, Size: 7183 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

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Re: [Intel-gfx] [PATCH 1/7] drm/i915: Drop one more usless master_transcoder assignment

[Navare, Manasi]

On Tue, Oct 20, 2020 at 12:43:31AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>

 
> We dropped the other redundant master_transcoder assignments
> earlier, but this one slipped through. Get rid of it as well.
> The crtc state gets fully reset before readout so there is
> no point in doing this.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 24d85b2689d5..30303088a344 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11250,8 +11250,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
>  	bool active;
>  	u32 tmp;
>  
> -	pipe_config->master_transcoder = INVALID_TRANSCODER;
> -
>  	power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
>  	wf = intel_display_power_get_if_enabled(dev_priv, power_domain);
>  	if (!wf)
> -- 
> 2.26.2
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 30309 bytes --]

== Series Details ==

Series: series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment
URL   : https://patchwork.freedesktop.org/series/82848/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9165_full -> Patchwork_18737_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18737_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18737_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18737_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_whisper@basic-queues-priority-all:
    - shard-skl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl1/igt@gem_exec_whisper@basic-queues-priority-all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl1/igt@gem_exec_whisper@basic-queues-priority-all.html

  * igt@i915_module_load@reload:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb8/igt@i915_module_load@reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@i915_module_load@reload.html

  * igt@i915_module_load@reload-no-display:
    - shard-iclb:         [PASS][5] -> [INCOMPLETE][6] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb3/igt@i915_module_load@reload-no-display.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@i915_module_load@reload-no-display.html

  * igt@i915_pm_dc@dc5-dpms:
    - shard-iclb:         [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb4/igt@i915_pm_dc@dc5-dpms.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@i915_pm_dc@dc5-dpms.html
    - shard-tglb:         [PASS][9] -> [FAIL][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb8/igt@i915_pm_dc@dc5-dpms.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@i915_pm_dc@dc5-dpms.html

  * igt@i915_selftest@perf:
    - shard-tglb:         NOTRUN -> [FAIL][11] +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@i915_selftest@perf.html
    - shard-iclb:         NOTRUN -> [FAIL][12] +1 similar issue
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@i915_selftest@perf.html

  * igt@runner@aborted:
    - shard-iclb:         NOTRUN -> ([FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18], [FAIL][19], [FAIL][20], [FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25], [FAIL][26], [FAIL][27], [FAIL][28], [FAIL][29], [FAIL][30], [FAIL][31], [FAIL][32], [FAIL][33], [FAIL][34]) ([i915#1580] / [i915#1814] / [i915#2292] / [i915#2439] / [k.org#204565])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb2/igt@runner@aborted.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@runner@aborted.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb8/igt@runner@aborted.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@runner@aborted.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@runner@aborted.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@runner@aborted.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb3/igt@runner@aborted.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@runner@aborted.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@runner@aborted.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@runner@aborted.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb2/igt@runner@aborted.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@runner@aborted.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@runner@aborted.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@runner@aborted.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@runner@aborted.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@runner@aborted.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@runner@aborted.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@runner@aborted.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@runner@aborted.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@runner@aborted.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@runner@aborted.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@runner@aborted.html
    - shard-tglb:         NOTRUN -> ([FAIL][35], [FAIL][36], [FAIL][37], [FAIL][38], [FAIL][39], [FAIL][40], [FAIL][41], [FAIL][42], [FAIL][43], [FAIL][44], [FAIL][45], [FAIL][46], [FAIL][47], [FAIL][48], [FAIL][49], [FAIL][50], [FAIL][51], [FAIL][52], [FAIL][53], [FAIL][54], [FAIL][55], [FAIL][56]) ([i915#1602] / [i915#1759] / [i915#1814] / [i915#1852] / [i915#2045] / [i915#2248] / [i915#2292] / [i915#2439] / [i915#402] / [i915#456] / [k.org#204565])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@runner@aborted.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb3/igt@runner@aborted.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@runner@aborted.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@runner@aborted.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@runner@aborted.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@runner@aborted.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@runner@aborted.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb3/igt@runner@aborted.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@runner@aborted.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@runner@aborted.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@runner@aborted.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@runner@aborted.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@runner@aborted.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@runner@aborted.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@runner@aborted.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@runner@aborted.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@runner@aborted.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@runner@aborted.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@runner@aborted.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@runner@aborted.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb3/igt@runner@aborted.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@runner@aborted.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-tglb:         [DMESG-WARN][57] ([i915#2411]) -> [INCOMPLETE][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb6/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@kms_vblank@pipe-b-ts-continuation-modeset-rpm:
    - shard-tglb:         [DMESG-WARN][59] ([i915#2411]) -> [SKIP][60] +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb3/igt@kms_vblank@pipe-b-ts-continuation-modeset-rpm.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb3/igt@kms_vblank@pipe-b-ts-continuation-modeset-rpm.html

  
Known issues
------------

  Here are the changes found in Patchwork_18737_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
    - shard-iclb:         [PASS][61] -> [INCOMPLETE][62] ([i915#1373]) +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb7/igt@gem_ctx_isolation@preservation-s3@rcs0.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@gem_ctx_isolation@preservation-s3@rcs0.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-skl:          [PASS][63] -> [DMESG-WARN][64] ([i915#1982]) +5 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl7/igt@gem_exec_flush@basic-wb-prw-default.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl3/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-iclb:         [PASS][65] -> [INCOMPLETE][66] ([i915#1185]) +7 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb1/igt@gem_exec_suspend@basic-s3.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_exec_whisper@basic-contexts:
    - shard-glk:          [PASS][67] -> [DMESG-WARN][68] ([i915#118] / [i915#95])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk9/igt@gem_exec_whisper@basic-contexts.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk8/igt@gem_exec_whisper@basic-contexts.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-iclb:         [PASS][69] -> [INCOMPLETE][70] ([i915#926])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb3/igt@i915_module_load@reload-with-fault-injection.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][71] -> [FAIL][72] ([i915#454])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@basic-rte:
    - shard-iclb:         [PASS][73] -> [FAIL][74] ([i915#579])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb7/igt@i915_pm_rpm@basic-rte.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb8/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-iclb:         [PASS][75] -> [SKIP][76] ([i915#579]) +10 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb4/igt@i915_pm_rpm@system-suspend-devices.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb3/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@kms_3d:
    - shard-tglb:         [PASS][77] -> [DMESG-WARN][78] ([i915#402])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb6/igt@kms_3d.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb6/igt@kms_3d.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-180:
    - shard-apl:          [PASS][79] -> [DMESG-WARN][80] ([i915#1635] / [i915#1982])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-apl8/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-apl7/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled:
    - shard-snb:          [PASS][81] -> [FAIL][82] ([i915#54])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-snb5/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-snb4/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-skl:          [PASS][83] -> [FAIL][84] ([i915#79])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-suspend@a-edp1:
    - shard-iclb:         [PASS][85] -> [INCOMPLETE][86] ([i915#2483])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb2/igt@kms_flip@flip-vs-suspend@a-edp1.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb4/igt@kms_flip@flip-vs-suspend@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate@c-edp1:
    - shard-skl:          [PASS][87] -> [FAIL][88] ([i915#2122])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html

  * igt@kms_flip@plain-flip-ts-check@a-hdmi-a2:
    - shard-glk:          [PASS][89] -> [FAIL][90] ([i915#2122])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk9/igt@kms_flip@plain-flip-ts-check@a-hdmi-a2.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk2/igt@kms_flip@plain-flip-ts-check@a-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:
    - shard-tglb:         [PASS][91] -> [DMESG-WARN][92] ([i915#1982]) +3 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-iclb:         [PASS][93] -> [INCOMPLETE][94] ([i915#1185] / [i915#123])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb1/igt@kms_frontbuffer_tracking@psr-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb8/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-iclb:         [PASS][95] -> [INCOMPLETE][96] ([i915#1185] / [i915#1373])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb8/igt@kms_hdr@bpc-switch-suspend.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb7/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-iclb:         [PASS][97] -> [INCOMPLETE][98] ([i915#1185] / [i915#250])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
    - shard-skl:          [PASS][99] -> [INCOMPLETE][100] ([i915#648])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][101] -> [FAIL][102] ([fdo#108145] / [i915#265])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][103] -> [SKIP][104] ([fdo#109441])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-iclb:         [PASS][105] -> [INCOMPLETE][106] ([i915#1078] / [i915#1185])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb5/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm:
    - shard-iclb:         [PASS][107] -> [SKIP][108] ([fdo#109278]) +1 similar issue
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb3/igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb2/igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-iclb:         [PASS][109] -> [INCOMPLETE][110] ([fdo#111764] / [i915#1185])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb5/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [PASS][111] -> [FAIL][112] ([i915#1542])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl2/igt@perf@polling-parameterized.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl6/igt@perf@polling-parameterized.html

  
#### Possible fixes ####

  * igt@gem_exec_reloc@basic-many-active@vecs0:
    - shard-glk:          [FAIL][113] ([i915#2389]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk6/igt@gem_exec_reloc@basic-many-active@vecs0.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk5/igt@gem_exec_reloc@basic-many-active@vecs0.html

  * igt@gem_exec_whisper@basic-forked-all:
    - shard-glk:          [DMESG-WARN][115] ([i915#118] / [i915#95]) -> [PASS][116] +1 similar issue
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk9/igt@gem_exec_whisper@basic-forked-all.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk8/igt@gem_exec_whisper@basic-forked-all.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-skl:          [FAIL][117] ([i915#454]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl9/igt@i915_pm_dc@dc6-psr.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl6/igt@i915_pm_dc@dc6-psr.html

  * {igt@kms_async_flips@async-flip-with-page-flip-events}:
    - shard-kbl:          [FAIL][119] ([i915#2521]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-kbl7/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-kbl6/igt@kms_async_flips@async-flip-with-page-flip-events.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@dp-1-pipe-b:
    - shard-kbl:          [DMESG-WARN][121] ([i915#62]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-kbl2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@dp-1-pipe-b.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-kbl4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@dp-1-pipe-b.html

  * igt@kms_big_fb@linear-32bpp-rotate-180:
    - shard-glk:          [DMESG-FAIL][123] ([i915#118] / [i915#95]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk4/igt@kms_big_fb@linear-32bpp-rotate-180.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk6/igt@kms_big_fb@linear-32bpp-rotate-180.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-xtiled:
    - shard-skl:          [DMESG-WARN][125] ([i915#1982]) -> [PASS][126] +1 similar issue
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl2/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-xtiled.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-xtiled.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1:
    - shard-tglb:         [FAIL][127] ([i915#2122]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb7/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [FAIL][129] ([i915#2122]) -> [PASS][130] +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-tglb:         [DMESG-WARN][131] ([i915#1982]) -> [PASS][132] +1 similar issue
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-glk:          [DMESG-WARN][133] ([i915#1982]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-glk7/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-glk9/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-skl:          [INCOMPLETE][135] ([i915#198]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_cursor@pipe-a-primary-size-256:
    - shard-apl:          [DMESG-WARN][137] ([i915#1635] / [i915#1982]) -> [PASS][138] +1 similar issue
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-apl4/igt@kms_plane_cursor@pipe-a-primary-size-256.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-apl2/igt@kms_plane_cursor@pipe-a-primary-size-256.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [SKIP][139] ([fdo#109441]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb3/igt@kms_psr@psr2_cursor_plane_onoff.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s3:
    - shard-tglb:         [DMESG-WARN][141] ([i915#2411]) -> [INCOMPLETE][142] ([i915#1436] / [i915#2411]) +1 similar issue
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb2/igt@gem_exec_suspend@basic-s3.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_pm_rpm@basic-rte:
    - shard-tglb:         [DMESG-WARN][143] ([i915#2411]) -> [FAIL][144] ([i915#579])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb3/igt@i915_pm_rpm@basic-rte.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-tglb:         [SKIP][145] ([fdo#111644] / [i915#1397] / [i915#2411]) -> [SKIP][146] ([i915#579]) +2 similar issues
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb6/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb6/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
    - shard-iclb:         [SKIP][147] ([fdo#110892]) -> [SKIP][148] ([i915#579]) +2 similar issues
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb4/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb3/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-iclb:         [SKIP][149] ([fdo#109293] / [fdo#109506]) -> [SKIP][150] ([i915#579]) +1 similar issue
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-iclb1/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-iclb8/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_pm_rpm@i2c:
    - shard-tglb:         [DMESG-WARN][151] ([i915#2411]) -> [SKIP][152] ([i915#579]) +9 similar issues
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb1/igt@i915_pm_rpm@i2c.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb7/igt@i915_pm_rpm@i2c.html

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:
    - shard-tglb:         [SKIP][153] ([fdo#109506] / [i915#2411]) -> [SKIP][154] ([i915#579]) +1 similar issue
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb6/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@i915_pm_rpm@modeset-pc8-residency-stress.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-apl:          [FAIL][155] ([fdo#110321] / [fdo#110336] / [i915#1635]) -> [TIMEOUT][156] ([i915#1319] / [i915#1635])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-apl7/igt@kms_content_protection@atomic-dpms.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-apl8/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@legacy:
    - shard-apl:          [TIMEOUT][157] ([i915#1319] / [i915#1635]) -> [FAIL][158] ([fdo#110321] / [fdo#110336] / [i915#1635])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-apl4/igt@kms_content_protection@legacy.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-apl4/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-skl:          [DMESG-WARN][159] ([i915#1982]) -> [DMESG-FAIL][160] ([i915#1982])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-suspend@a-edp1:
    - shard-tglb:         [DMESG-WARN][161] ([i915#2411]) -> [INCOMPLETE][162] ([i915#1436] / [i915#2411] / [i915#456]) +7 similar issues
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb1/igt@kms_flip@flip-vs-suspend@a-edp1.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb8/igt@kms_flip@flip-vs-suspend@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-modesetfrombusy:
    - shard-snb:          [INCOMPLETE][163] ([i915#82]) -> [FAIL][164] ([i915#2546])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-snb5/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-snb5/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglb:         [DMESG-WARN][165] ([i915#2411]) -> [INCOMPLETE][166] ([i915#1373] / [i915#1436] / [i915#2411])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb3/igt@kms_hdr@bpc-switch-suspend.html
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb5/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-tglb:         [DMESG-WARN][167] ([i915#2411]) -> [INCOMPLETE][168] ([i915#1436] / [i915#1798] / [i915#1982] / [i915#456]) +1 similar issue
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-tglb:         [DMESG-WARN][169] ([i915#2411]) -> [INCOMPLETE][170] ([i915#1436] / [i915#1982])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9165/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/shard-tglb2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-tglb:         [DMESG-WARN][171] (

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18737/index.html

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