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* [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
@ 2020-11-03 13:46 Tejas Upadhyay
  2020-11-03 14:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Tejas Upadhyay @ 2020-11-03 13:46 UTC (permalink / raw)
  To: intel-gfx; +Cc: hariom.pandey

As per W/A implemented for TGL to program half of the nominal
DCO divider fraction value which is also applicable on EHL.

Changes since V1:
	- ehl_ used as to keep earliest platform prefix
	- WA required B0 stepping onwards

Cc: Deak Imre <imre.deak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 ++++++++-----
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index eaef7a2d041f..cb6ebf627c04 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -2636,13 +2636,16 @@ static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state)
 }
 
 /*
- * Display WA #22010492432: tgl
+ * Display WA #22010492432: ehl, tgl
  * Program half of the nominal DCO divider fraction value.
  */
 static bool
-tgl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
+ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
 {
-	return IS_TIGERLAKE(i915) && i915->dpll.ref_clks.nssc == 38400;
+	return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
+		IS_JSL_EHL_REVID(i915, EHL_REVID_B0, EHL_REVID_B0)) ||
+		IS_TIGERLAKE(i915)) &&
+		i915->dpll.ref_clks.nssc == 38400;
 }
 
 static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
@@ -2696,7 +2699,7 @@ static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
 	dco_fraction = (pll_state->cfgcr0 & DPLL_CFGCR0_DCO_FRACTION_MASK) >>
 		       DPLL_CFGCR0_DCO_FRACTION_SHIFT;
 
-	if (tgl_combo_pll_div_frac_wa_needed(dev_priv))
+	if (ehl_combo_pll_div_frac_wa_needed(dev_priv))
 		dco_fraction *= 2;
 
 	dco_freq += (dco_fraction * ref_clock) / 0x8000;
@@ -3086,7 +3089,7 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
 
 	memset(pll_state, 0, sizeof(*pll_state));
 
-	if (tgl_combo_pll_div_frac_wa_needed(i915))
+	if (ehl_combo_pll_div_frac_wa_needed(i915))
 		dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
 
 	pll_state->cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d548e10e1600..8bf59b57efc9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1560,6 +1560,7 @@ extern const struct i915_rev_steppings kbl_revids[];
 	(IS_ICELAKE(p) && IS_REVID(p, since, until))
 
 #define EHL_REVID_A0            0x0
+#define EHL_REVID_B0            0x2
 
 #define IS_JSL_EHL_REVID(p, since, until) \
 	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
-- 
2.28.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2)
  2020-11-03 13:46 [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Tejas Upadhyay
@ 2020-11-03 14:04 ` Patchwork
  2020-11-03 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-11-03 14:04 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/ehl: Implement W/A 22010492432 (rev2)
URL   : https://patchwork.freedesktop.org/series/83135/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
003c5f8bf5bd drm/i915/ehl: Implement W/A 22010492432
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2646:
+	return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
+		IS_JSL_EHL_REVID(i915, EHL_REVID_B0, EHL_REVID_B0)) ||

total: 0 errors, 0 warnings, 1 checks, 42 lines checked


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Implement W/A 22010492432 (rev2)
  2020-11-03 13:46 [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Tejas Upadhyay
  2020-11-03 14:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
@ 2020-11-03 14:23 ` Patchwork
  2020-11-03 15:42 ` [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Imre Deak
  2020-11-03 20:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-11-03 14:23 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 2944 bytes --]

== Series Details ==

Series: drm/i915/ehl: Implement W/A 22010492432 (rev2)
URL   : https://patchwork.freedesktop.org/series/83135/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9253 -> Patchwork_18840
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/index.html

New tests
---------

  New tests have been introduced between CI_DRM_9253 and Patchwork_18840:

### New CI tests (1) ###

  * boot:
    - Statuses : 38 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18840 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-n3050:       [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
    - fi-icl-u2:          [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
    - fi-icl-u2:          [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982


Participating hosts (43 -> 38)
------------------------------

  Missing    (5): fi-ilk-m540 fi-tgl-dsi fi-hsw-4200u fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_9253 -> Patchwork_18840

  CI-20190529: 20190529
  CI_DRM_9253: a8c030d641dc0961d180b866ab6e5e9032dcbdf4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5830: 12d370cb57e0cfcb781c87ad9e15e68b17a1f41f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18840: 003c5f8bf5bd155956d52b3f05de0e745a7d5d7c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

003c5f8bf5bd drm/i915/ehl: Implement W/A 22010492432

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/index.html

[-- Attachment #1.2: Type: text/html, Size: 3776 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
  2020-11-03 13:46 [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Tejas Upadhyay
  2020-11-03 14:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
  2020-11-03 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-11-03 15:42 ` Imre Deak
  2020-11-03 16:31   ` Surendrakumar Upadhyay, TejaskumarX
  2020-11-03 20:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
  3 siblings, 1 reply; 7+ messages in thread
From: Imre Deak @ 2020-11-03 15:42 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: intel-gfx, hariom.pandey

On Tue, Nov 03, 2020 at 07:16:51PM +0530, Tejas Upadhyay wrote:
> As per W/A implemented for TGL to program half of the nominal
> DCO divider fraction value which is also applicable on EHL.
> 
> Changes since V1:
> 	- ehl_ used as to keep earliest platform prefix
> 	- WA required B0 stepping onwards
> 
> Cc: Deak Imre <imre.deak@intel.com>
> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 ++++++++-----
>  drivers/gpu/drm/i915/i915_drv.h               |  1 +
>  2 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index eaef7a2d041f..cb6ebf627c04 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -2636,13 +2636,16 @@ static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state)
>  }
>  
>  /*
> - * Display WA #22010492432: tgl
> + * Display WA #22010492432: ehl, tgl
>   * Program half of the nominal DCO divider fraction value.
>   */
>  static bool
> -tgl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
> +ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
>  {
> -	return IS_TIGERLAKE(i915) && i915->dpll.ref_clks.nssc == 38400;
> +	return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
> +		IS_JSL_EHL_REVID(i915, EHL_REVID_B0, EHL_REVID_B0)) ||

Imo, better to add a definition for IS_ELKHARTLAKE() and IS_EHL_REVID().

It also applies after B0, so it'd be
		IS_EHL_REVID(EHL_REVID_B0, REVID_FOREVER);

> +		IS_TIGERLAKE(i915)) &&
> +		i915->dpll.ref_clks.nssc == 38400;
>  }
>  
>  static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
> @@ -2696,7 +2699,7 @@ static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
>  	dco_fraction = (pll_state->cfgcr0 & DPLL_CFGCR0_DCO_FRACTION_MASK) >>
>  		       DPLL_CFGCR0_DCO_FRACTION_SHIFT;
>  
> -	if (tgl_combo_pll_div_frac_wa_needed(dev_priv))
> +	if (ehl_combo_pll_div_frac_wa_needed(dev_priv))
>  		dco_fraction *= 2;
>  
>  	dco_freq += (dco_fraction * ref_clock) / 0x8000;
> @@ -3086,7 +3089,7 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
>  
>  	memset(pll_state, 0, sizeof(*pll_state));
>  
> -	if (tgl_combo_pll_div_frac_wa_needed(i915))
> +	if (ehl_combo_pll_div_frac_wa_needed(i915))
>  		dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
>  
>  	pll_state->cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) |
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d548e10e1600..8bf59b57efc9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1560,6 +1560,7 @@ extern const struct i915_rev_steppings kbl_revids[];
>  	(IS_ICELAKE(p) && IS_REVID(p, since, until))
>  
>  #define EHL_REVID_A0            0x0
> +#define EHL_REVID_B0            0x2

Where are the steppings specified for EHL? At least on the BSpec/29153
page I see EHL/B0 being 1.

>  
>  #define IS_JSL_EHL_REVID(p, since, until) \
>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
> -- 
> 2.28.0
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
  2020-11-03 15:42 ` [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Imre Deak
@ 2020-11-03 16:31   ` Surendrakumar Upadhyay, TejaskumarX
  2020-11-03 16:54     ` Imre Deak
  0 siblings, 1 reply; 7+ messages in thread
From: Surendrakumar Upadhyay, TejaskumarX @ 2020-11-03 16:31 UTC (permalink / raw)
  To: Deak, Imre; +Cc: intel-gfx@lists.freedesktop.org, Pandey, Hariom



> -----Original Message-----
> From: Imre Deak <imre.deak@intel.com>
> Sent: 03 November 2020 21:13
> To: Surendrakumar Upadhyay, TejaskumarX
> <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom
> <hariom.pandey@intel.com>
> Subject: Re: [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
> 
> On Tue, Nov 03, 2020 at 07:16:51PM +0530, Tejas Upadhyay wrote:
> > As per W/A implemented for TGL to program half of the nominal DCO
> > divider fraction value which is also applicable on EHL.
> >
> > Changes since V1:
> > 	- ehl_ used as to keep earliest platform prefix
> > 	- WA required B0 stepping onwards
> >
> > Cc: Deak Imre <imre.deak@intel.com>
> > Signed-off-by: Tejas Upadhyay
> > <tejaskumarx.surendrakumar.upadhyay@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 ++++++++-----
> >  drivers/gpu/drm/i915/i915_drv.h               |  1 +
> >  2 files changed, 9 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index eaef7a2d041f..cb6ebf627c04 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -2636,13 +2636,16 @@ static bool cnl_ddi_hdmi_pll_dividers(struct
> > intel_crtc_state *crtc_state)  }
> >
> >  /*
> > - * Display WA #22010492432: tgl
> > + * Display WA #22010492432: ehl, tgl
> >   * Program half of the nominal DCO divider fraction value.
> >   */
> >  static bool
> > -tgl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
> > +ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
> >  {
> > -	return IS_TIGERLAKE(i915) && i915->dpll.ref_clks.nssc == 38400;
> > +	return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
> > +		IS_JSL_EHL_REVID(i915, EHL_REVID_B0, EHL_REVID_B0)) ||
> 
> Imo, better to add a definition for IS_ELKHARTLAKE() and IS_EHL_REVID().
> 
It has been already discussed in previous EHL/JSL PCI id split patch (between Matt Roper/Ville/Me) that we will not keep IS_ELKHARTLAKE() and IS_EHL_REVID() instead we will replace with IS_PLATFORM(i915, INTEL_ELKHARTLAKE) and IS_JSL_EHL_REVID .

> It also applies after B0, so it'd be
> 		IS_EHL_REVID(EHL_REVID_B0, REVID_FOREVER);
B0 is latest revision. So current logic should be fine.
> 
> > +		IS_TIGERLAKE(i915)) &&
> > +		i915->dpll.ref_clks.nssc == 38400;
> >  }
> >
> >  static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private
> > *dev_priv, @@ -2696,7 +2699,7 @@ static int
> __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
> >  	dco_fraction = (pll_state->cfgcr0 &
> DPLL_CFGCR0_DCO_FRACTION_MASK) >>
> >  		       DPLL_CFGCR0_DCO_FRACTION_SHIFT;
> >
> > -	if (tgl_combo_pll_div_frac_wa_needed(dev_priv))
> > +	if (ehl_combo_pll_div_frac_wa_needed(dev_priv))
> >  		dco_fraction *= 2;
> >
> >  	dco_freq += (dco_fraction * ref_clock) / 0x8000; @@ -3086,7 +3089,7
> > @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
> >
> >  	memset(pll_state, 0, sizeof(*pll_state));
> >
> > -	if (tgl_combo_pll_div_frac_wa_needed(i915))
> > +	if (ehl_combo_pll_div_frac_wa_needed(i915))
> >  		dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
> >
> >  	pll_state->cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) | diff
> > --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index d548e10e1600..8bf59b57efc9
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1560,6 +1560,7 @@ extern const struct i915_rev_steppings
> kbl_revids[];
> >  	(IS_ICELAKE(p) && IS_REVID(p, since, until))
> >
> >  #define EHL_REVID_A0            0x0
> > +#define EHL_REVID_B0            0x2
> 
> Where are the steppings specified for EHL? At least on the BSpec/29153 page
> I see EHL/B0 being 1.
> 
> >
> >  #define IS_JSL_EHL_REVID(p, since, until) \
> >  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
> > --
> > 2.28.0
> >
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
  2020-11-03 16:31   ` Surendrakumar Upadhyay, TejaskumarX
@ 2020-11-03 16:54     ` Imre Deak
  0 siblings, 0 replies; 7+ messages in thread
From: Imre Deak @ 2020-11-03 16:54 UTC (permalink / raw)
  To: Surendrakumar Upadhyay, TejaskumarX
  Cc: intel-gfx@lists.freedesktop.org, Pandey, Hariom

On Tue, Nov 03, 2020 at 06:31:58PM +0200, Surendrakumar Upadhyay, TejaskumarX wrote:
> > -----Original Message-----
> > From: Imre Deak <imre.deak@intel.com>
> > Sent: 03 November 2020 21:13
> > To: Surendrakumar Upadhyay, TejaskumarX
> > <tejaskumarx.surendrakumar.upadhyay@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom
> > <hariom.pandey@intel.com>
> > Subject: Re: [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
> >
> > On Tue, Nov 03, 2020 at 07:16:51PM +0530, Tejas Upadhyay wrote:
> > > As per W/A implemented for TGL to program half of the nominal DCO
> > > divider fraction value which is also applicable on EHL.
> > >
> > > Changes since V1:
> > > - ehl_ used as to keep earliest platform prefix
> > > - WA required B0 stepping onwards
> > >
> > > Cc: Deak Imre <imre.deak@intel.com>
> > > Signed-off-by: Tejas Upadhyay
> > > <tejaskumarx.surendrakumar.upadhyay@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 ++++++++-----
> > >  drivers/gpu/drm/i915/i915_drv.h               |  1 +
> > >  2 files changed, 9 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > index eaef7a2d041f..cb6ebf627c04 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > @@ -2636,13 +2636,16 @@ static bool cnl_ddi_hdmi_pll_dividers(struct
> > > intel_crtc_state *crtc_state)  }
> > >
> > >  /*
> > > - * Display WA #22010492432: tgl
> > > + * Display WA #22010492432: ehl, tgl
> > >   * Program half of the nominal DCO divider fraction value.
> > >   */
> > >  static bool
> > > -tgl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
> > > +ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
> > >  {
> > > -return IS_TIGERLAKE(i915) && i915->dpll.ref_clks.nssc == 38400;
> > > +return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
> > > +IS_JSL_EHL_REVID(i915, EHL_REVID_B0, EHL_REVID_B0)) ||
> >
> > Imo, better to add a definition for IS_ELKHARTLAKE() and IS_EHL_REVID().
> >
> It has been already discussed in previous EHL/JSL PCI id split patch
> (between Matt Roper/Ville/Me) that we will not keep IS_ELKHARTLAKE()
> and IS_EHL_REVID() instead we will replace with IS_PLATFORM(i915,
> INTEL_ELKHARTLAKE) and IS_JSL_EHL_REVID .

Ok, missed that discussion.

> > It also applies after B0, so it'd be
> > IS_EHL_REVID(EHL_REVID_B0, REVID_FOREVER);
>
> B0 is latest revision. So current logic should be fine.

Until a new revision appears. The spec says to apply the WA on all
steppings starting with B0, I don't see a reason to do otherwise.

> > > +IS_TIGERLAKE(i915)) &&
> > > +i915->dpll.ref_clks.nssc == 38400;
> > >  }
> > >
> > >  static int __cnl_ddi_wrpll_get_freq(struct drm_i915_private
> > > *dev_priv, @@ -2696,7 +2699,7 @@ static int
> > __cnl_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
> > >  dco_fraction = (pll_state->cfgcr0 &
> > DPLL_CFGCR0_DCO_FRACTION_MASK) >>
> > >         DPLL_CFGCR0_DCO_FRACTION_SHIFT;
> > >
> > > -if (tgl_combo_pll_div_frac_wa_needed(dev_priv))
> > > +if (ehl_combo_pll_div_frac_wa_needed(dev_priv))
> > >  dco_fraction *= 2;
> > >
> > >  dco_freq += (dco_fraction * ref_clock) / 0x8000; @@ -3086,7 +3089,7
> > > @@ static void icl_calc_dpll_state(struct drm_i915_private *i915,
> > >
> > >  memset(pll_state, 0, sizeof(*pll_state));
> > >
> > > -if (tgl_combo_pll_div_frac_wa_needed(i915))
> > > +if (ehl_combo_pll_div_frac_wa_needed(i915))
> > >  dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
> > >
> > >  pll_state->cfgcr0 = DPLL_CFGCR0_DCO_FRACTION(dco_fraction) | diff
> > > --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h index d548e10e1600..8bf59b57efc9
> > > 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -1560,6 +1560,7 @@ extern const struct i915_rev_steppings
> > kbl_revids[];
> > >  (IS_ICELAKE(p) && IS_REVID(p, since, until))
> > >
> > >  #define EHL_REVID_A0            0x0
> > > +#define EHL_REVID_B0            0x2
> >
> > Where are the steppings specified for EHL? At least on the BSpec/29153 page
> > I see EHL/B0 being 1.
> >
> > >
> > >  #define IS_JSL_EHL_REVID(p, since, until) \
> > >  (IS_JSL_EHL(p) && IS_REVID(p, since, until))
> > > --
> > > 2.28.0
> > >
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2)
  2020-11-03 13:46 [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Tejas Upadhyay
                   ` (2 preceding siblings ...)
  2020-11-03 15:42 ` [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Imre Deak
@ 2020-11-03 20:57 ` Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-11-03 20:57 UTC (permalink / raw)
  To: Surendrakumar Upadhyay, TejaskumarX; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 18590 bytes --]

== Series Details ==

Series: drm/i915/ehl: Implement W/A 22010492432 (rev2)
URL   : https://patchwork.freedesktop.org/series/83135/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9253_full -> Patchwork_18840_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18840_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18840_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18840_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_create@forked:
    - shard-tglb:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb5/igt@gem_exec_create@forked.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@gem_exec_create@forked.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-suspend-interruptible@d-edp1:
    - shard-tglb:         [DMESG-WARN][3] ([i915#2411]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb1/igt@kms_flip@flip-vs-suspend-interruptible@d-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@kms_flip@flip-vs-suspend-interruptible@d-edp1.html

  
New tests
---------

  New tests have been introduced between CI_DRM_9253_full and Patchwork_18840_full:

### New CI tests (1) ###

  * boot:
    - Statuses : 175 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_18840_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-skl:          [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +9 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl10/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl1/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - shard-kbl:          [PASS][7] -> [DMESG-WARN][8] ([i915#180])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_eio@kms:
    - shard-snb:          [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-snb7/igt@gem_eio@kms.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-snb7/igt@gem_eio@kms.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][11] -> [SKIP][12] ([i915#2190])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb1/igt@gem_huc_copy@huc-copy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-snb:          [PASS][13] -> [INCOMPLETE][14] ([i915#82])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-snb6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-snb2/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-skl:          [PASS][15] -> [DMESG-WARN][16] ([i915#1436] / [i915#716])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl9/igt@gen9_exec_parse@allowed-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl8/igt@gen9_exec_parse@allowed-all.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-kbl1/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-kbl4/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([i915#54]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-skl:          [PASS][21] -> [INCOMPLETE][22] ([i915#300])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge:
    - shard-glk:          [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-glk7/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-glk7/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled:
    - shard-apl:          [PASS][25] -> [DMESG-WARN][26] ([i915#1635] / [i915#1982]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-apl6/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-apl1/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][27] -> [FAIL][28] ([i915#79])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt:
    - shard-iclb:         [PASS][29] -> [DMESG-WARN][30] ([i915#1982])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-iclb5/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-iclb8/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [PASS][31] -> [FAIL][32] ([i915#1188])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-skl:          [PASS][33] -> [INCOMPLETE][34] ([i915#198])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109441]) +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotrebind-lateclose:
    - shard-iclb:         [DMESG-WARN][37] ([i915#1982]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-iclb5/igt@core_hotunplug@hotrebind-lateclose.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-iclb8/igt@core_hotunplug@hotrebind-lateclose.html

  * igt@drm_read@invalid-buffer:
    - shard-glk:          [DMESG-WARN][39] ([i915#1982]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-glk2/igt@drm_read@invalid-buffer.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-glk2/igt@drm_read@invalid-buffer.html

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][41] ([i915#658]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-iclb4/igt@feature_discovery@psr2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-iclb2/igt@feature_discovery@psr2.html

  * igt@gem_exec_schedule@deep@vecs0:
    - shard-skl:          [INCOMPLETE][43] -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl3/igt@gem_exec_schedule@deep@vecs0.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl4/igt@gem_exec_schedule@deep@vecs0.html

  * {igt@kms_async_flips@async-flip-with-page-flip-events}:
    - shard-kbl:          [FAIL][45] ([i915#2521]) -> [PASS][46] +1 similar issue
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-kbl6/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-kbl1/igt@kms_async_flips@async-flip-with-page-flip-events.html

  * {igt@kms_async_flips@test-time-stamp}:
    - shard-apl:          [DMESG-WARN][47] ([i915#1635] / [i915#1982]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-apl8/igt@kms_async_flips@test-time-stamp.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-apl7/igt@kms_async_flips@test-time-stamp.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-270:
    - shard-kbl:          [DMESG-WARN][49] ([i915#1982]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-kbl7/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-kbl1/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen:
    - shard-skl:          [FAIL][51] ([i915#54]) -> [PASS][52] +3 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][53] ([i915#2346]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [FAIL][55] ([i915#79]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-skl:          [DMESG-WARN][57] ([i915#1982]) -> [PASS][58] +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl8/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][59] ([fdo#108145] / [i915#265]) -> [PASS][60] +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][61] ([fdo#109441]) -> [PASS][62] +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][63] ([i915#1542]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl6/igt@perf@polling-parameterized.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl1/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-tglb:         [INCOMPLETE][65] ([i915#2411] / [i915#456] / [i915#750]) -> [DMESG-WARN][66] ([i915#2411])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb8/igt@i915_pm_rpm@system-suspend-execbuf.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb7/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [DMESG-WARN][67] ([i915#2411]) -> [DMESG-WARN][68] ([i915#1436] / [i915#2411])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [DMESG-WARN][69] ([i915#1982]) -> [DMESG-FAIL][70] ([i915#1982])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
    - shard-skl:          [FAIL][71] ([i915#2122]) -> [DMESG-WARN][72] ([i915#1982])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html

  * igt@runner@aborted:
    - shard-tglb:         [FAIL][73] ([i915#2439]) -> ([FAIL][74], [FAIL][75], [FAIL][76]) ([i915#2248] / [i915#2439])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-tglb7/igt@runner@aborted.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@runner@aborted.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb6/igt@runner@aborted.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-tglb1/igt@runner@aborted.html
    - shard-skl:          [FAIL][77] ([i915#1436] / [i915#483]) -> ([FAIL][78], [FAIL][79], [FAIL][80]) ([i915#1436] / [i915#1611] / [i915#2029])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9253/shard-skl7/igt@runner@aborted.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl6/igt@runner@aborted.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl3/igt@runner@aborted.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/shard-skl8/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2248]: https://gitlab.freedesktop.org/drm/intel/issues/2248
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2439]: https://gitlab.freedesktop.org/drm/intel/issues/2439
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
  [i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
  [i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#750]: https://gitlab.freedesktop.org/drm/intel/issues/750
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_9253 -> Patchwork_18840

  CI-20190529: 20190529
  CI_DRM_9253: a8c030d641dc0961d180b866ab6e5e9032dcbdf4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5830: 12d370cb57e0cfcb781c87ad9e15e68b17a1f41f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18840: 003c5f8bf5bd155956d52b3f05de0e745a7d5d7c @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18840/index.html

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^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-11-03 20:57 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-11-03 13:46 [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Tejas Upadhyay
2020-11-03 14:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork
2020-11-03 14:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-03 15:42 ` [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 Imre Deak
2020-11-03 16:31   ` Surendrakumar Upadhyay, TejaskumarX
2020-11-03 16:54     ` Imre Deak
2020-11-03 20:57 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2) Patchwork

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