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From: Aditya Swarup <aditya.swarup@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH 1/8] drm/i915/adl_s: Update PHY_MISC programming
Date: Fri, 29 Jan 2021 10:29:38 -0800	[thread overview]
Message-ID: <20210129182945.217078-2-aditya.swarup@intel.com> (raw)
In-Reply-To: <20210129182945.217078-1-aditya.swarup@intel.com>

From: Matt Roper <matthew.d.roper@intel.com>

ADL-S switches up which PHYs are considered a master to other PHYs;
PHY-C is no longer a master, but PHY-D is now.

Bspec: 49291
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Aditya Swarup <aditya.swarup@intel.com>
---
 drivers/gpu/drm/i915/display/intel_combo_phy.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index dd45cbafcf42..c55813c6194a 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -187,10 +187,16 @@ static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)
 	 * Some platforms only expect PHY_MISC to be programmed for PHY-A and
 	 * PHY-B and may not even have instances of the register for the
 	 * other combo PHY's.
+	 *
+	 * ADL-S technically has three instances of PHY_MISC, but only requires
+	 * that we program it for PHY A.
 	 */
-	if (IS_JSL_EHL(i915) ||
-	    IS_ROCKETLAKE(i915) ||
-	    IS_DG1(i915))
+
+	if (IS_ALDERLAKE_S(i915))
+		return phy == PHY_A;
+	else if (IS_JSL_EHL(i915) ||
+		 IS_ROCKETLAKE(i915) ||
+		 IS_DG1(i915))
 		return phy < PHY_C;
 
 	return true;
-- 
2.27.0

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  reply	other threads:[~2021-01-29 18:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-29 18:29 [Intel-gfx] [PATCH 0/8] Final set of patches for ADLS enabling Aditya Swarup
2021-01-29 18:29 ` Aditya Swarup [this message]
2021-01-29 18:29 ` [Intel-gfx] [PATCH 2/8] drm/i915/adl_s: Add power wells Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 3/8] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 5/8] drm/i915/adl_s: Load DMC Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 6/8] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 7/8] drm/i915/adl_s: Add display WAs for ADL-S Aditya Swarup
2021-01-29 18:54   ` Souza, Jose
2021-01-29 18:29 ` [Intel-gfx] [PATCH 8/8] drm/i915/adl_s: Add GT and CTX " Aditya Swarup
2021-01-29 19:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling (rev3) Patchwork
2021-01-29 19:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-29 19:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-30  1:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-01-30 17:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling (rev4) Patchwork
2021-01-30 17:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-30 17:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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