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From: Aditya Swarup <aditya.swarup@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [Intel-gfx] [PATCH 4/8] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION
Date: Fri, 29 Jan 2021 10:29:41 -0800	[thread overview]
Message-ID: <20210129182945.217078-5-aditya.swarup@intel.com> (raw)
In-Reply-To: <20210129182945.217078-1-aditya.swarup@intel.com>

From: José Roberto de Souza <jose.souza@intel.com>

- As RKL and ADL-S only have 5 planes, primary and 4 sprites and
  the cursor plane, let's group the handling together under
  HAS_D12_PLANE_MINIMIZATION.
- Also use macro to select pipe irq fault error mask.

BSpec: 49251
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h             | 3 +++
 drivers/gpu/drm/i915/i915_irq.c             | 2 +-
 drivers/gpu/drm/i915/intel_device_info.c    | 2 +-
 4 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 51cad1aefa5f..b1c7e9b010f4 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -382,7 +382,7 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
 
 static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
 {
-	if (IS_ROCKETLAKE(i915))
+	if (HAS_D12_PLANE_MINIMIZATION(i915))
 		return BIT(PLANE_SPRITE2) | BIT(PLANE_SPRITE3);
 	else
 		return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f684147290cb..18890d1ea57a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1783,6 +1783,9 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
 #define INTEL_DISPLAY_ENABLED(dev_priv) \
 	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
 
+#define HAS_D12_PLANE_MINIMIZATION(dev_priv) (IS_ROCKETLAKE(dev_priv) || \
+					      IS_ALDERLAKE_S(dev_priv))
+
 static inline bool run_as_guest(void)
 {
 	return !hypervisor_is_type(X86_HYPER_NATIVE);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 9665cd9742a6..352cd2260f55 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2289,7 +2289,7 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
 
 static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 {
-	if (IS_ROCKETLAKE(dev_priv))
+	if (HAS_D12_PLANE_MINIMIZATION(dev_priv))
 		return RKL_DE_PIPE_IRQ_FAULT_ERRORS;
 	else if (INTEL_GEN(dev_priv) >= 11)
 		return GEN11_DE_PIPE_IRQ_FAULT_ERRORS;
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 7d98a718a051..85d6883745d8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -261,7 +261,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 
 	BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);
 
-	if (IS_ROCKETLAKE(dev_priv))
+	if (HAS_D12_PLANE_MINIMIZATION(dev_priv))
 		for_each_pipe(dev_priv, pipe)
 			runtime->num_sprites[pipe] = 4;
 	else if (INTEL_GEN(dev_priv) >= 11)
-- 
2.27.0

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  parent reply	other threads:[~2021-01-29 18:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-29 18:29 [Intel-gfx] [PATCH 0/8] Final set of patches for ADLS enabling Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 1/8] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 2/8] drm/i915/adl_s: Add power wells Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 3/8] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2021-01-29 18:29 ` Aditya Swarup [this message]
2021-01-29 18:29 ` [Intel-gfx] [PATCH 5/8] drm/i915/adl_s: Load DMC Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 6/8] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2021-01-29 18:29 ` [Intel-gfx] [PATCH 7/8] drm/i915/adl_s: Add display WAs for ADL-S Aditya Swarup
2021-01-29 18:54   ` Souza, Jose
2021-01-29 18:29 ` [Intel-gfx] [PATCH 8/8] drm/i915/adl_s: Add GT and CTX " Aditya Swarup
2021-01-29 19:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling (rev3) Patchwork
2021-01-29 19:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-29 19:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-30  1:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-01-30 17:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Final set of patches for ADLS enabling (rev4) Patchwork
2021-01-30 17:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-30 17:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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