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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 8/9] drm/i915/xelpd: Add Pipe Color Lut caps to platform config
Date: Tue,  1 Jun 2021 16:11:34 +0530	[thread overview]
Message-ID: <20210601104135.29020-9-uma.shankar@intel.com> (raw)
In-Reply-To: <20210601104135.29020-1-uma.shankar@intel.com>

XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
extended range. It has 511 entries for gamma with additional 2 entries
for extended range.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 97c98f4fb265..844d08e37ec5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -947,7 +947,8 @@ static const struct intel_device_info adl_s_info = {
 	.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |	\
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_D),			\
 	.dbuf.size = 4096,						\
-	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4)
+	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4), \
+	.color = { .degamma_lut_size = 128, .gamma_lut_size = 513 }
 
 static const struct intel_device_info adl_p_info = {
 	GEN12_FEATURES,
-- 
2.26.2

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  parent reply	other threads:[~2021-06-01 10:06 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 10:41 [Intel-gfx] [PATCH 0/9] Enhance pipe color support for multi segmented luts Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 1/9] drm: Add gamma mode property Uma Shankar
2021-06-02  9:09   ` Pekka Paalanen
2021-06-02 20:18     ` Shankar, Uma
2021-06-03  8:05       ` Pekka Paalanen
2021-06-01 10:41 ` [Intel-gfx] [PATCH 2/9] drm/i915/xelpd: Define color lut range structure Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 3/9] drm/i915/xelpd: Add support for Logarithmic gamma mode Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 4/9] drm/i915/xelpd: Attach gamma mode property Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 5/9] drm: Add Client Cap for advance gamma mode Uma Shankar
2021-06-02  2:53   ` kernel test robot
2021-06-02  9:03   ` Pekka Paalanen
2021-06-02 20:08     ` Shankar, Uma
2021-06-01 10:41 ` [Intel-gfx] [PATCH 6/9] drm/i915/xelpd: logarithmic gamma enabled only with " Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 7/9] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
2021-06-01 10:41 ` Uma Shankar [this message]
2021-06-01 10:41 ` [Intel-gfx] [PATCH 9/9] drm/i915/xelpd: Enable XE_LPD Gamma Lut readout Uma Shankar
2021-06-01 12:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enhance pipe color support for multi segmented luts Patchwork
2021-06-01 13:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-01 17:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-06-04 18:51 ` [Intel-gfx] [PATCH 0/9] " Harry Wentland
2021-06-07  7:29   ` Pekka Paalanen
2021-06-07 18:07     ` Shankar, Uma
2021-06-08  7:59       ` Pekka Paalanen
2021-06-07 18:01   ` Shankar, Uma
2021-06-07 21:00     ` Harry Wentland

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