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From: Pekka Paalanen <ppaalanen@gmail.com>
To: Uma Shankar <uma.shankar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/9] drm: Add gamma mode property
Date: Wed, 2 Jun 2021 12:09:57 +0300	[thread overview]
Message-ID: <20210602120957.7a154640@eldfell> (raw)
In-Reply-To: <20210601104135.29020-2-uma.shankar@intel.com>


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On Tue,  1 Jun 2021 16:11:27 +0530
Uma Shankar <uma.shankar@intel.com> wrote:

> Add a gamma mode property to enable various kind of
> gamma modes supported by platforms like: Interpolated, Split,
> Multi Segmented, Logarithmic etc. Userspace can get this property
> and should be able to get the platform capabilities wrt various
> gamma modes possible and the possible ranges.
> 
> It can select one of the modes exposed as blob_id as an
> enum and set the respective mode.
> 
> It can then create the LUT and send it to driver using
> already available GAMMA_LUT property as blob.
> 
> Note: This is based on design by Ville and is being carried forward
> based on his original idea.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/drm_atomic_uapi.c |  5 +++
>  drivers/gpu/drm/drm_color_mgmt.c  | 75 +++++++++++++++++++++++++++++++
>  include/drm/drm_color_mgmt.h      |  8 ++++
>  include/drm/drm_crtc.h            | 14 ++++++
>  include/uapi/drm/drm_mode.h       | 43 ++++++++++++++++++
>  5 files changed, 145 insertions(+)
> 

...

> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 13eeba2a750a..b1eead03ebe8 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -262,6 +262,13 @@ struct drm_crtc_state {
>  	 */
>  	struct drm_property_blob *mode_blob;
>  
> +	/**
> +	 * @gamma_mode: This is a blob_id and exposes the platform capabilities
> +	 * wrt to various gamma modes and the respective lut ranges. This also
> +	 * helps user select a gamma mode amongst the supported ones.
> +	 */
> +	u32 gamma_mode;
> +
>  	/**
>  	 * @degamma_lut:
>  	 *
> @@ -1096,6 +1103,13 @@ struct drm_crtc {
>  	 */
>  	struct drm_property *scaling_filter_property;
>  
> +	/**
> +	 * @gamma_mode_property: Optional CRTC property to enumerate and
> +	 * select the mode of the crtc gamma/degmama LUTs. This also exposes
> +	 * the lut ranges of the various supported gamma modes to userspace.
> +	 */
> +	struct drm_property *gamma_mode_property;
> +
>  	/**
>  	 * @state:
>  	 *
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 9b6722d45f36..d7758d351936 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -819,6 +819,49 @@ struct hdr_output_metadata {
>  	};
>  };
>  
> +/*
> + * DRM_MODE_LUT_GAMMA|DRM_MODE_LUT_DEGAMMA is legal and means the LUT
> + * can be used for either purpose, but not simultaneously. To expose
> + * modes that support gamma and degamma simultaneously the gamma mode
> + * must declare distinct DRM_MODE_LUT_GAMMA and DRM_MODE_LUT_DEGAMMA
> + * ranges.
> + */
> +/* LUT is for gamma (after CTM) */
> +#define DRM_MODE_LUT_GAMMA BIT(0)
> +/* LUT is for degamma (before CTM) */
> +#define DRM_MODE_LUT_DEGAMMA BIT(1)
> +/* linearly interpolate between the points */
> +#define DRM_MODE_LUT_INTERPOLATE BIT(2)
> +/*
> + * the last value of the previous range is the
> + * first value of the current range.
> + */
> +#define DRM_MODE_LUT_REUSE_LAST BIT(3)
> +/* the curve must be non-decreasing */
> +#define DRM_MODE_LUT_NON_DECREASING BIT(4)
> +/* the curve is reflected across origin for negative inputs */
> +#define DRM_MODE_LUT_REFLECT_NEGATIVE BIT(5)
> +/* the same curve (red) is used for blue and green channels as well */
> +#define DRM_MODE_LUT_SINGLE_CHANNEL BIT(6)
> +
> +struct drm_color_lut_range {
> +	/* DRM_MODE_LUT_* */
> +	__u32 flags;
> +	/* number of points on the curve */
> +	__u16 count;
> +	/* input/output bits per component */
> +	__u8 input_bpc, output_bpc;
> +	/* input start/end values */
> +	__s32 start, end;
> +	/* output min/max values */
> +	__s32 min, max;
> +};
> +
> +enum lut_type {
> +	LUT_TYPE_DEGAMMA = 0,
> +	LUT_TYPE_GAMMA = 1,
> +};
> +
>  #define DRM_MODE_PAGE_FLIP_EVENT 0x01
>  #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
>  #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4

Hi,

where is the UAPI documentation for this new GAMMA_MODE?

As a userspace dev, I have no idea what to do with the above based on
what's written here.

Also, reading the description of DRM_CLIENT_CAP_ADVANCE_GAMMA_MODES in
patch 5/9, what difference does it make whether userspace sets or does
not set that cap? I don't understand the implications from the
description.


Thanks,
pq

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  reply	other threads:[~2021-06-02  9:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 10:41 [Intel-gfx] [PATCH 0/9] Enhance pipe color support for multi segmented luts Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 1/9] drm: Add gamma mode property Uma Shankar
2021-06-02  9:09   ` Pekka Paalanen [this message]
2021-06-02 20:18     ` Shankar, Uma
2021-06-03  8:05       ` Pekka Paalanen
2021-06-01 10:41 ` [Intel-gfx] [PATCH 2/9] drm/i915/xelpd: Define color lut range structure Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 3/9] drm/i915/xelpd: Add support for Logarithmic gamma mode Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 4/9] drm/i915/xelpd: Attach gamma mode property Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 5/9] drm: Add Client Cap for advance gamma mode Uma Shankar
2021-06-02  2:53   ` kernel test robot
2021-06-02  9:03   ` Pekka Paalanen
2021-06-02 20:08     ` Shankar, Uma
2021-06-01 10:41 ` [Intel-gfx] [PATCH 6/9] drm/i915/xelpd: logarithmic gamma enabled only with " Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 7/9] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 8/9] drm/i915/xelpd: Add Pipe Color Lut caps to platform config Uma Shankar
2021-06-01 10:41 ` [Intel-gfx] [PATCH 9/9] drm/i915/xelpd: Enable XE_LPD Gamma Lut readout Uma Shankar
2021-06-01 12:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enhance pipe color support for multi segmented luts Patchwork
2021-06-01 13:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-01 17:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-06-04 18:51 ` [Intel-gfx] [PATCH 0/9] " Harry Wentland
2021-06-07  7:29   ` Pekka Paalanen
2021-06-07 18:07     ` Shankar, Uma
2021-06-08  7:59       ` Pekka Paalanen
2021-06-07 18:01   ` Shankar, Uma
2021-06-07 21:00     ` Harry Wentland

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