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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v2 02/17] drm/i915: Introduce hsw_get_buf_trans()
Date: Tue,  8 Jun 2021 10:35:48 +0300	[thread overview]
Message-ID: <20210608073603.2408-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210608073603.2408-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

All the other platforms handle the output_type stuff in their
*_get_buf_trans() functions. Do the same for hsw/bdw/skl.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 27 ++++--------
 .../drm/i915/display/intel_ddi_buf_trans.c    | 43 +++++++++++++------
 .../drm/i915/display/intel_ddi_buf_trans.h    | 10 ++---
 drivers/gpu/drm/i915/display/intel_fdi.c      |  2 +-
 4 files changed, 43 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 107e4903b697..33e94030090f 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -104,12 +104,10 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
 	enum port port = encoder->port;
 	const struct hsw_ddi_buf_trans *ddi_translations;
 
-	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
-		ddi_translations = hsw_ddi_get_buf_trans_fdi(dev_priv, &n_entries);
-	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
-		ddi_translations = hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
-	else
-		ddi_translations = hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
+	ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries);
+
+	if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
+		return;
 
 	/* If we're boosting the current, set bit 31 of trans1 */
 	if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
@@ -130,6 +128,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
  * HDMI/DVI use cases.
  */
 static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
+					 const struct intel_crtc_state *crtc_state,
 					 int level)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -138,7 +137,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
 	enum port port = encoder->port;
 	const struct hsw_ddi_buf_trans *ddi_translations;
 
-	ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
+	ddi_translations = hsw_get_buf_trans(encoder, crtc_state,  &n_entries);
 
 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
 		return;
@@ -948,12 +947,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
 		const struct hsw_ddi_buf_trans *ddi_translations;
 		int n_entries;
 
-		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
-			ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
-		else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
-			ddi_translations = hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
-		else
-			ddi_translations = hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
+		ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries);
 
 		if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
 			return;
@@ -1027,10 +1021,7 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
 	} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
 		bxt_get_buf_trans(encoder, crtc_state, &n_entries);
 	} else {
-		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
-			hsw_ddi_get_buf_trans_edp(encoder, &n_entries);
-		else
-			hsw_ddi_get_buf_trans_dp(encoder, &n_entries);
+		hsw_get_buf_trans(encoder, crtc_state, &n_entries);
 	}
 
 	if (drm_WARN_ON(&dev_priv->drm, n_entries < 1))
@@ -3146,7 +3137,7 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,
 	else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
 		bxt_ddi_vswing_sequence(encoder, crtc_state, level);
 	else
-		hsw_prepare_hdmi_ddi_buffers(encoder, level);
+		hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
 
 	if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
 		skl_ddi_set_iboost(encoder, crtc_state, level);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index e8e46d7a6cef..f7b7178363e8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -875,8 +875,8 @@ static int skl_buf_trans_num_entries(enum port port, int n_entries)
 		return min(n_entries, 9);
 }
 
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
+static const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -904,8 +904,8 @@ hsw_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 	return NULL;
 }
 
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
+static const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -925,10 +925,12 @@ hsw_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 	return NULL;
 }
 
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv,
-			  int *n_entries)
+static const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans_fdi(struct intel_encoder *encoder,
+		      int *n_entries)
 {
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
 	if (IS_BROADWELL(dev_priv)) {
 		*n_entries = ARRAY_SIZE(bdw_ddi_translations_fdi);
 		return bdw_ddi_translations_fdi;
@@ -941,9 +943,9 @@ hsw_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv,
 	return NULL;
 }
 
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_hdmi(struct intel_encoder *encoder,
-			   int *n_entries)
+static const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans_hdmi(struct intel_encoder *encoder,
+		       int *n_entries)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
@@ -961,6 +963,21 @@ hsw_ddi_get_buf_trans_hdmi(struct intel_encoder *encoder,
 	return NULL;
 }
 
+const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans(struct intel_encoder *encoder,
+		  const struct intel_crtc_state *crtc_state,
+		  int *n_entries)
+{
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
+		return hsw_get_buf_trans_fdi(encoder, n_entries);
+	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+		return hsw_get_buf_trans_hdmi(encoder, n_entries);
+	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
+		return hsw_get_buf_trans_edp(encoder, n_entries);
+	else
+		return hsw_get_buf_trans_dp(encoder, n_entries);
+}
+
 static const struct bxt_ddi_buf_trans *
 bxt_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 {
@@ -1427,13 +1444,13 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
 		bxt_get_buf_trans_hdmi(encoder, &n_entries);
 		*default_entry = n_entries - 1;
 	} else if (DISPLAY_VER(dev_priv) == 9) {
-		hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
+		hsw_get_buf_trans_hdmi(encoder, &n_entries);
 		*default_entry = 8;
 	} else if (IS_BROADWELL(dev_priv)) {
-		hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
+		hsw_get_buf_trans_hdmi(encoder, &n_entries);
 		*default_entry = 7;
 	} else if (IS_HASWELL(dev_priv)) {
-		hsw_ddi_get_buf_trans_hdmi(encoder, &n_entries);
+		hsw_get_buf_trans_hdmi(encoder, &n_entries);
 		*default_entry = 6;
 	} else {
 		drm_WARN(&dev_priv->drm, 1, "ddi translation table missing\n");
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 1b8d3ef7f06f..428f1f343341 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -52,13 +52,9 @@ int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
 			       int *default_entry);
 
 const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries);
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv, int *n_entries);
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries);
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries);
+hsw_get_buf_trans(struct intel_encoder *encoder,
+		  const struct intel_crtc_state *crtc_state,
+		  int *n_entries);
 
 const struct bxt_ddi_buf_trans *
 bxt_get_buf_trans(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index a806e1b83613..c602ed17c4fb 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -569,7 +569,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
 	u32 temp, i, rx_ctl_val;
 	int n_entries;
 
-	hsw_ddi_get_buf_trans_fdi(dev_priv, &n_entries);
+	hsw_get_buf_trans(encoder, crtc_state, &n_entries);
 
 	hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
 
-- 
2.31.1

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  parent reply	other threads:[~2021-06-08  7:36 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  7:35 [Intel-gfx] [PATCH v2 00/17] drm/i915: DDI buf trans cleaup and fixes Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans Ville Syrjala
2021-06-08  7:35 ` Ville Syrjala [this message]
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 03/17] drm/i915: Wrap the platform specific buf trans structs into a union Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: Rename dkl phy buf trans tables Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 05/17] drm/i915: Wrap the buf trans tables into a struct Ville Syrjala
2021-06-18 12:05   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 06/17] drm/i915: Introduce intel_get_buf_trans() Ville Syrjala
2021-06-18 12:08   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 07/17] drm/i915; Return the whole buf_trans struct from get_buf_trans() Ville Syrjala
2021-06-18 12:11   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 08/17] drm/i915: Store the HDMI default entry in the bug trans struct Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 09/17] drm/i915: Introduce encoder->get_buf_trans() Ville Syrjala
2021-06-18 12:19   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 10/17] drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 11/17] drm/i915: Introduce rkl_get_combo_buf_trans() Ville Syrjala
2021-06-18 12:22   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 12/17] drm/i915: Fix dg1 buf trans tables Ville Syrjala
2021-06-18 12:28   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table Ville Syrjala
2021-06-18 12:30   ` Jani Nikula
2021-06-23 12:55     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 14/17] drm/i915: Fix ehl edp hbr2 vswing table Ville Syrjala
2021-06-23 14:02   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 15/17] drm/i915: Clean up jsl/ehl buf trans functions Ville Syrjala
2021-06-23 14:13   ` Jani Nikula
2021-06-24 17:05     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 16/17] drm/i915: Nuke buf_trans hdmi functions Ville Syrjala
2021-06-23 14:14   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 17/17] drm/i915: Add the missing adls vswing tables Ville Syrjala
2021-06-23 14:36   ` Jani Nikula
2021-06-08  8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DDI buf trans cleaup and fixes (rev4) Patchwork
2021-06-08  8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-08 13:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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