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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v2 06/17] drm/i915: Introduce intel_get_buf_trans()
Date: Tue,  8 Jun 2021 10:35:52 +0300	[thread overview]
Message-ID: <20210608073603.2408-7-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210608073603.2408-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a small helper to get the buf trans entris+num_entries
from the struct. Should avoid copy-paste errors in the
platform specific get_buf_trans() functions.

@@
identifier T, N;
@@
- *N = T.num_entries;
- return T.entries;
+ return intel_get_buf_trans(&T, N);

@@
@@
is_hobl_buf_trans(...) { ... }
+
+ static const union intel_ddi_buf_trans_entry *
+ intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries)
+ {
+	*num_entries = ddi_translations->num_entries;
+	return ddi_translations->entries;
+ }

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 253 +++++++++---------
 1 file changed, 129 insertions(+), 124 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 5e18056780a8..3149b01aaca7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1032,17 +1032,24 @@ bool is_hobl_buf_trans(const union intel_ddi_buf_trans_entry *table)
 	return table == tgl_combo_phy_ddi_translations_edp_hbr2_hobl.entries;
 }
 
+static const union intel_ddi_buf_trans_entry *
+intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries)
+{
+	*num_entries = ddi_translations->num_entries;
+	return ddi_translations->entries;
+}
+
 static const union intel_ddi_buf_trans_entry *
 bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (dev_priv->vbt.edp.low_vswing) {
-		*n_entries = bdw_ddi_translations_edp.num_entries;
-		return bdw_ddi_translations_edp.entries;
+		return intel_get_buf_trans(&bdw_ddi_translations_edp,
+					   n_entries);
 	} else {
-		*n_entries = bdw_ddi_translations_dp.num_entries;
-		return bdw_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&bdw_ddi_translations_dp,
+					   n_entries);
 	}
 }
 
@@ -1052,14 +1059,14 @@ skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (IS_SKL_ULX(dev_priv)) {
-		*n_entries = skl_y_ddi_translations_dp.num_entries;
-		return skl_y_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&skl_y_ddi_translations_dp,
+					   n_entries);
 	} else if (IS_SKL_ULT(dev_priv)) {
-		*n_entries = skl_u_ddi_translations_dp.num_entries;
-		return skl_u_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&skl_u_ddi_translations_dp,
+					   n_entries);
 	} else {
-		*n_entries = skl_ddi_translations_dp.num_entries;
-		return skl_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&skl_ddi_translations_dp,
+					   n_entries);
 	}
 }
 
@@ -1071,16 +1078,16 @@ kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 	if (IS_KBL_ULX(dev_priv) ||
 	    IS_CFL_ULX(dev_priv) ||
 	    IS_CML_ULX(dev_priv)) {
-		*n_entries = kbl_y_ddi_translations_dp.num_entries;
-		return kbl_y_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&kbl_y_ddi_translations_dp,
+					   n_entries);
 	} else if (IS_KBL_ULT(dev_priv) ||
 		   IS_CFL_ULT(dev_priv) ||
 		   IS_CML_ULT(dev_priv)) {
-		*n_entries = kbl_u_ddi_translations_dp.num_entries;
-		return kbl_u_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&kbl_u_ddi_translations_dp,
+					   n_entries);
 	} else {
-		*n_entries = kbl_ddi_translations_dp.num_entries;
-		return kbl_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&kbl_ddi_translations_dp,
+					   n_entries);
 	}
 }
 
@@ -1094,17 +1101,17 @@ skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 		    IS_KBL_ULX(dev_priv) ||
 		    IS_CFL_ULX(dev_priv) ||
 		    IS_CML_ULX(dev_priv)) {
-			*n_entries = skl_y_ddi_translations_edp.num_entries;
-			return skl_y_ddi_translations_edp.entries;
+			return intel_get_buf_trans(&skl_y_ddi_translations_edp,
+						   n_entries);
 		} else if (IS_SKL_ULT(dev_priv) ||
 			   IS_KBL_ULT(dev_priv) ||
 			   IS_CFL_ULT(dev_priv) ||
 			   IS_CML_ULT(dev_priv)) {
-			*n_entries = skl_u_ddi_translations_edp.num_entries;
-			return skl_u_ddi_translations_edp.entries;
+			return intel_get_buf_trans(&skl_u_ddi_translations_edp,
+						   n_entries);
 		} else {
-			*n_entries = skl_ddi_translations_edp.num_entries;
-			return skl_ddi_translations_edp.entries;
+			return intel_get_buf_trans(&skl_ddi_translations_edp,
+						   n_entries);
 		}
 	}
 
@@ -1123,11 +1130,11 @@ skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries)
 	    IS_KBL_ULX(dev_priv) ||
 	    IS_CFL_ULX(dev_priv) ||
 	    IS_CML_ULX(dev_priv)) {
-		*n_entries = skl_y_ddi_translations_hdmi.num_entries;
-		return skl_y_ddi_translations_hdmi.entries;
+		return intel_get_buf_trans(&skl_y_ddi_translations_hdmi,
+					   n_entries);
 	} else {
-		*n_entries = skl_ddi_translations_hdmi.num_entries;
-		return skl_ddi_translations_hdmi.entries;
+		return intel_get_buf_trans(&skl_ddi_translations_hdmi,
+					   n_entries);
 	}
 }
 
@@ -1158,11 +1165,11 @@ hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 		*n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries);
 		return ddi_translations;
 	} else if (IS_BROADWELL(dev_priv)) {
-		*n_entries = bdw_ddi_translations_dp.num_entries;
-		return  bdw_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&bdw_ddi_translations_dp,
+					   n_entries);
 	} else if (IS_HASWELL(dev_priv)) {
-		*n_entries = hsw_ddi_translations_dp.num_entries;
-		return hsw_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&hsw_ddi_translations_dp,
+					   n_entries);
 	}
 
 	*n_entries = 0;
@@ -1182,8 +1189,8 @@ hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 	} else if (IS_BROADWELL(dev_priv)) {
 		return bdw_get_buf_trans_edp(encoder, n_entries);
 	} else if (IS_HASWELL(dev_priv)) {
-		*n_entries = hsw_ddi_translations_dp.num_entries;
-		return hsw_ddi_translations_dp.entries;
+		return intel_get_buf_trans(&hsw_ddi_translations_dp,
+					   n_entries);
 	}
 
 	*n_entries = 0;
@@ -1197,11 +1204,11 @@ hsw_get_buf_trans_fdi(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (IS_BROADWELL(dev_priv)) {
-		*n_entries = bdw_ddi_translations_fdi.num_entries;
-		return bdw_ddi_translations_fdi.entries;
+		return intel_get_buf_trans(&bdw_ddi_translations_fdi,
+					   n_entries);
 	} else if (IS_HASWELL(dev_priv)) {
-		*n_entries = hsw_ddi_translations_fdi.num_entries;
-		return hsw_ddi_translations_fdi.entries;
+		return intel_get_buf_trans(&hsw_ddi_translations_fdi,
+					   n_entries);
 	}
 
 	*n_entries = 0;
@@ -1217,11 +1224,11 @@ hsw_get_buf_trans_hdmi(struct intel_encoder *encoder,
 	if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) {
 		return skl_get_buf_trans_hdmi(dev_priv, n_entries);
 	} else if (IS_BROADWELL(dev_priv)) {
-		*n_entries = bdw_ddi_translations_hdmi.num_entries;
-		return bdw_ddi_translations_hdmi.entries;
+		return intel_get_buf_trans(&bdw_ddi_translations_hdmi,
+					   n_entries);
 	} else if (IS_HASWELL(dev_priv)) {
-		*n_entries = hsw_ddi_translations_hdmi.num_entries;
-		return hsw_ddi_translations_hdmi.entries;
+		return intel_get_buf_trans(&hsw_ddi_translations_hdmi,
+					   n_entries);
 	}
 
 	*n_entries = 0;
@@ -1246,8 +1253,7 @@ hsw_get_buf_trans(struct intel_encoder *encoder,
 static const union intel_ddi_buf_trans_entry *
 bxt_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 {
-	*n_entries = bxt_ddi_translations_dp.num_entries;
-	return bxt_ddi_translations_dp.entries;
+	return intel_get_buf_trans(&bxt_ddi_translations_dp, n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1256,8 +1262,8 @@ bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (dev_priv->vbt.edp.low_vswing) {
-		*n_entries = bxt_ddi_translations_edp.num_entries;
-		return bxt_ddi_translations_edp.entries;
+		return intel_get_buf_trans(&bxt_ddi_translations_edp,
+					   n_entries);
 	}
 
 	return bxt_get_buf_trans_dp(encoder, n_entries);
@@ -1266,8 +1272,7 @@ bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 static const union intel_ddi_buf_trans_entry *
 bxt_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries)
 {
-	*n_entries = bxt_ddi_translations_hdmi.num_entries;
-	return bxt_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&bxt_ddi_translations_hdmi, n_entries);
 }
 
 const union intel_ddi_buf_trans_entry *
@@ -1289,14 +1294,14 @@ cnl_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries)
 	u32 voltage = intel_de_read(dev_priv, CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
 
 	if (voltage == VOLTAGE_INFO_0_85V) {
-		*n_entries = cnl_ddi_translations_hdmi_0_85V.num_entries;
-		return cnl_ddi_translations_hdmi_0_85V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_hdmi_0_85V,
+					   n_entries);
 	} else if (voltage == VOLTAGE_INFO_0_95V) {
-		*n_entries = cnl_ddi_translations_hdmi_0_95V.num_entries;
-		return cnl_ddi_translations_hdmi_0_95V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_hdmi_0_95V,
+					   n_entries);
 	} else if (voltage == VOLTAGE_INFO_1_05V) {
-		*n_entries = cnl_ddi_translations_hdmi_1_05V.num_entries;
-		return cnl_ddi_translations_hdmi_1_05V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_hdmi_1_05V,
+					   n_entries);
 	} else {
 		*n_entries = 1; /* shut up gcc */
 		MISSING_CASE(voltage);
@@ -1311,14 +1316,14 @@ cnl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
 	u32 voltage = intel_de_read(dev_priv, CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
 
 	if (voltage == VOLTAGE_INFO_0_85V) {
-		*n_entries = cnl_ddi_translations_dp_0_85V.num_entries;
-		return cnl_ddi_translations_dp_0_85V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_dp_0_85V,
+					   n_entries);
 	} else if (voltage == VOLTAGE_INFO_0_95V) {
-		*n_entries = cnl_ddi_translations_dp_0_95V.num_entries;
-		return cnl_ddi_translations_dp_0_95V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_dp_0_95V,
+					   n_entries);
 	} else if (voltage == VOLTAGE_INFO_1_05V) {
-		*n_entries = cnl_ddi_translations_dp_1_05V.num_entries;
-		return cnl_ddi_translations_dp_1_05V.entries;
+		return intel_get_buf_trans(&cnl_ddi_translations_dp_1_05V,
+					   n_entries);
 	} else {
 		*n_entries = 1; /* shut up gcc */
 		MISSING_CASE(voltage);
@@ -1334,14 +1339,14 @@ cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
 
 	if (dev_priv->vbt.edp.low_vswing) {
 		if (voltage == VOLTAGE_INFO_0_85V) {
-			*n_entries = cnl_ddi_translations_edp_0_85V.num_entries;
-			return cnl_ddi_translations_edp_0_85V.entries;
+			return intel_get_buf_trans(&cnl_ddi_translations_edp_0_85V,
+						   n_entries);
 		} else if (voltage == VOLTAGE_INFO_0_95V) {
-			*n_entries = cnl_ddi_translations_edp_0_95V.num_entries;
-			return cnl_ddi_translations_edp_0_95V.entries;
+			return intel_get_buf_trans(&cnl_ddi_translations_edp_0_95V,
+						   n_entries);
 		} else if (voltage == VOLTAGE_INFO_1_05V) {
-			*n_entries = cnl_ddi_translations_edp_1_05V.num_entries;
-			return cnl_ddi_translations_edp_1_05V.entries;
+			return intel_get_buf_trans(&cnl_ddi_translations_edp_1_05V,
+						   n_entries);
 		} else {
 			*n_entries = 1; /* shut up gcc */
 			MISSING_CASE(voltage);
@@ -1369,8 +1374,8 @@ icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_hdmi.num_entries;
-	return icl_combo_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1378,8 +1383,8 @@ icl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
 			   const struct intel_crtc_state *crtc_state,
 			   int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_dp_hbr2.num_entries;
-	return icl_combo_phy_ddi_translations_dp_hbr2.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1390,17 +1395,17 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (crtc_state->port_clock > 540000) {
-		*n_entries = icl_combo_phy_ddi_translations_edp_hbr3.num_entries;
-		return icl_combo_phy_ddi_translations_edp_hbr3.entries;
+		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3,
+					   n_entries);
 	} else if (dev_priv->vbt.edp.low_vswing) {
-		*n_entries = icl_combo_phy_ddi_translations_edp_hbr2.num_entries;
-		return icl_combo_phy_ddi_translations_edp_hbr2.entries;
+		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
+					   n_entries);
 	} else if (IS_DG1(dev_priv) && crtc_state->port_clock > 270000) {
-		*n_entries = dg1_combo_phy_ddi_translations_dp_hbr2_hbr3.num_entries;
-		return dg1_combo_phy_ddi_translations_dp_hbr2_hbr3.entries;
+		return intel_get_buf_trans(&dg1_combo_phy_ddi_translations_dp_hbr2_hbr3,
+					   n_entries);
 	} else if (IS_DG1(dev_priv)) {
-		*n_entries = dg1_combo_phy_ddi_translations_dp_rbr_hbr.num_entries;
-		return dg1_combo_phy_ddi_translations_dp_rbr_hbr.entries;
+		return intel_get_buf_trans(&dg1_combo_phy_ddi_translations_dp_rbr_hbr,
+					   n_entries);
 	}
 
 	return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
@@ -1424,8 +1429,8 @@ icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder,
 			  const struct intel_crtc_state *crtc_state,
 			  int *n_entries)
 {
-	*n_entries = icl_mg_phy_ddi_translations_hdmi.num_entries;
-	return icl_mg_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&icl_mg_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1434,11 +1439,11 @@ icl_get_mg_buf_trans_dp(struct intel_encoder *encoder,
 			int *n_entries)
 {
 	if (crtc_state->port_clock > 270000) {
-		*n_entries = icl_mg_phy_ddi_translations_hbr2_hbr3.num_entries;
-		return icl_mg_phy_ddi_translations_hbr2_hbr3.entries;
+		return intel_get_buf_trans(&icl_mg_phy_ddi_translations_hbr2_hbr3,
+					   n_entries);
 	} else {
-		*n_entries = icl_mg_phy_ddi_translations_rbr_hbr.num_entries;
-		return icl_mg_phy_ddi_translations_rbr_hbr.entries;
+		return intel_get_buf_trans(&icl_mg_phy_ddi_translations_rbr_hbr,
+					   n_entries);
 	}
 }
 
@@ -1458,8 +1463,8 @@ ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_hdmi.num_entries;
-	return icl_combo_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1467,8 +1472,8 @@ ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
 			   const struct intel_crtc_state *crtc_state,
 			   int *n_entries)
 {
-	*n_entries = ehl_combo_phy_ddi_translations_dp.num_entries;
-	return ehl_combo_phy_ddi_translations_dp.entries;
+	return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_dp,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1479,8 +1484,8 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
 	if (dev_priv->vbt.edp.low_vswing) {
-		*n_entries = icl_combo_phy_ddi_translations_edp_hbr2.num_entries;
-		return icl_combo_phy_ddi_translations_edp_hbr2.entries;
+		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
+					   n_entries);
 	}
 
 	return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
@@ -1504,8 +1509,8 @@ jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_hdmi.num_entries;
-	return icl_combo_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1513,8 +1518,8 @@ jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
 			   const struct intel_crtc_state *crtc_state,
 			   int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_dp_hbr2.num_entries;
-	return icl_combo_phy_ddi_translations_dp_hbr2.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1526,11 +1531,11 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
 
 	if (dev_priv->vbt.edp.low_vswing) {
 		if (crtc_state->port_clock > 270000) {
-			*n_entries = jsl_combo_phy_ddi_translations_edp_hbr2.num_entries;
-			return jsl_combo_phy_ddi_translations_edp_hbr2.entries;
+			return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr2,
+						   n_entries);
 		} else {
-			*n_entries = jsl_combo_phy_ddi_translations_edp_hbr.num_entries;
-			return jsl_combo_phy_ddi_translations_edp_hbr.entries;
+			return intel_get_buf_trans(&jsl_combo_phy_ddi_translations_edp_hbr,
+						   n_entries);
 		}
 	}
 
@@ -1555,8 +1560,8 @@ tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state,
 			     int *n_entries)
 {
-	*n_entries = icl_combo_phy_ddi_translations_hdmi.num_entries;
-	return icl_combo_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1568,22 +1573,22 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
 
 	if (crtc_state->port_clock > 270000) {
 		if (IS_ROCKETLAKE(dev_priv)) {
-			*n_entries = rkl_combo_phy_ddi_translations_dp_hbr2_hbr3.num_entries;
-			return rkl_combo_phy_ddi_translations_dp_hbr2_hbr3.entries;
+			return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr2_hbr3,
+						   n_entries);
 		} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
-			*n_entries = tgl_uy_combo_phy_ddi_translations_dp_hbr2.num_entries;
-			return tgl_uy_combo_phy_ddi_translations_dp_hbr2.entries;
+			return intel_get_buf_trans(&tgl_uy_combo_phy_ddi_translations_dp_hbr2,
+						   n_entries);
 		} else {
-			*n_entries = tgl_combo_phy_ddi_translations_dp_hbr2.num_entries;
-			return tgl_combo_phy_ddi_translations_dp_hbr2.entries;
+			return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_dp_hbr2,
+						   n_entries);
 		}
 	} else {
 		if (IS_ROCKETLAKE(dev_priv)) {
-			*n_entries = rkl_combo_phy_ddi_translations_dp_hbr.num_entries;
-			return rkl_combo_phy_ddi_translations_dp_hbr.entries;
+			return intel_get_buf_trans(&rkl_combo_phy_ddi_translations_dp_hbr,
+						   n_entries);
 		} else {
-			*n_entries = tgl_combo_phy_ddi_translations_dp_hbr.num_entries;
-			return tgl_combo_phy_ddi_translations_dp_hbr.entries;
+			return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_dp_hbr,
+						   n_entries);
 		}
 	}
 }
@@ -1597,14 +1602,14 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 	if (crtc_state->port_clock > 540000) {
-		*n_entries = icl_combo_phy_ddi_translations_edp_hbr3.num_entries;
-		return icl_combo_phy_ddi_translations_edp_hbr3.entries;
+		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3,
+					   n_entries);
 	} else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
-		*n_entries = tgl_combo_phy_ddi_translations_edp_hbr2_hobl.num_entries;
-		return tgl_combo_phy_ddi_translations_edp_hbr2_hobl.entries;
+		return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,
+					   n_entries);
 	} else if (dev_priv->vbt.edp.low_vswing) {
-		*n_entries = icl_combo_phy_ddi_translations_edp_hbr2.num_entries;
-		return icl_combo_phy_ddi_translations_edp_hbr2.entries;
+		return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
+					   n_entries);
 	}
 
 	return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
@@ -1628,8 +1633,8 @@ tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder,
 			   const struct intel_crtc_state *crtc_state,
 			   int *n_entries)
 {
-	*n_entries = tgl_dkl_phy_ddi_translations_hdmi.num_entries;
-	return tgl_dkl_phy_ddi_translations_hdmi.entries;
+	return intel_get_buf_trans(&tgl_dkl_phy_ddi_translations_hdmi,
+				   n_entries);
 }
 
 static const union intel_ddi_buf_trans_entry *
@@ -1638,11 +1643,11 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
 			 int *n_entries)
 {
 	if (crtc_state->port_clock > 270000) {
-		*n_entries = tgl_dkl_phy_ddi_translations_dp_hbr2.num_entries;
-		return tgl_dkl_phy_ddi_translations_dp_hbr2.entries;
+		return intel_get_buf_trans(&tgl_dkl_phy_ddi_translations_dp_hbr2,
+					   n_entries);
 	} else {
-		*n_entries = tgl_dkl_phy_ddi_translations_dp_hbr.num_entries;
-		return tgl_dkl_phy_ddi_translations_dp_hbr.entries;
+		return intel_get_buf_trans(&tgl_dkl_phy_ddi_translations_dp_hbr,
+					   n_entries);
 	}
 }
 
@@ -1663,11 +1668,11 @@ adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
 			  int *n_entries)
 {
 	if (crtc_state->port_clock > 270000) {
-		*n_entries = adlp_dkl_phy_ddi_translations_dp_hbr2_hbr3.num_entries;
-		return adlp_dkl_phy_ddi_translations_dp_hbr2_hbr3.entries;
+		return intel_get_buf_trans(&adlp_dkl_phy_ddi_translations_dp_hbr2_hbr3,
+					   n_entries);
 	} else {
-		*n_entries = adlp_dkl_phy_ddi_translations_dp_hbr.num_entries;
-		return adlp_dkl_phy_ddi_translations_dp_hbr.entries;
+		return intel_get_buf_trans(&adlp_dkl_phy_ddi_translations_dp_hbr,
+					   n_entries);
 	}
 }
 
-- 
2.31.1

_______________________________________________
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  parent reply	other threads:[~2021-06-08  7:36 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  7:35 [Intel-gfx] [PATCH v2 00/17] drm/i915: DDI buf trans cleaup and fixes Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 02/17] drm/i915: Introduce hsw_get_buf_trans() Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 03/17] drm/i915: Wrap the platform specific buf trans structs into a union Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: Rename dkl phy buf trans tables Ville Syrjala
2021-06-18 12:04   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 05/17] drm/i915: Wrap the buf trans tables into a struct Ville Syrjala
2021-06-18 12:05   ` Jani Nikula
2021-06-08  7:35 ` Ville Syrjala [this message]
2021-06-18 12:08   ` [Intel-gfx] [PATCH v2 06/17] drm/i915: Introduce intel_get_buf_trans() Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 07/17] drm/i915; Return the whole buf_trans struct from get_buf_trans() Ville Syrjala
2021-06-18 12:11   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 08/17] drm/i915: Store the HDMI default entry in the bug trans struct Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 09/17] drm/i915: Introduce encoder->get_buf_trans() Ville Syrjala
2021-06-18 12:19   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 10/17] drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs Ville Syrjala
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 11/17] drm/i915: Introduce rkl_get_combo_buf_trans() Ville Syrjala
2021-06-18 12:22   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 12/17] drm/i915: Fix dg1 buf trans tables Ville Syrjala
2021-06-18 12:28   ` Jani Nikula
2021-06-08  7:35 ` [Intel-gfx] [PATCH v2 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table Ville Syrjala
2021-06-18 12:30   ` Jani Nikula
2021-06-23 12:55     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 14/17] drm/i915: Fix ehl edp hbr2 vswing table Ville Syrjala
2021-06-23 14:02   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 15/17] drm/i915: Clean up jsl/ehl buf trans functions Ville Syrjala
2021-06-23 14:13   ` Jani Nikula
2021-06-24 17:05     ` Ville Syrjälä
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 16/17] drm/i915: Nuke buf_trans hdmi functions Ville Syrjala
2021-06-23 14:14   ` Jani Nikula
2021-06-08  7:36 ` [Intel-gfx] [PATCH v2 17/17] drm/i915: Add the missing adls vswing tables Ville Syrjala
2021-06-23 14:36   ` Jani Nikula
2021-06-08  8:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DDI buf trans cleaup and fixes (rev4) Patchwork
2021-06-08  8:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-08  9:15 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2021-06-08 13:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

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