Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: John.C.Harrison@Intel.com
To: Intel-GFX@Lists.FreeDesktop.Org
Cc: DRI-Devel@Lists.FreeDesktop.Org, Matthew Brost <matthew.brost@intel.com>
Subject: [Intel-gfx] [PATCH 6/8] Me: Workaround LMEM blow up
Date: Tue,  7 Sep 2021 18:42:57 -0700	[thread overview]
Message-ID: <20210908014259.50346-7-John.C.Harrison@Intel.com> (raw)
In-Reply-To: <20210908014259.50346-1-John.C.Harrison@Intel.com>

From: Matthew Brost <matthew.brost@intel.com>

---
 drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index b9f66dbd46bb..a61e23deeb00 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1068,7 +1068,7 @@ i915_vma_coredump_create(const struct intel_gt *gt,
 			if (ret)
 				break;
 		}
-	} else if (__i915_gem_object_is_lmem(vma->obj)) {
+	} else if (i915_gem_object_is_lmem(vma->obj)) {
 		struct intel_memory_region *mem = vma->obj->mm.region;
 		dma_addr_t dma;
 
-- 
2.25.1


  parent reply	other threads:[~2021-09-08  1:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-08  1:42 [Intel-gfx] [PATCH 0/8] [CI] Enable GuC submission by default on DG1 John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 1/8] drm/i915: Do not define vma on stack John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 2/8] drm/i915/guc: put all guc objects in lmem when available John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 3/8] drm/i915/guc: Add DG1 GuC / HuC firmware defs John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 4/8] drm/i915/guc: Enable GuC submission by default on DG1 John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 5/8] Me: Allow relocs on DG1 for CI John.C.Harrison
2021-09-08  1:42 ` John.C.Harrison [this message]
2021-09-08  1:42 ` [Intel-gfx] [PATCH 7/8] Me: Dump GuC log to dmesg on SLPC load failure John.C.Harrison
2021-09-08  1:42 ` [Intel-gfx] [PATCH 8/8] drm/i915: Get PM ref before accessing HW register John.C.Harrison
2021-09-08  1:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC submission by default on DG1 (rev3) Patchwork
2021-09-08  1:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-08  2:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-08  7:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-09 16:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC submission by default on DG1 (rev4) Patchwork
2021-09-09 16:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-09 16:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-09 18:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210908014259.50346-7-John.C.Harrison@Intel.com \
    --to=john.c.harrison@intel.com \
    --cc=DRI-Devel@Lists.FreeDesktop.Org \
    --cc=Intel-GFX@Lists.FreeDesktop.Org \
    --cc=matthew.brost@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox