* [Intel-gfx] [PATCH 2/4] amdgpu_ucode: reduce number of pr_debug calls
2021-09-30 1:44 [Intel-gfx] [PATCH 0/4] drm: maintenance patches for 5.15-rcX Jim Cromie
2021-09-30 1:44 ` [Intel-gfx] [PATCH 1/4] drm: fix doc grammar error Jim Cromie
@ 2021-09-30 1:44 ` Jim Cromie
2021-09-30 2:08 ` Joe Perches
2021-09-30 1:44 ` [Intel-gfx] [PATCH 3/4] nouveau: fold multiple DRM_DEBUG_DRIVERs together Jim Cromie
` (4 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Jim Cromie @ 2021-09-30 1:44 UTC (permalink / raw)
To: dri-devel, amd-gfx, intel-gvt-dev, intel-gfx, linux-kernel; +Cc: Jim Cromie
There are blocks of DRM_DEBUG calls, consolidate their args into
single calls. With dynamic-debug in use, each callsite consumes 56
bytes of callsite data, and this patch removes about 65 calls, so
it saves ~3.5kb.
no functional changes.
RFC: this creates multi-line log messages, does that break any syslog
conventions ?
Signed-off-by: Jim Cromie <jim.cromie@gmail.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 293 ++++++++++++----------
1 file changed, 158 insertions(+), 135 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index abd8469380e5..411179142a6e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -30,17 +30,26 @@
static void amdgpu_ucode_print_common_hdr(const struct common_firmware_header *hdr)
{
- DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
- DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
- DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
- DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
- DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
- DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
- DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
- DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
- DRM_DEBUG("ucode_array_offset_bytes: %u\n",
- le32_to_cpu(hdr->ucode_array_offset_bytes));
- DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
+ DRM_DEBUG("size_bytes: %u\n"
+ "header_size_bytes: %u\n"
+ "header_version_major: %u\n"
+ "header_version_minor: %u\n"
+ "ip_version_major: %u\n"
+ "ip_version_minor: %u\n"
+ "ucode_version: 0x%08x\n"
+ "ucode_size_bytes: %u\n"
+ "ucode_array_offset_bytes: %u\n"
+ "crc32: 0x%08x\n",
+ le32_to_cpu(hdr->size_bytes),
+ le32_to_cpu(hdr->header_size_bytes),
+ le16_to_cpu(hdr->header_version_major),
+ le16_to_cpu(hdr->header_version_minor),
+ le16_to_cpu(hdr->ip_version_major),
+ le16_to_cpu(hdr->ip_version_minor),
+ le32_to_cpu(hdr->ucode_version),
+ le32_to_cpu(hdr->ucode_size_bytes),
+ le32_to_cpu(hdr->ucode_array_offset_bytes),
+ le32_to_cpu(hdr->crc32));
}
void amdgpu_ucode_print_mc_hdr(const struct common_firmware_header *hdr)
@@ -55,9 +64,9 @@ void amdgpu_ucode_print_mc_hdr(const struct common_firmware_header *hdr)
const struct mc_firmware_header_v1_0 *mc_hdr =
container_of(hdr, struct mc_firmware_header_v1_0, header);
- DRM_DEBUG("io_debug_size_bytes: %u\n",
- le32_to_cpu(mc_hdr->io_debug_size_bytes));
- DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
+ DRM_DEBUG("io_debug_size_bytes: %u\n"
+ "io_debug_array_offset_bytes: %u\n",
+ le32_to_cpu(mc_hdr->io_debug_size_bytes),
le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
} else {
DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor);
@@ -82,13 +91,17 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
switch (version_minor) {
case 0:
v2_0_hdr = container_of(hdr, struct smc_firmware_header_v2_0, v1_0.header);
- DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_offset_bytes));
- DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_size_bytes));
+ DRM_DEBUG("ppt_offset_bytes: %u\n"
+ "ppt_size_bytes: %u\n",
+ le32_to_cpu(v2_0_hdr->ppt_offset_bytes),
+ le32_to_cpu(v2_0_hdr->ppt_size_bytes));
break;
case 1:
v2_1_hdr = container_of(hdr, struct smc_firmware_header_v2_1, v1_0.header);
- DRM_DEBUG("pptable_count: %u\n", le32_to_cpu(v2_1_hdr->pptable_count));
- DRM_DEBUG("pptable_entry_offset: %u\n", le32_to_cpu(v2_1_hdr->pptable_entry_offset));
+ DRM_DEBUG("pptable_count: %u\n"
+ "pptable_entry_offset: %u\n",
+ le32_to_cpu(v2_1_hdr->pptable_count),
+ le32_to_cpu(v2_1_hdr->pptable_entry_offset));
break;
default:
break;
@@ -111,10 +124,12 @@ void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr)
const struct gfx_firmware_header_v1_0 *gfx_hdr =
container_of(hdr, struct gfx_firmware_header_v1_0, header);
- DRM_DEBUG("ucode_feature_version: %u\n",
- le32_to_cpu(gfx_hdr->ucode_feature_version));
- DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
- DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
+ DRM_DEBUG("ucode_feature_version: %u\n"
+ "jt_offset: %u\n"
+ "jt_size: %u\n",
+ le32_to_cpu(gfx_hdr->ucode_feature_version),
+ le32_to_cpu(gfx_hdr->jt_offset),
+ le32_to_cpu(gfx_hdr->jt_size));
} else {
DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor);
}
@@ -132,82 +147,88 @@ void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr)
const struct rlc_firmware_header_v1_0 *rlc_hdr =
container_of(hdr, struct rlc_firmware_header_v1_0, header);
- DRM_DEBUG("ucode_feature_version: %u\n",
- le32_to_cpu(rlc_hdr->ucode_feature_version));
- DRM_DEBUG("save_and_restore_offset: %u\n",
- le32_to_cpu(rlc_hdr->save_and_restore_offset));
- DRM_DEBUG("clear_state_descriptor_offset: %u\n",
- le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));
- DRM_DEBUG("avail_scratch_ram_locations: %u\n",
- le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));
- DRM_DEBUG("master_pkt_description_offset: %u\n",
+ DRM_DEBUG("ucode_feature_version: %u\n"
+ "save_and_restore_offset: %u\n"
+ "clear_state_descriptor_offset: %u\n"
+ "avail_scratch_ram_locations: %u\n"
+ "master_pkt_description_offset: %u\n",
+ le32_to_cpu(rlc_hdr->ucode_feature_version),
+ le32_to_cpu(rlc_hdr->save_and_restore_offset),
+ le32_to_cpu(rlc_hdr->clear_state_descriptor_offset),
+ le32_to_cpu(rlc_hdr->avail_scratch_ram_locations),
le32_to_cpu(rlc_hdr->master_pkt_description_offset));
+
} else if (version_major == 2) {
const struct rlc_firmware_header_v2_0 *rlc_hdr =
container_of(hdr, struct rlc_firmware_header_v2_0, header);
- DRM_DEBUG("ucode_feature_version: %u\n",
- le32_to_cpu(rlc_hdr->ucode_feature_version));
- DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset));
- DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size));
- DRM_DEBUG("save_and_restore_offset: %u\n",
- le32_to_cpu(rlc_hdr->save_and_restore_offset));
- DRM_DEBUG("clear_state_descriptor_offset: %u\n",
- le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));
- DRM_DEBUG("avail_scratch_ram_locations: %u\n",
- le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));
- DRM_DEBUG("reg_restore_list_size: %u\n",
- le32_to_cpu(rlc_hdr->reg_restore_list_size));
- DRM_DEBUG("reg_list_format_start: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_format_start));
- DRM_DEBUG("reg_list_format_separate_start: %u\n",
+ DRM_DEBUG("ucode_feature_version: %u\n"
+ "jt_offset: %u\n"
+ "jt_size: %u\n"
+ "save_and_restore_offset: %u\n"
+ "clear_state_descriptor_offset: %u\n"
+ "avail_scratch_ram_locations: %u\n"
+ "reg_restore_list_size: %u\n"
+ "reg_list_format_start: %u\n"
+ "reg_list_format_separate_start: %u\n",
+ le32_to_cpu(rlc_hdr->ucode_feature_version),
+ le32_to_cpu(rlc_hdr->jt_offset),
+ le32_to_cpu(rlc_hdr->jt_size),
+ le32_to_cpu(rlc_hdr->save_and_restore_offset),
+ le32_to_cpu(rlc_hdr->clear_state_descriptor_offset),
+ le32_to_cpu(rlc_hdr->avail_scratch_ram_locations),
+ le32_to_cpu(rlc_hdr->reg_restore_list_size),
+ le32_to_cpu(rlc_hdr->reg_list_format_start),
le32_to_cpu(rlc_hdr->reg_list_format_separate_start));
- DRM_DEBUG("starting_offsets_start: %u\n",
- le32_to_cpu(rlc_hdr->starting_offsets_start));
- DRM_DEBUG("reg_list_format_size_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_format_size_bytes));
- DRM_DEBUG("reg_list_format_array_offset_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));
- DRM_DEBUG("reg_list_size_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_size_bytes));
- DRM_DEBUG("reg_list_array_offset_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));
- DRM_DEBUG("reg_list_format_separate_size_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_format_separate_size_bytes));
- DRM_DEBUG("reg_list_format_separate_array_offset_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_format_separate_array_offset_bytes));
- DRM_DEBUG("reg_list_separate_size_bytes: %u\n",
- le32_to_cpu(rlc_hdr->reg_list_separate_size_bytes));
- DRM_DEBUG("reg_list_separate_array_offset_bytes: %u\n",
+
+ DRM_DEBUG("starting_offsets_start: %u\n"
+ "reg_list_format_size_bytes: %u\n"
+ "reg_list_format_array_offset_bytes: %u\n"
+ "reg_list_size_bytes: %u\n"
+ "reg_list_array_offset_bytes: %u\n"
+ "reg_list_format_separate_size_bytes: %u\n"
+ "reg_list_format_separate_array_offset_bytes: %u\n"
+ "reg_list_separate_size_bytes: %u\n"
+ "reg_list_separate_array_offset_bytes: %u\n",
+ le32_to_cpu(rlc_hdr->starting_offsets_start),
+ le32_to_cpu(rlc_hdr->reg_list_format_size_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_size_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_format_separate_size_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_format_separate_array_offset_bytes),
+ le32_to_cpu(rlc_hdr->reg_list_separate_size_bytes),
le32_to_cpu(rlc_hdr->reg_list_separate_array_offset_bytes));
+
if (version_minor == 1) {
const struct rlc_firmware_header_v2_1 *v2_1 =
container_of(rlc_hdr, struct rlc_firmware_header_v2_1, v2_0);
- DRM_DEBUG("reg_list_format_direct_reg_list_length: %u\n",
- le32_to_cpu(v2_1->reg_list_format_direct_reg_list_length));
- DRM_DEBUG("save_restore_list_cntl_ucode_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_cntl_ucode_ver));
- DRM_DEBUG("save_restore_list_cntl_feature_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_cntl_feature_ver));
- DRM_DEBUG("save_restore_list_cntl_size_bytes %u\n",
- le32_to_cpu(v2_1->save_restore_list_cntl_size_bytes));
- DRM_DEBUG("save_restore_list_cntl_offset_bytes: %u\n",
- le32_to_cpu(v2_1->save_restore_list_cntl_offset_bytes));
- DRM_DEBUG("save_restore_list_gpm_ucode_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_gpm_ucode_ver));
- DRM_DEBUG("save_restore_list_gpm_feature_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_gpm_feature_ver));
- DRM_DEBUG("save_restore_list_gpm_size_bytes %u\n",
- le32_to_cpu(v2_1->save_restore_list_gpm_size_bytes));
- DRM_DEBUG("save_restore_list_gpm_offset_bytes: %u\n",
- le32_to_cpu(v2_1->save_restore_list_gpm_offset_bytes));
- DRM_DEBUG("save_restore_list_srm_ucode_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_srm_ucode_ver));
- DRM_DEBUG("save_restore_list_srm_feature_ver: %u\n",
- le32_to_cpu(v2_1->save_restore_list_srm_feature_ver));
- DRM_DEBUG("save_restore_list_srm_size_bytes %u\n",
- le32_to_cpu(v2_1->save_restore_list_srm_size_bytes));
- DRM_DEBUG("save_restore_list_srm_offset_bytes: %u\n",
+
+ DRM_DEBUG("reg_list_format_direct_reg_list_length: %u\n"
+ "save_restore_list_cntl_ucode_ver: %u\n"
+ "save_restore_list_cntl_feature_ver: %u\n"
+ "save_restore_list_cntl_size_bytes %u\n"
+ "save_restore_list_cntl_offset_bytes: %u\n"
+ "save_restore_list_gpm_ucode_ver: %u\n"
+ "save_restore_list_gpm_feature_ver: %u\n"
+ "save_restore_list_gpm_size_bytes %u\n"
+ "save_restore_list_gpm_offset_bytes: %u\n"
+ "save_restore_list_srm_ucode_ver: %u\n"
+ "save_restore_list_srm_feature_ver: %u\n"
+ "save_restore_list_srm_size_bytes %u\n"
+ "save_restore_list_srm_offset_bytes: %u\n",
+ le32_to_cpu(v2_1->reg_list_format_direct_reg_list_length),
+ le32_to_cpu(v2_1->save_restore_list_cntl_ucode_ver),
+ le32_to_cpu(v2_1->save_restore_list_cntl_feature_ver),
+ le32_to_cpu(v2_1->save_restore_list_cntl_size_bytes),
+ le32_to_cpu(v2_1->save_restore_list_cntl_offset_bytes),
+ le32_to_cpu(v2_1->save_restore_list_gpm_ucode_ver),
+ le32_to_cpu(v2_1->save_restore_list_gpm_feature_ver),
+ le32_to_cpu(v2_1->save_restore_list_gpm_size_bytes),
+ le32_to_cpu(v2_1->save_restore_list_gpm_offset_bytes),
+ le32_to_cpu(v2_1->save_restore_list_srm_ucode_ver),
+ le32_to_cpu(v2_1->save_restore_list_srm_feature_ver),
+ le32_to_cpu(v2_1->save_restore_list_srm_size_bytes),
le32_to_cpu(v2_1->save_restore_list_srm_offset_bytes));
}
} else {
@@ -227,12 +248,14 @@ void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
const struct sdma_firmware_header_v1_0 *sdma_hdr =
container_of(hdr, struct sdma_firmware_header_v1_0, header);
- DRM_DEBUG("ucode_feature_version: %u\n",
- le32_to_cpu(sdma_hdr->ucode_feature_version));
- DRM_DEBUG("ucode_change_version: %u\n",
- le32_to_cpu(sdma_hdr->ucode_change_version));
- DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
- DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
+ DRM_DEBUG("ucode_feature_version: %u\n"
+ "ucode_change_version: %u\n"
+ "jt_offset: %u\n"
+ "jt_size: %u\n",
+ le32_to_cpu(sdma_hdr->ucode_feature_version),
+ le32_to_cpu(sdma_hdr->ucode_change_version),
+ le32_to_cpu(sdma_hdr->jt_offset),
+ le32_to_cpu(sdma_hdr->jt_size));
if (version_minor >= 1) {
const struct sdma_firmware_header_v1_1 *sdma_v1_1_hdr =
container_of(sdma_hdr, struct sdma_firmware_header_v1_1, v1_0);
@@ -256,36 +279,36 @@ void amdgpu_ucode_print_psp_hdr(const struct common_firmware_header *hdr)
const struct psp_firmware_header_v1_0 *psp_hdr =
container_of(hdr, struct psp_firmware_header_v1_0, header);
- DRM_DEBUG("ucode_feature_version: %u\n",
- le32_to_cpu(psp_hdr->sos.fw_version));
- DRM_DEBUG("sos_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr->sos.offset_bytes));
- DRM_DEBUG("sos_size_bytes: %u\n",
+ DRM_DEBUG("ucode_feature_version: %u\n"
+ "sos_offset_bytes: %u\n"
+ "sos_size_bytes: %u\n",
+ le32_to_cpu(psp_hdr->sos.fw_version),
+ le32_to_cpu(psp_hdr->sos.offset_bytes),
le32_to_cpu(psp_hdr->sos.size_bytes));
if (version_minor == 1) {
const struct psp_firmware_header_v1_1 *psp_hdr_v1_1 =
container_of(psp_hdr, struct psp_firmware_header_v1_1, v1_0);
- DRM_DEBUG("toc_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_1->toc.fw_version));
- DRM_DEBUG("toc_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_1->toc.offset_bytes));
- DRM_DEBUG("toc_size_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_1->toc.size_bytes));
- DRM_DEBUG("kdb_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_1->kdb.fw_version));
- DRM_DEBUG("kdb_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_1->kdb.offset_bytes));
- DRM_DEBUG("kdb_size_bytes: %u\n",
+ DRM_DEBUG("toc_header_version: %u\n"
+ "toc_offset_bytes: %u\n"
+ "toc_size_bytes: %u\n"
+ "kdb_header_version: %u\n"
+ "kdb_offset_bytes: %u\n"
+ "kdb_size_bytes: %u\n",
+ le32_to_cpu(psp_hdr_v1_1->toc.fw_version),
+ le32_to_cpu(psp_hdr_v1_1->toc.offset_bytes),
+ le32_to_cpu(psp_hdr_v1_1->toc.size_bytes),
+ le32_to_cpu(psp_hdr_v1_1->kdb.fw_version),
+ le32_to_cpu(psp_hdr_v1_1->kdb.offset_bytes),
le32_to_cpu(psp_hdr_v1_1->kdb.size_bytes));
}
if (version_minor == 2) {
const struct psp_firmware_header_v1_2 *psp_hdr_v1_2 =
container_of(psp_hdr, struct psp_firmware_header_v1_2, v1_0);
- DRM_DEBUG("kdb_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_2->kdb.fw_version));
- DRM_DEBUG("kdb_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_2->kdb.offset_bytes));
- DRM_DEBUG("kdb_size_bytes: %u\n",
+ DRM_DEBUG("kdb_header_version: %u\n"
+ "kdb_offset_bytes: %u\n"
+ "kdb_size_bytes: %u\n",
+ le32_to_cpu(psp_hdr_v1_2->kdb.fw_version),
+ le32_to_cpu(psp_hdr_v1_2->kdb.offset_bytes),
le32_to_cpu(psp_hdr_v1_2->kdb.size_bytes));
}
if (version_minor == 3) {
@@ -293,23 +316,23 @@ void amdgpu_ucode_print_psp_hdr(const struct common_firmware_header *hdr)
container_of(psp_hdr, struct psp_firmware_header_v1_1, v1_0);
const struct psp_firmware_header_v1_3 *psp_hdr_v1_3 =
container_of(psp_hdr_v1_1, struct psp_firmware_header_v1_3, v1_1);
- DRM_DEBUG("toc_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.toc.fw_version));
- DRM_DEBUG("toc_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.toc.offset_bytes));
- DRM_DEBUG("toc_size_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.toc.size_bytes));
- DRM_DEBUG("kdb_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.fw_version));
- DRM_DEBUG("kdb_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.offset_bytes));
- DRM_DEBUG("kdb_size_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.size_bytes));
- DRM_DEBUG("spl_header_version: %u\n",
- le32_to_cpu(psp_hdr_v1_3->spl.fw_version));
- DRM_DEBUG("spl_offset_bytes: %u\n",
- le32_to_cpu(psp_hdr_v1_3->spl.offset_bytes));
- DRM_DEBUG("spl_size_bytes: %u\n",
+ DRM_DEBUG("toc_header_version: %u\n"
+ "toc_offset_bytes: %u\n"
+ "toc_size_bytes: %u\n"
+ "kdb_header_version: %u\n"
+ "kdb_offset_bytes: %u\n"
+ "kdb_size_bytes: %u\n"
+ "spl_header_version: %u\n"
+ "spl_offset_bytes: %u\n"
+ "spl_size_bytes: %u\n",
+ le32_to_cpu(psp_hdr_v1_3->v1_1.toc.fw_version),
+ le32_to_cpu(psp_hdr_v1_3->v1_1.toc.offset_bytes),
+ le32_to_cpu(psp_hdr_v1_3->v1_1.toc.size_bytes),
+ le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.fw_version),
+ le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.offset_bytes),
+ le32_to_cpu(psp_hdr_v1_3->v1_1.kdb.size_bytes),
+ le32_to_cpu(psp_hdr_v1_3->spl.fw_version),
+ le32_to_cpu(psp_hdr_v1_3->spl.offset_bytes),
le32_to_cpu(psp_hdr_v1_3->spl.size_bytes));
}
} else {
@@ -330,9 +353,9 @@ void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr)
const struct gpu_info_firmware_header_v1_0 *gpu_info_hdr =
container_of(hdr, struct gpu_info_firmware_header_v1_0, header);
- DRM_DEBUG("version_major: %u\n",
- le16_to_cpu(gpu_info_hdr->version_major));
- DRM_DEBUG("version_minor: %u\n",
+ DRM_DEBUG("version_major: %u\n"
+ "version_minor: %u\n",
+ le16_to_cpu(gpu_info_hdr->version_major),
le16_to_cpu(gpu_info_hdr->version_minor));
} else {
DRM_ERROR("Unknown gpu_info ucode version: %u.%u\n", version_major, version_minor);
--
2.31.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: maintenance patches for 5.15-rcX
2021-09-30 1:44 [Intel-gfx] [PATCH 0/4] drm: maintenance patches for 5.15-rcX Jim Cromie
` (3 preceding siblings ...)
2021-09-30 1:44 ` [Intel-gfx] [PATCH 4/4] i915/gvt: remove spaces in pr_debug "gvt: core:" etc prefixes Jim Cromie
@ 2021-09-30 2:03 ` Patchwork
2021-09-30 2:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-30 3:43 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2021-09-30 2:03 UTC (permalink / raw)
To: Jim Cromie; +Cc: intel-gfx
== Series Details ==
Series: drm: maintenance patches for 5.15-rcX
URL : https://patchwork.freedesktop.org/series/95245/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
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+
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+ #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:354:16: error: incompatible types in comparison expression (different type sizes):
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:354:16: unsigned long *
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:354:16: unsigned long long *
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4494:31: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4494:31: struct dma_fence *
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4494:31: struct dma_fence [noderef] __rcu *
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4496:33: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4496:33: struct dma_fence *
+drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4496:33: struct dma_fence [noderef] __rcu *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:294:25: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:294:25: struct dma_fence *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:294:25: struct dma_fence [noderef] __rcu *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:295:17: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:295:17: struct dma_fence *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:295:17: struct dma_fence [noderef] __rcu *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:344:17: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:344:17: struct dma_fence *
+drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:344:17: struct dma_fence [noderef] __rcu *
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:314:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:318:49: error: static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
+drivers/gpu/drm/drm_drv.c:425:6: warning: context imbalance in 'drm_dev_enter' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/selftests/i915_syncmap.c:80:54: warning: dubious: x | !y
+drivers/gpu/drm/selftests/test-drm_damage_helper.c:101:30: warning: symbol 'fb' was not declared. Should it be static?
+drivers/gpu/drm/selftests/test-drm_damage_helper.c:14:19: warning: symbol 'mock_driver' was not declared. Should it be static?
+drivers/gpu/drm/selftests/test-drm_damage_helper.c:259:23: warning: Using plain integer as NULL pointer
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:40:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:40:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:42:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:42:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:40:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:40:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c:36:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c:36:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c:38:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c:38:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:66,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu.h:70,
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c:52:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c:52:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_job.c:30:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_job.c:30:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:29:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c:37:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c:37:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c:34:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c:34:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c:32:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c:32:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:36:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:36:
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from ./drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
+ from drivers/gpu/drm/amd/amdgpu/psp_v11_0.c:28:
+ from drivers/gpu/drm/amd/amdgpu/psp_v11_0.c:28:
+ from drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c:28:
+ from drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c:28:
+ from drivers/gpu/drm/amd/amdgpu/vce_v4_0.c:30:
+ from drivers/gpu/drm/amd/amdgpu/vce_v4_0.c:30:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c:27:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c:27:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c:27:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c:27:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:25:
+ from drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:25:
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/drm/drm_dp_helper.h:1322: warning: "DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER" redefined
+./include/
^ permalink raw reply [flat|nested] 10+ messages in thread