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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dave Airlie <airlied@redhat.com>, Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 3/9] drm/i915: Clean up the {ilk, lpt}_pch_enable() calling convention
Date: Fri, 15 Oct 2021 10:16:19 +0300	[thread overview]
Message-ID: <20211015071625.593-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20211015071625.593-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use the clean "atomic_state+crtc" approach of passing
arguments to the top level PCH modeset code.

And while at it we can also just pass the whole crtc to
ilk_disable_pch_transcoder().

Cc: Dave Airlie <airlied@redhat.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_crt.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  4 ++--
 .../gpu/drm/i915/display/intel_pch_display.c  | 23 +++++++++++--------
 .../gpu/drm/i915/display/intel_pch_display.h  | 12 +++++-----
 4 files changed, 22 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 54540138bd1d..4038ae342ea1 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -318,7 +318,7 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
 
 	intel_enable_transcoder(crtc_state);
 
-	lpt_pch_enable(crtc_state);
+	lpt_pch_enable(state, crtc);
 
 	intel_crtc_vblank_on(crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 69549886fe5b..2ee02c16bd1c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2020,7 +2020,7 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
 	intel_enable_transcoder(new_crtc_state);
 
 	if (new_crtc_state->has_pch_encoder)
-		ilk_pch_enable(state, new_crtc_state);
+		ilk_pch_enable(state, crtc);
 
 	intel_crtc_vblank_on(new_crtc_state);
 
@@ -2299,7 +2299,7 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 	intel_encoders_post_disable(state, crtc);
 
 	if (old_crtc_state->has_pch_encoder) {
-		ilk_disable_pch_transcoder(dev_priv, pipe);
+		ilk_disable_pch_transcoder(crtc);
 
 		if (HAS_PCH_CPT(dev_priv)) {
 			i915_reg_t reg;
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 0056c2fe49ec..50995c4f2aaa 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -179,9 +179,10 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
 			pipe_name(pipe));
 }
 
-void ilk_disable_pch_transcoder(struct drm_i915_private *dev_priv,
-				enum pipe pipe)
+void ilk_disable_pch_transcoder(struct intel_crtc *crtc)
 {
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum pipe pipe = crtc->pipe;
 	i915_reg_t reg;
 	u32 val;
 
@@ -218,12 +219,12 @@ void ilk_disable_pch_transcoder(struct drm_i915_private *dev_priv,
  *   - DP transcoding bits
  *   - transcoder
  */
-void ilk_pch_enable(const struct intel_atomic_state *state,
-		    const struct intel_crtc_state *crtc_state)
+void ilk_pch_enable(struct intel_atomic_state *state,
+		    struct intel_crtc *crtc)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_device *dev = crtc->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state,  crtc);
 	enum pipe pipe = crtc->pipe;
 	u32 temp;
 
@@ -289,7 +290,7 @@ void ilk_pch_enable(const struct intel_atomic_state *state,
 			temp |= TRANS_DP_VSYNC_ACTIVE_HIGH;
 
 		port = intel_get_crtc_new_encoder(state, crtc_state)->port;
-		drm_WARN_ON(dev, port < PORT_B || port > PORT_D);
+		drm_WARN_ON(&dev_priv->drm, port < PORT_B || port > PORT_D);
 		temp |= TRANS_DP_PORT_SEL(port);
 
 		intel_de_write(dev_priv, reg, temp);
@@ -348,10 +349,12 @@ void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
 	intel_de_write(dev_priv, TRANS_CHICKEN2(PIPE_A), val);
 }
 
-void lpt_pch_enable(const struct intel_crtc_state *crtc_state)
+void lpt_pch_enable(struct intel_atomic_state *state,
+		    struct intel_crtc *crtc)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state,  crtc);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
 	assert_pch_transcoder_disabled(dev_priv, PIPE_A);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.h b/drivers/gpu/drm/i915/display/intel_pch_display.h
index 6eba1fd667ea..7f9df2c13cf3 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.h
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.h
@@ -6,17 +6,17 @@
 #ifndef _INTEL_PCH_DISPLAY_H_
 #define _INTEL_PCH_DISPLAY_H_
 
-enum pipe;
 struct drm_i915_private;
 struct intel_atomic_state;
+struct intel_crtc;
 struct intel_crtc_state;
 
-void ilk_disable_pch_transcoder(struct drm_i915_private *dev_priv,
-				enum pipe pipe);
-void ilk_pch_enable(const struct intel_atomic_state *state,
-		    const struct intel_crtc_state *crtc_state);
+void ilk_disable_pch_transcoder(struct intel_crtc *crtc);
+void ilk_pch_enable(struct intel_atomic_state *state,
+		    struct intel_crtc *crtc);
 
 void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
-void lpt_pch_enable(const struct intel_crtc_state *crtc_state);
+void lpt_pch_enable(struct intel_atomic_state *state,
+		    struct intel_crtc *crtc);
 
 #endif
-- 
2.32.0


  parent reply	other threads:[~2021-10-15  7:16 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15  7:16 [Intel-gfx] [PATCH 0/9] drm/i915: Move PCH modeset code into its own file Ville Syrjala
2021-10-15  7:16 ` [Intel-gfx] [PATCH 1/9] drm/i915: Move PCH refclok stuff " Ville Syrjala
2021-10-17 23:56   ` David Airlie
2021-10-18  8:13     ` Ville Syrjälä
2021-10-18 13:13       ` Ville Syrjälä
2021-10-15  7:16 ` [Intel-gfx] [PATCH 2/9] drm/i915: Move PCH modeset code to " Ville Syrjala
2021-10-17 23:57   ` David Airlie
2021-10-15  7:16 ` Ville Syrjala [this message]
2021-10-17 23:58   ` [Intel-gfx] [PATCH 3/9] drm/i915: Clean up the {ilk, lpt}_pch_enable() calling convention David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 4/9] drm/i915: Move LPT PCH readout code Ville Syrjala
2021-10-18  0:19   ` David Airlie
2021-10-18  7:15     ` Ville Syrjälä
2021-10-18 15:35   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-10-18 19:46     ` David Airlie
2021-10-19  7:17       ` Ville Syrjälä
2021-10-15  7:16 ` [Intel-gfx] [PATCH 5/9] drm/i915: Extract ilk_pch_get_config() Ville Syrjala
2021-10-18  0:22   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 6/9] drm/i915: Move iCLKIP readout to the pch code Ville Syrjala
2021-10-18  0:43   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 7/9] drm/i915: Introduce ilk_pch_disable() and ilk_pch_post_disable() Ville Syrjala
2021-10-18  0:43   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 8/9] drm/i915: Move intel_ddi_fdi_post_disable() to fdi code Ville Syrjala
2021-10-18  0:43   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 9/9] drm/i915: Introduce lpt_pch_disable() Ville Syrjala
2021-10-15 12:11   ` kernel test robot
2021-10-15 12:56   ` kernel test robot
2021-10-15 14:38   ` kernel test robot
2021-10-18  0:44   ` David Airlie
2021-10-15  7:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move PCH modeset code into its own file Patchwork
2021-10-15  7:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-15  8:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-15 14:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-10-18 18:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move PCH modeset code into its own file (rev2) Patchwork
2021-10-18 18:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-18 19:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-19  1:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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