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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dave Airlie <airlied@redhat.com>, Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 7/9] drm/i915: Introduce ilk_pch_disable() and ilk_pch_post_disable()
Date: Fri, 15 Oct 2021 10:16:23 +0300	[thread overview]
Message-ID: <20211015071625.593-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20211015071625.593-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Hoover the remaining open coded PCH modeset sequence bits
out from ilk_crtc_disable(). Somewhat annoyingly the
enable vs. disable is a bit asymmetric so we need two
functions for the disable case.

Cc: Dave Airlie <airlied@redhat.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c  | 27 ++------------
 .../gpu/drm/i915/display/intel_pch_display.c  | 37 ++++++++++++++++++-
 .../gpu/drm/i915/display/intel_pch_display.h  |  5 ++-
 3 files changed, 43 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e8f15fb3ed07..76203ce9c980 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2289,33 +2289,12 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 	ilk_pfit_disable(old_crtc_state);
 
 	if (old_crtc_state->has_pch_encoder)
-		ilk_fdi_disable(crtc);
+		ilk_pch_disable(state, crtc);
 
 	intel_encoders_post_disable(state, crtc);
 
-	if (old_crtc_state->has_pch_encoder) {
-		ilk_disable_pch_transcoder(crtc);
-
-		if (HAS_PCH_CPT(dev_priv)) {
-			i915_reg_t reg;
-			u32 temp;
-
-			/* disable TRANS_DP_CTL */
-			reg = TRANS_DP_CTL(pipe);
-			temp = intel_de_read(dev_priv, reg);
-			temp &= ~(TRANS_DP_OUTPUT_ENABLE |
-				  TRANS_DP_PORT_SEL_MASK);
-			temp |= TRANS_DP_PORT_SEL_NONE;
-			intel_de_write(dev_priv, reg, temp);
-
-			/* disable DPLL_SEL */
-			temp = intel_de_read(dev_priv, PCH_DPLL_SEL);
-			temp &= ~(TRANS_DPLL_ENABLE(pipe) | TRANS_DPLLB_SEL(pipe));
-			intel_de_write(dev_priv, PCH_DPLL_SEL, temp);
-		}
-
-		ilk_fdi_pll_disable(crtc);
-	}
+	if (old_crtc_state->has_pch_encoder)
+		ilk_pch_post_disable(state, crtc);
 
 	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 07ec43f8a7fa..f40bdb387a68 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -179,7 +179,7 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
 			pipe_name(pipe));
 }
 
-void ilk_disable_pch_transcoder(struct intel_crtc *crtc)
+static void ilk_disable_pch_transcoder(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
@@ -299,6 +299,41 @@ void ilk_pch_enable(struct intel_atomic_state *state,
 	ilk_enable_pch_transcoder(crtc_state);
 }
 
+void ilk_pch_disable(struct intel_atomic_state *state,
+		     struct intel_crtc *crtc)
+{
+	ilk_fdi_disable(crtc);
+}
+
+void ilk_pch_post_disable(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum pipe pipe = crtc->pipe;
+
+	ilk_disable_pch_transcoder(crtc);
+
+	if (HAS_PCH_CPT(dev_priv)) {
+		i915_reg_t reg;
+		u32 temp;
+
+		/* disable TRANS_DP_CTL */
+		reg = TRANS_DP_CTL(pipe);
+		temp = intel_de_read(dev_priv, reg);
+		temp &= ~(TRANS_DP_OUTPUT_ENABLE |
+			  TRANS_DP_PORT_SEL_MASK);
+		temp |= TRANS_DP_PORT_SEL_NONE;
+		intel_de_write(dev_priv, reg, temp);
+
+		/* disable DPLL_SEL */
+		temp = intel_de_read(dev_priv, PCH_DPLL_SEL);
+		temp &= ~(TRANS_DPLL_ENABLE(pipe) | TRANS_DPLLB_SEL(pipe));
+		intel_de_write(dev_priv, PCH_DPLL_SEL, temp);
+	}
+
+	ilk_fdi_pll_disable(crtc);
+}
+
 static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.h b/drivers/gpu/drm/i915/display/intel_pch_display.h
index 6e834fbebd64..a983f4d5a3b6 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.h
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.h
@@ -11,9 +11,12 @@ struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
 
-void ilk_disable_pch_transcoder(struct intel_crtc *crtc);
 void ilk_pch_enable(struct intel_atomic_state *state,
 		    struct intel_crtc *crtc);
+void ilk_pch_disable(struct intel_atomic_state *state,
+		     struct intel_crtc *crtc);
+void ilk_pch_post_disable(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc);
 void ilk_pch_get_config(struct intel_crtc_state *crtc_state);
 
 void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
-- 
2.32.0


  parent reply	other threads:[~2021-10-15  7:16 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15  7:16 [Intel-gfx] [PATCH 0/9] drm/i915: Move PCH modeset code into its own file Ville Syrjala
2021-10-15  7:16 ` [Intel-gfx] [PATCH 1/9] drm/i915: Move PCH refclok stuff " Ville Syrjala
2021-10-17 23:56   ` David Airlie
2021-10-18  8:13     ` Ville Syrjälä
2021-10-18 13:13       ` Ville Syrjälä
2021-10-15  7:16 ` [Intel-gfx] [PATCH 2/9] drm/i915: Move PCH modeset code to " Ville Syrjala
2021-10-17 23:57   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 3/9] drm/i915: Clean up the {ilk, lpt}_pch_enable() calling convention Ville Syrjala
2021-10-17 23:58   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 4/9] drm/i915: Move LPT PCH readout code Ville Syrjala
2021-10-18  0:19   ` David Airlie
2021-10-18  7:15     ` Ville Syrjälä
2021-10-18 15:35   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-10-18 19:46     ` David Airlie
2021-10-19  7:17       ` Ville Syrjälä
2021-10-15  7:16 ` [Intel-gfx] [PATCH 5/9] drm/i915: Extract ilk_pch_get_config() Ville Syrjala
2021-10-18  0:22   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 6/9] drm/i915: Move iCLKIP readout to the pch code Ville Syrjala
2021-10-18  0:43   ` David Airlie
2021-10-15  7:16 ` Ville Syrjala [this message]
2021-10-18  0:43   ` [Intel-gfx] [PATCH 7/9] drm/i915: Introduce ilk_pch_disable() and ilk_pch_post_disable() David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 8/9] drm/i915: Move intel_ddi_fdi_post_disable() to fdi code Ville Syrjala
2021-10-18  0:43   ` David Airlie
2021-10-15  7:16 ` [Intel-gfx] [PATCH 9/9] drm/i915: Introduce lpt_pch_disable() Ville Syrjala
2021-10-15 12:11   ` kernel test robot
2021-10-15 12:56   ` kernel test robot
2021-10-15 14:38   ` kernel test robot
2021-10-18  0:44   ` David Airlie
2021-10-15  7:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move PCH modeset code into its own file Patchwork
2021-10-15  7:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-15  8:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-15 14:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-10-18 18:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move PCH modeset code into its own file (rev2) Patchwork
2021-10-18 18:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-18 19:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-19  1:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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