From: Imre Deak <imre.deak@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>,
intel-gfx@lists.freedesktop.org, matthew.d.roper@intel.com
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/dsi/xelpd: Disable DC states in Video mode
Date: Tue, 19 Oct 2021 15:08:59 +0300 [thread overview]
Message-ID: <20211019120859.GA1598321@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <87v91tqpl8.fsf@intel.com>
On Tue, Oct 19, 2021 at 01:24:51PM +0300, Jani Nikula wrote:
> On Mon, 18 Oct 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> > MIPI DSI transcoder cannot be in video mode to support any of the
> > display C states.
>
> Imre, could you review this one please?
>
> The added confusion is that POWER_DOMAIN_TRANSCODER_DSI_A and
> POWER_DOMAIN_TRANSCODER_DSI_C are never used anywhere and
> POWER_DOMAIN_TRANSCODER() does not take DSI transcoders into account.
<tl;dr>
You mean they are not listed in the power_domain->power_well mappings.
Those power domains don't use any power wells above PW#1. PW#0/1 is
handled "automatically" by DMC, so we don't have to toggle the power for
those manually. However they still need a runtime PM reference, since
whatever HW domain you want to use, the PCI device must be in the runtime
resumed state. This is ensured by the always-on power well, which every
domain has a dependency on.
<tl;dr>
The transcoder power domains are acquired in get_crtc_power_domains(),
doesn't the DSI encoder using the DSI_A/C transcoders?
Yes, POWER_DOMAIN_TRANSCODER is now broken wrt. DSI due to
POWER_DOMAIN_TRANSCODER_VDSC_PW2. So that would need to be moved after
the TRANSCODER_DSI_C. And the POWER_DOMAIN_TRANSCODER macro could be
also simplified afaics.
Otherwise this patch looks ok to me, just the bspec links would be good
to have here too.
>
> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 709569211c85..8406db5e573e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -3105,7 +3105,8 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
> > BIT_ULL(POWER_DOMAIN_MODESET) | \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > - BIT_ULL(POWER_DOMAIN_INIT))
> > + BIT_ULL(POWER_DOMAIN_INIT)) | \
> > + BIT_ULL(POWER_DOMAIN_PORT_DSI)
>
> Everywhere else POWER_DOMAIN_INIT is last in the list.
>
> BR,
> Jani.
>
> >
> > #define XELPD_AUX_IO_D_XELPD_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_D_XELPD)
> > #define XELPD_AUX_IO_E_XELPD_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_E_XELPD)
>
> --
> Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2021-10-19 12:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-18 6:52 [Intel-gfx] [PATCH 0/4] Enable MIPI DSI video mode on ADLP Vandita Kulkarni
2021-10-18 6:52 ` [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB Vandita Kulkarni
2021-10-19 10:05 ` Jani Nikula
2021-10-19 10:15 ` Ville Syrjälä
2021-10-19 10:28 ` Jani Nikula
2021-10-19 10:41 ` Ville Syrjälä
2021-10-19 10:50 ` Ville Syrjälä
2021-10-19 11:27 ` Kulkarni, Vandita
2021-10-18 6:52 ` [Intel-gfx] [PATCH 2/4] drm/i915/dsi/xelpd: Add DSI transcoder support Vandita Kulkarni
2021-10-19 10:13 ` Jani Nikula
2021-10-19 11:40 ` Kulkarni, Vandita
2021-10-19 11:45 ` Jani Nikula
2021-10-18 6:52 ` [Intel-gfx] [PATCH 3/4] drm/i915/dsi/xelpd: Disable DC states in Video mode Vandita Kulkarni
2021-10-19 10:24 ` Jani Nikula
2021-10-19 12:08 ` Imre Deak [this message]
2021-10-18 6:52 ` [Intel-gfx] [PATCH 4/4] drm/i915/dsi: Ungate clock before enabling the phy Vandita Kulkarni
2021-10-19 10:18 ` Jani Nikula
2021-10-19 11:32 ` Kulkarni, Vandita
2021-10-19 11:43 ` Kulkarni, Vandita
2021-10-19 11:46 ` Jani Nikula
2021-10-19 11:48 ` Kulkarni, Vandita
2021-10-18 7:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable MIPI DSI video mode on ADLP Patchwork
2021-10-18 7:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-18 9:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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