From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: michael.cheng@intel.com, wayne.boyer@intel.com,
jani.nikula@intel.com, lucas.demarchi@intel.com,
siva.mullati@intel.com
Subject: [Intel-gfx] [PATCH v4 3/3] drm/i915: Clean up BYT_PTE_WRITEABLE
Date: Wed, 10 Nov 2021 16:45:49 -0800 [thread overview]
Message-ID: <20211111004549.144706-4-michael.cheng@intel.com> (raw)
In-Reply-To: <20211111004549.144706-1-michael.cheng@intel.com>
Removes BYT_PTE_WRITEABLE and replace it with
I915_PAGE_RW.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 995a1c47cd35..ac4ad82fdcdd 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1026,7 +1026,7 @@ static u64 byt_pte_encode(dma_addr_t addr,
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | I915_PAGE_PRESENT;
if (!(flags & PTE_READ_ONLY))
- pte |= BYT_PTE_WRITEABLE;
+ pte |= I915_PAGE_RW;
if (level != I915_CACHE_NONE)
pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 884bc250260c..0eb77e2fb45f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -84,7 +84,6 @@ typedef u64 gen8_pte_t;
#define GEN7_PTE_CACHE_L3_LLC (3 << 1)
#define BYT_PTE_SNOOPED_BY_CPU_CACHES REG_BIT(2)
-#define BYT_PTE_WRITEABLE REG_BIT(1)
#define GEN12_PPGTT_PTE_LM BIT_ULL(11)
--
2.25.1
next prev parent reply other threads:[~2021-11-11 0:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-11 0:45 [Intel-gfx] [PATCH v4 0/3] Introduce new i915 macros for checking PTEs Michael Cheng
2021-11-11 0:45 ` [Intel-gfx] [PATCH v4 1/3] drm/i915: Introduce new macros for i915 PTE Michael Cheng
2021-11-13 1:28 ` Matt Roper
2021-11-13 1:31 ` Matt Roper
2021-11-13 1:42 ` Michael Cheng
2021-11-13 1:47 ` Matt Roper
2021-11-13 16:22 ` Lucas De Marchi
2021-11-17 22:29 ` Lucas De Marchi
2021-11-13 16:20 ` Lucas De Marchi
2021-11-11 0:45 ` [Intel-gfx] [PATCH v4 2/3] drm/i915: Clean up GEN6 page valid macros Michael Cheng
2021-11-11 0:45 ` Michael Cheng [this message]
2021-11-11 1:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Introduce new i915 macros for checking PTEs (rev4) Patchwork
2021-11-11 3:20 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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