From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 3/5] drm/i915/dg2: Add Wa_16011777198
Date: Tue, 16 Nov 2021 09:48:16 -0800 [thread overview]
Message-ID: <20211116174818.2128062-4-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20211116174818.2128062-1-matthew.d.roper@intel.com>
Coarse power gating for render should not be enabled on some DG2
steppings.
Bspec: 52698
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 43093dd2d0c9..c3155ee58689 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -117,10 +117,17 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
GEN6_RC_CTL_RC6_ENABLE |
GEN6_RC_CTL_EI_MODE(1);
- pg_enable =
- GEN9_RENDER_PG_ENABLE |
- GEN9_MEDIA_PG_ENABLE |
- GEN11_MEDIA_SAMPLER_PG_ENABLE;
+ /* Wa_16011777198 - Render powergating must remain disabled */
+ if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
+ IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))
+ pg_enable =
+ GEN9_MEDIA_PG_ENABLE |
+ GEN11_MEDIA_SAMPLER_PG_ENABLE;
+ else
+ pg_enable =
+ GEN9_RENDER_PG_ENABLE |
+ GEN9_MEDIA_PG_ENABLE |
+ GEN11_MEDIA_SAMPLER_PG_ENABLE;
if (GRAPHICS_VER(gt->i915) >= 12) {
for (i = 0; i < I915_MAX_VCS; i++)
--
2.33.0
next prev parent reply other threads:[~2021-11-16 17:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-16 17:48 [Intel-gfx] [PATCH v3 0/5] i915: Additional DG2 workarounds Matt Roper
2021-11-16 17:48 ` [Intel-gfx] [PATCH v3 1/5] drm/i915/dg2: s/DISP_STEPPING/DISPLAY_STEPPING/ Matt Roper
2021-11-16 19:39 ` Jani Nikula
2021-11-16 17:48 ` [Intel-gfx] [PATCH v3 2/5] drm/i915/dg2: Add Wa_14010547955 Matt Roper
2021-12-02 22:47 ` Clint Taylor
2021-11-16 17:48 ` Matt Roper [this message]
2021-12-02 22:54 ` [Intel-gfx] [PATCH v3 3/5] drm/i915/dg2: Add Wa_16011777198 Clint Taylor
2021-11-16 17:48 ` [Intel-gfx] [PATCH v3 4/5] drm/i915/dg2: Add Wa_16013000631 Matt Roper
2021-12-02 22:57 ` Clint Taylor
2021-11-16 17:48 ` [Intel-gfx] [PATCH v3 5/5] drm/i915/dg2: extend Wa_1409120013 to DG2 Matt Roper
2021-11-17 18:43 ` Ville Syrjälä
2021-11-17 18:51 ` Matt Roper
2021-11-17 19:01 ` Ville Syrjälä
2021-11-17 18:54 ` Ville Syrjälä
2021-11-19 16:36 ` Souza, Jose
2021-11-19 17:11 ` Matt Roper
2021-12-02 23:00 ` Clint Taylor
2021-11-17 1:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Additional DG2 workarounds (rev3) Patchwork
2021-11-17 1:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-11-17 1:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-17 4:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-03 5:49 ` Matt Roper
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