From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/12] drm/i915: Extract intel_splitter_adjust_timings()
Date: Tue, 15 Feb 2022 20:32:00 +0200 [thread overview]
Message-ID: <20220215183208.6143-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220215183208.6143-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's not replicate the same piece of code to expand
the MSO segment timings to full width in many places.
Pull it into a helper
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 54 ++++++++++----------
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5da8db3dda8f..70017526fa81 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2724,6 +2724,30 @@ static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state)
ilk_pipe_pixel_rate(crtc_state);
}
+static void intel_splitter_adjust_timings(const struct intel_crtc_state *crtc_state,
+ struct drm_display_mode *mode)
+{
+ int overlap = crtc_state->splitter.pixel_overlap;
+ int n = crtc_state->splitter.link_count;
+
+ if (!crtc_state->splitter.enable)
+ return;
+
+ /*
+ * eDP MSO uses segment timings from EDID for transcoder
+ * timings, but full mode for everything else.
+ *
+ * h_full = (h_segment - pixel_overlap) * link_count
+ */
+ mode->crtc_hdisplay = (mode->crtc_hdisplay - overlap) * n;
+ mode->crtc_hblank_start = (mode->crtc_hblank_start - overlap) * n;
+ mode->crtc_hblank_end = (mode->crtc_hblank_end - overlap) * n;
+ mode->crtc_hsync_start = (mode->crtc_hsync_start - overlap) * n;
+ mode->crtc_hsync_end = (mode->crtc_hsync_end - overlap) * n;
+ mode->crtc_htotal = (mode->crtc_htotal - overlap) * n;
+ mode->crtc_clock *= n;
+}
+
static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state)
{
struct drm_display_mode *mode = &crtc_state->hw.mode;
@@ -2747,22 +2771,7 @@ static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state
}
if (crtc_state->splitter.enable) {
- int n = crtc_state->splitter.link_count;
- int overlap = crtc_state->splitter.pixel_overlap;
-
- /*
- * eDP MSO uses segment timings from EDID for transcoder
- * timings, but full mode for everything else.
- *
- * h_full = (h_segment - pixel_overlap) * link_count
- */
- pipe_mode->crtc_hdisplay = (pipe_mode->crtc_hdisplay - overlap) * n;
- pipe_mode->crtc_hblank_start = (pipe_mode->crtc_hblank_start - overlap) * n;
- pipe_mode->crtc_hblank_end = (pipe_mode->crtc_hblank_end - overlap) * n;
- pipe_mode->crtc_hsync_start = (pipe_mode->crtc_hsync_start - overlap) * n;
- pipe_mode->crtc_hsync_end = (pipe_mode->crtc_hsync_end - overlap) * n;
- pipe_mode->crtc_htotal = (pipe_mode->crtc_htotal - overlap) * n;
- pipe_mode->crtc_clock *= n;
+ intel_splitter_adjust_timings(crtc_state, pipe_mode);
intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
intel_mode_from_crtc_timings(adjusted_mode, pipe_mode);
@@ -2807,18 +2816,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
crtc_state->pipe_src_w /= 2;
}
- if (crtc_state->splitter.enable) {
- int n = crtc_state->splitter.link_count;
- int overlap = crtc_state->splitter.pixel_overlap;
-
- pipe_mode->crtc_hdisplay = (pipe_mode->crtc_hdisplay - overlap) * n;
- pipe_mode->crtc_hblank_start = (pipe_mode->crtc_hblank_start - overlap) * n;
- pipe_mode->crtc_hblank_end = (pipe_mode->crtc_hblank_end - overlap) * n;
- pipe_mode->crtc_hsync_start = (pipe_mode->crtc_hsync_start - overlap) * n;
- pipe_mode->crtc_hsync_end = (pipe_mode->crtc_hsync_end - overlap) * n;
- pipe_mode->crtc_htotal = (pipe_mode->crtc_htotal - overlap) * n;
- pipe_mode->crtc_clock *= n;
- }
+ intel_splitter_adjust_timings(crtc_state, pipe_mode);
intel_mode_from_crtc_timings(pipe_mode, pipe_mode);
--
2.34.1
next prev parent reply other threads:[~2022-02-15 18:32 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-15 18:31 [Intel-gfx] [PATCH 00/12] drm/i915: Move bigjoiner refactoring Ville Syrjala
2022-02-15 18:31 ` [Intel-gfx] [PATCH 01/12] drm/i915: Fix cursor coordinates on bigjoiner slave Ville Syrjala
2022-02-16 3:25 ` Navare, Manasi
2022-02-16 8:39 ` Ville Syrjälä
2022-02-16 19:23 ` Navare, Manasi
2022-02-15 18:31 ` [Intel-gfx] [PATCH 02/12] drm/i915: Remove nop bigjoiner state copy Ville Syrjala
2022-02-16 12:52 ` Nautiyal, Ankit K
2022-02-15 18:31 ` [Intel-gfx] [PATCH 03/12] drm/i915: Rename variables in intel_crtc_compute_config() Ville Syrjala
2022-02-16 19:26 ` Navare, Manasi
2022-02-15 18:32 ` Ville Syrjala [this message]
2022-02-17 8:26 ` [Intel-gfx] [PATCH 04/12] drm/i915: Extract intel_splitter_adjust_timings() Jani Nikula
2022-02-15 18:32 ` [Intel-gfx] [PATCH 05/12] drm/i915: Extract intel_bigjoiner_adjust_timings() Ville Syrjala
2022-02-16 19:32 ` Navare, Manasi
2022-02-15 18:32 ` [Intel-gfx] [PATCH 06/12] drm/i915: Extract intel_crtc_compute_pipe_src() Ville Syrjala
2022-02-16 19:35 ` Navare, Manasi
2022-02-16 19:44 ` Ville Syrjälä
2022-02-15 18:32 ` [Intel-gfx] [PATCH 07/12] drm/i915: Extract intel_crtc_compute_pipe_mode() Ville Syrjala
2022-02-16 19:37 ` Navare, Manasi
2022-02-15 18:32 ` [Intel-gfx] [PATCH 08/12] drm/i915: Fix MSO vs. bigjoiner timings confusion Ville Syrjala
2022-02-16 19:50 ` Navare, Manasi
2022-02-15 18:32 ` [Intel-gfx] [PATCH 09/12] drm/i915: Start tracking PIPESRC as a drm_rect Ville Syrjala
2022-02-16 11:38 ` Ville Syrjälä
2022-02-15 18:32 ` [Intel-gfx] [PATCH 10/12] drm/i915: Eliminate bigjoiner boolean Ville Syrjala
2022-02-16 10:57 ` Nautiyal, Ankit K
2022-02-16 11:04 ` Ville Syrjälä
2022-02-16 11:23 ` Nautiyal, Ankit K
2022-02-16 21:25 ` Navare, Manasi
2022-02-15 18:32 ` [Intel-gfx] [PATCH 11/12] drm/i915: Use bigjoiner_pipes more Ville Syrjala
2022-02-16 12:27 ` Nautiyal, Ankit K
2022-02-16 12:35 ` Ville Syrjälä
2022-02-16 21:26 ` Navare, Manasi
2022-02-15 18:32 ` [Intel-gfx] [PATCH 12/12] drm/i915: Make the PIPESC rect relative to the entire bigjoiner area Ville Syrjala
2022-02-17 1:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Move bigjoiner refactoring Patchwork
2022-02-17 10:29 ` Ville Syrjälä
2022-02-17 10:17 ` [Intel-gfx] [PATCH 00/12] " Nautiyal, Ankit K
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