From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>
Cc: lucas.demarchi@intel.com
Subject: [Intel-gfx] [PATCH 00/15] drm/i915: Enable DG2
Date: Sat, 19 Feb 2022 00:17:37 +0530 [thread overview]
Message-ID: <20220218184752.7524-1-ramalingam.c@intel.com> (raw)
Enabling the Dg2 on drm/i915.
This series adds support for 64k pagesize and documents the uapi
impacts. And also adds basic flat-ccs enabling patches to
support the local memory initialization and object creation. Kdoc is
added to document the Flat-ccs support.
Flat-ccs modifiers will be enabled in upcoming patches.
Note:
This is subset of https://patchwork.freedesktop.org/series/95686/ The
remaining patches of the series will be pursued in subsequent series.
And few patches are reviewed at and pulled from many series like
https://patchwork.freedesktop.org/series/99119/
https://patchwork.freedesktop.org/series/100373/
https://patchwork.freedesktop.org/series/97544/
Abdiel Janulgue (1):
drm/i915/lmem: Enable lmem for platforms with Flat CCS
Ayaz A Siddiqui (1):
drm/i915/gt: Clear compress metadata for Xe_HP platforms
CQ Tang (1):
drm/i915/xehpsdv: Add has_flat_ccs to device info
John Harrison (1):
drm/i915/dg2: Define GuC firmware version for DG2
Jouni Högander (1):
drm/i915: Fix for PHY_MISC_TC1 offset
Matt Roper (2):
drm/i915/dg2: Drop 38.4 MHz MPLLB tables
drm/i915/dg2: Enable 5th port
Matthew Auld (6):
drm/i915: enforce min GTT alignment for discrete cards
drm/i915: support 64K GTT pages for discrete cards
drm/i915/gtt: allow overriding the pt alignment
drm/i915/gtt: add xehpsdv_ppgtt_insert_entry
drm/i915/migrate: add acceleration support for DG2
drm/i915/uapi: document behaviour for DG2 64K support
Ramalingam C (1):
drm/i915: add needs_compact_pt flag
Robert Beckett (1):
drm/i915: add gtt misalignment test
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/display/intel_gmbus.c | 16 +-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 210 +----------
.../gpu/drm/i915/gem/selftests/huge_pages.c | 60 ++++
.../i915/gem/selftests/i915_gem_client_blt.c | 21 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 158 +++++++-
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 15 +
drivers/gpu/drm/i915/gt/intel_gt.c | 19 +
drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +
drivers/gpu/drm/i915/gt/intel_gtt.c | 12 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 35 +-
drivers/gpu/drm/i915/gt/intel_migrate.c | 337 ++++++++++++++++--
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 17 +-
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 26 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 17 +-
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_pci.c | 3 +
drivers/gpu/drm/i915/i915_reg.h | 7 +-
drivers/gpu/drm/i915/i915_vma.c | 9 +
drivers/gpu/drm/i915/intel_device_info.h | 2 +
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 222 ++++++++++--
include/uapi/drm/i915_drm.h | 45 ++-
24 files changed, 934 insertions(+), 308 deletions(-)
--
2.20.1
next reply other threads:[~2022-02-18 18:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 18:47 Ramalingam C [this message]
2022-02-18 18:47 ` [Intel-gfx] [PATCH 01/15] drm/i915/dg2: Define GuC firmware version for DG2 Ramalingam C
2022-02-18 19:14 ` Ceraolo Spurio, Daniele
2022-02-18 18:47 ` [Intel-gfx] [PATCH 02/15] drm/i915: Fix for PHY_MISC_TC1 offset Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 03/15] drm/i915/dg2: Drop 38.4 MHz MPLLB tables Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 04/15] drm/i915/dg2: Enable 5th port Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 05/15] drm/i915: add needs_compact_pt flag Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 06/15] drm/i915: enforce min GTT alignment for discrete cards Ramalingam C
2022-03-03 9:43 ` Jani Nikula
2022-02-18 18:47 ` [Intel-gfx] [PATCH 07/15] drm/i915: support 64K GTT pages " Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 08/15] drm/i915: add gtt misalignment test Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 09/15] drm/i915/gtt: allow overriding the pt alignment Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 10/15] drm/i915/gtt: add xehpsdv_ppgtt_insert_entry Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 11/15] drm/i915/migrate: add acceleration support for DG2 Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 12/15] drm/i915/uapi: document behaviour for DG2 64K support Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 13/15] drm/i915/xehpsdv: Add has_flat_ccs to device info Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 14/15] drm/i915/lmem: Enable lmem for platforms with Flat CCS Ramalingam C
2022-02-18 18:47 ` [Intel-gfx] [PATCH 15/15] drm/i915/gt: Clear compress metadata for Xe_HP platforms Ramalingam C
2022-02-19 1:47 ` Matt Roper
2022-02-27 16:52 ` Ramalingam C
2022-03-03 5:28 ` Matt Roper
2022-02-18 19:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable DG2 Patchwork
2022-02-18 19:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-18 19:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-19 11:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-02-20 10:18 ` [Intel-gfx] [PATCH 00/15] " Lucas De Marchi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220218184752.7524-1-ramalingam.c@intel.com \
--to=ramalingam.c@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox